Small series that fixes/completes DT bindings for Tegra GPUs and add two
missing entries required for the Tegra210 GPU to operate properly.
Without these fixes, GM20B will crash during probe on 4.6 because a
required clock is not activated.
Changes since v2:
- Fixed device address in DT examples
- Carried Acked-bys
Changes since v1:
- Renamed "pllg_ref" clock to "ref" in DT bindings
Alexandre Courbot (5):
dt-bindings: gk20a: Fix typo in compatible name
dt-bindings: gk20a: Document iommus property
dt-bindings: Add documentation for GM20B GPU
arm64: tegra210: Add reference clock to GM20B
arm64: tegra210: Add IOMMU node to GM20B
.../devicetree/bindings/gpu/nvidia,gk20a.txt | 37 +++++++++++++++++++---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 +++--
2 files changed, 38 insertions(+), 7 deletions(-)
--
2.7.3
GK20A can optionally make use of an IOMMU.
Signed-off-by: Alexandre Courbot <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
index 914f0ff4020e..1e3748337319 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
@@ -24,6 +24,9 @@ Required properties:
- reset-names: Must include the following entries:
- gpu
+Optional properties:
+- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
+
Example:
gpu@0,57000000 {
@@ -39,5 +42,6 @@ Example:
clock-names = "gpu", "pwr";
resets = <&tegra_car 184>;
reset-names = "gpu";
+ iommus = <&mc TEGRA_SWGROUP_GPU>;
status = "disabled";
};
--
2.7.3
Nouveau can take advantage of this declaration to remove the need for
contiguous memory.
Signed-off-by: Alexandre Courbot <[email protected]>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 04898cb25f0c..478543f74863 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -314,6 +314,9 @@
clock-names = "gpu", "pwr", "ref";
resets = <&tegra_car 184>;
reset-names = "gpu";
+
+ iommus = <&mc TEGRA_SWGROUP_GPU>;
+
status = "disabled";
};
--
2.7.3
GM20B's definition is mostly similar to GK20A's, but requires an
additional clock.
Signed-off-by: Alexandre Courbot <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/gpu/nvidia,gk20a.txt | 29 +++++++++++++++++++---
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
index 1e3748337319..ff3db65e50de 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
@@ -1,9 +1,10 @@
-NVIDIA GK20A Graphics Processing Unit
+NVIDIA Tegra Graphics Processing Units
Required properties:
- compatible: "nvidia,<gpu>"
Currently recognized values:
- nvidia,gk20a
+ - nvidia,gm20b
- reg: Physical base address and length of the controller's registers.
Must contain two entries:
- first entry for bar0
@@ -19,6 +20,9 @@ Required properties:
- clock-names: Must include the following entries:
- gpu
- pwr
+If the compatible string is "nvidia,gm20b", then the following clock
+is also required:
+ - ref
- resets: Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names: Must include the following entries:
@@ -27,9 +31,9 @@ Required properties:
Optional properties:
- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
-Example:
+Example for GK20A:
- gpu@0,57000000 {
+ gpu@57000000 {
compatible = "nvidia,gk20a";
reg = <0x0 0x57000000 0x0 0x01000000>,
<0x0 0x58000000 0x0 0x01000000>;
@@ -45,3 +49,22 @@ Example:
iommus = <&mc TEGRA_SWGROUP_GPU>;
status = "disabled";
};
+
+Example for GM20B:
+
+ gpu@57000000 {
+ compatible = "nvidia,gm20b";
+ reg = <0x0 0x57000000 0x0 0x01000000>,
+ <0x0 0x58000000 0x0 0x01000000>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "stall", "nonstall";
+ clocks = <&tegra_car TEGRA210_CLK_GPU>,
+ <&tegra_car TEGRA210_CLK_PLL_P_OUT5>,
+ <&tegra_car TEGRA210_CLK_PLL_G_REF>;
+ clock-names = "gpu", "pwr", "ref";
+ resets = <&tegra_car 184>;
+ reset-names = "gpu";
+ iommus = <&mc TEGRA_SWGROUP_GPU>;
+ status = "disabled";
+ };
--
2.7.3
This clock is required for the GPU to operate.
Signed-off-by: Alexandre Courbot <[email protected]>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 362c269946ff..04898cb25f0c 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -309,8 +309,9 @@
<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "stall", "nonstall";
clocks = <&tegra_car TEGRA210_CLK_GPU>,
- <&tegra_car TEGRA210_CLK_PLL_P_OUT5>;
- clock-names = "gpu", "pwr";
+ <&tegra_car TEGRA210_CLK_PLL_P_OUT5>,
+ <&tegra_car TEGRA210_CLK_PLL_G_REF>;
+ clock-names = "gpu", "pwr", "ref";
resets = <&tegra_car 184>;
reset-names = "gpu";
status = "disabled";
--
2.7.3
The correct compatible name is "nvidia,gk20a".
Signed-off-by: Alexandre Courbot <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
index 23bfe8e1f7cc..914f0ff4020e 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
@@ -1,9 +1,9 @@
NVIDIA GK20A Graphics Processing Unit
Required properties:
-- compatible: "nvidia,<chip>-<gpu>"
+- compatible: "nvidia,<gpu>"
Currently recognized values:
- - nvidia,tegra124-gk20a
+ - nvidia,gk20a
- reg: Physical base address and length of the controller's registers.
Must contain two entries:
- first entry for bar0
--
2.7.3
On Mon, Mar 28, 2016 at 06:22:59PM +0900, Alexandre Courbot wrote:
> Small series that fixes/completes DT bindings for Tegra GPUs and add two
> missing entries required for the Tegra210 GPU to operate properly.
>
> Without these fixes, GM20B will crash during probe on 4.6 because a
> required clock is not activated.
>
> Changes since v2:
> - Fixed device address in DT examples
> - Carried Acked-bys
>
> Changes since v1:
> - Renamed "pllg_ref" clock to "ref" in DT bindings
>
> Alexandre Courbot (5):
> dt-bindings: gk20a: Fix typo in compatible name
> dt-bindings: gk20a: Document iommus property
> dt-bindings: Add documentation for GM20B GPU
> arm64: tegra210: Add reference clock to GM20B
> arm64: tegra210: Add IOMMU node to GM20B
>
> .../devicetree/bindings/gpu/nvidia,gk20a.txt | 37 +++++++++++++++++++---
> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 +++--
> 2 files changed, 38 insertions(+), 7 deletions(-)
Applied, thanks.
Thierry