Hi,
This series addresses the long pending move of ARC timer code into
drivers/clocksource/.
Thx,
-Vineet
v3 -> v4
- dropped 2 patches.
"rtc: implement read loop in "C" vs. inline asm" was a bug fix which is
merged in upstream already
"gfrc: boot print alongside other timers" squashed in final patch
- ARC_TIMERS_64BIT now have explicit dependency on ARC_TIMERS to fix the
build issue when only 64BIT optin is selected [Daniel]
- 0day build reported error with aux header movement patch - problem is in
nps irqchip driver, which needs to be fixed before it can start using the
new header
v2 -> v3
- Fixed a bunch of typos in changelogs [Daniel]
- aux.h: stubs for {read,write}_aux_reg() inline functions(vs. macros)
to cleanly avoid warnings in !ARC builds [Daniel]
- Remove __maybe_used in driver given above [Daniel]
- Ran checkpatch and fixed some space/tab issues
v1 -> v2
- Now 10 patches instead of 9 to handle BIG ENDIAN in arch agnostic way
- Moved fix for RTC (v1 2/9) ahead of queue (v2 1/10) to allow for easier
stable backport
- Folded the Kconfig items for RTC and GFRC into single ARC_TIMERS_64BIT
So no special casing for UP/SMP in Kconfig.
Driver already handles the UP vs. SMP at runtime as needed
- convert WARN() to pr_warn() [Daniel]
- Use of _BITUL() vs. constant 0x8000_0000 [Daniel]
- changelog spellos: [Daniel]
s/depedency/dependency/
s/seperate/separate/
v3: http://lists.infradead.org/pipermail/linux-snps-arc/2016-November/001757.html
v2: http://lists.infradead.org/pipermail/linux-snps-arc/2016-November/001724.html
v1: http://lists.infradead.org/pipermail/linux-snps-arc/2016-October/001676.html
Vineet Gupta (8):
ARC: timer: gfrc, rtc: deuglify big endian code
ARC: timer: gfrc, rtc: Read BCR to detect whether hardware exists ...
ARC: time: move time_init() out of the driver
ARC: timer: Build gfrc, rtc under same option (64-bit timers)
ARC: breakout aux handling into a separate header
ARC: move mcip.h into include/soc and adjust the includes
ARC: breakout timer include code into separate header ...
clocksource: import ARC timer driver
MAINTAINERS | 1 +
arch/arc/Kconfig | 13 +--
arch/arc/configs/nsimosci_hs_smp_defconfig | 2 +-
arch/arc/configs/vdk_hs38_smp_defconfig | 2 +-
arch/arc/include/asm/arcregs.h | 94 +-----------------
arch/arc/kernel/Makefile | 2 +-
arch/arc/kernel/mcip.c | 2 +-
arch/arc/kernel/setup.c | 17 +++-
arch/arc/plat-axs10x/axs10x.c | 2 +-
drivers/clocksource/Kconfig | 20 ++++
drivers/clocksource/Makefile | 1 +
.../time.c => drivers/clocksource/arc_timer.c | 110 ++++++---------------
include/soc/arc/aux.h | 63 ++++++++++++
{arch/arc/include/asm => include/soc/arc}/mcip.h | 10 +-
include/soc/arc/timers.h | 38 +++++++
15 files changed, 181 insertions(+), 196 deletions(-)
rename arch/arc/kernel/time.c => drivers/clocksource/arc_timer.c (73%)
create mode 100644 include/soc/arc/aux.h
rename {arch/arc/include/asm => include/soc/arc}/mcip.h (95%)
create mode 100644 include/soc/arc/timers.h
--
2.7.4
A standard "C" shift will be handled appropriately by the compiler
depending on the endian for the build. So we don't need the
explicit distinction in code
Signed-off-by: Vineet Gupta <[email protected]>
---
arch/arc/kernel/time.c | 30 ++++++++----------------------
1 file changed, 8 insertions(+), 22 deletions(-)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index c10390d1ddb6..8d66bb446209 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -86,26 +86,19 @@ static int noinline arc_get_timer_clk(struct device_node *node)
static cycle_t arc_read_gfrc(struct clocksource *cs)
{
unsigned long flags;
- union {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- struct { u32 h, l; };
-#else
- struct { u32 l, h; };
-#endif
- cycle_t full;
- } stamp;
+ u32 l, h;
local_irq_save(flags);
__mcip_cmd(CMD_GFRC_READ_LO, 0);
- stamp.l = read_aux_reg(ARC_REG_MCIP_READBACK);
+ l = read_aux_reg(ARC_REG_MCIP_READBACK);
__mcip_cmd(CMD_GFRC_READ_HI, 0);
- stamp.h = read_aux_reg(ARC_REG_MCIP_READBACK);
+ h = read_aux_reg(ARC_REG_MCIP_READBACK);
local_irq_restore(flags);
- return stamp.full;
+ return (((cycle_t)h) << 32) | l;
}
static struct clocksource arc_counter_gfrc = {
@@ -143,14 +136,7 @@ CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
static cycle_t arc_read_rtc(struct clocksource *cs)
{
unsigned long status;
- union {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- struct { u32 high, low; };
-#else
- struct { u32 low, high; };
-#endif
- cycle_t full;
- } stamp;
+ u32 l, h;
/*
* hardware has an internal state machine which tracks readout of
@@ -159,12 +145,12 @@ static cycle_t arc_read_rtc(struct clocksource *cs)
* - high increments after low has been read
*/
do {
- stamp.low = read_aux_reg(AUX_RTC_LOW);
- stamp.high = read_aux_reg(AUX_RTC_HIGH);
+ l = read_aux_reg(AUX_RTC_LOW);
+ h = read_aux_reg(AUX_RTC_HIGH);
status = read_aux_reg(AUX_RTC_CTRL);
} while (!(status & _BITUL(31)));
- return stamp.full;
+ return (((cycle_t)h) << 32) | l;
}
static struct clocksource arc_counter_rtc = {
--
2.7.4
ARC timers use aux registers for programming and this paves way for
moving ARC timer drivers into drivers/clocksource
Signed-off-by: Vineet Gupta <[email protected]>
---
arch/arc/include/asm/arcregs.h | 85 +-----------------------------------------
arch/arc/include/asm/mcip.h | 2 +-
include/soc/arc/aux.h | 63 +++++++++++++++++++++++++++++++
3 files changed, 65 insertions(+), 85 deletions(-)
create mode 100644 include/soc/arc/aux.h
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 1bd24ec3e350..7a2c36e83186 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -112,90 +112,7 @@
#ifndef __ASSEMBLY__
-/*
- ******************************************************************
- * Inline ASM macros to read/write AUX Regs
- * Essentially invocation of lr/sr insns from "C"
- */
-
-#if 1
-
-#define read_aux_reg(reg) __builtin_arc_lr(reg)
-
-/* gcc builtin sr needs reg param to be long immediate */
-#define write_aux_reg(reg_immed, val) \
- __builtin_arc_sr((unsigned int)(val), reg_immed)
-
-#else
-
-#define read_aux_reg(reg) \
-({ \
- unsigned int __ret; \
- __asm__ __volatile__( \
- " lr %0, [%1]" \
- : "=r"(__ret) \
- : "i"(reg)); \
- __ret; \
-})
-
-/*
- * Aux Reg address is specified as long immediate by caller
- * e.g.
- * write_aux_reg(0x69, some_val);
- * This generates tightest code.
- */
-#define write_aux_reg(reg_imm, val) \
-({ \
- __asm__ __volatile__( \
- " sr %0, [%1] \n" \
- : \
- : "ir"(val), "i"(reg_imm)); \
-})
-
-/*
- * Aux Reg address is specified in a variable
- * * e.g.
- * reg_num = 0x69
- * write_aux_reg2(reg_num, some_val);
- * This has to generate glue code to load the reg num from
- * memory to a reg hence not recommended.
- */
-#define write_aux_reg2(reg_in_var, val) \
-({ \
- unsigned int tmp; \
- \
- __asm__ __volatile__( \
- " ld %0, [%2] \n\t" \
- " sr %1, [%0] \n\t" \
- : "=&r"(tmp) \
- : "r"(val), "memory"(®_in_var)); \
-})
-
-#endif
-
-#define READ_BCR(reg, into) \
-{ \
- unsigned int tmp; \
- tmp = read_aux_reg(reg); \
- if (sizeof(tmp) == sizeof(into)) { \
- into = *((typeof(into) *)&tmp); \
- } else { \
- extern void bogus_undefined(void); \
- bogus_undefined(); \
- } \
-}
-
-#define WRITE_AUX(reg, into) \
-{ \
- unsigned int tmp; \
- if (sizeof(tmp) == sizeof(into)) { \
- tmp = (*(unsigned int *)&(into)); \
- write_aux_reg(reg, tmp); \
- } else { \
- extern void bogus_undefined(void); \
- bogus_undefined(); \
- } \
-}
+#include <soc/arc/aux.h>
/* Helpers */
#define TO_KB(bytes) ((bytes) >> 10)
diff --git a/arch/arc/include/asm/mcip.h b/arch/arc/include/asm/mcip.h
index c8fbe4114bad..fc28d0944801 100644
--- a/arch/arc/include/asm/mcip.h
+++ b/arch/arc/include/asm/mcip.h
@@ -13,7 +13,7 @@
#ifdef CONFIG_ISA_ARCV2
-#include <asm/arcregs.h>
+#include <soc/arc/aux.h>
#define ARC_REG_MCIP_BCR 0x0d0
#define ARC_REG_MCIP_CMD 0x600
diff --git a/include/soc/arc/aux.h b/include/soc/arc/aux.h
new file mode 100644
index 000000000000..8c3fb13e0452
--- /dev/null
+++ b/include/soc/arc/aux.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2016-2017 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __SOC_ARC_AUX_H__
+#define __SOC_ARC_AUX_H__
+
+#ifdef CONFIG_ARC
+
+#define read_aux_reg(r) __builtin_arc_lr(r)
+
+/* gcc builtin sr needs reg param to be long immediate */
+#define write_aux_reg(r, v) __builtin_arc_sr((unsigned int)(v), r)
+
+#else /* !CONFIG_ARC */
+
+static inline int read_aux_reg(u32 r)
+{
+ return 0;
+}
+
+/*
+ * function helps elide unused variable warning
+ * see: http://lists.infradead.org/pipermail/linux-snps-arc/2016-November/001748.html
+ */
+static inline void write_aux_reg(u32 r, u32 v)
+{
+ ;
+}
+
+#endif
+
+#define READ_BCR(reg, into) \
+{ \
+ unsigned int tmp; \
+ tmp = read_aux_reg(reg); \
+ if (sizeof(tmp) == sizeof(into)) { \
+ into = *((typeof(into) *)&tmp); \
+ } else { \
+ extern void bogus_undefined(void); \
+ bogus_undefined(); \
+ } \
+}
+
+#define WRITE_AUX(reg, into) \
+{ \
+ unsigned int tmp; \
+ if (sizeof(tmp) == sizeof(into)) { \
+ tmp = (*(unsigned int *)&(into)); \
+ write_aux_reg(reg, tmp); \
+ } else { \
+ extern void bogus_undefined(void); \
+ bogus_undefined(); \
+ } \
+}
+
+
+#endif
--
2.7.4
The original distinction was done as they were developed at different
times and primarily because they are specific to UP (RTC) and SMP (GFRC).
But given that driver handles that at runtime, (i.e. not allowing
RTC as clocksource in SMP), we can simplify things a bit.
Signed-off-by: Vineet Gupta <[email protected]>
---
arch/arc/Kconfig | 10 ++--------
arch/arc/configs/nsimosci_hs_smp_defconfig | 2 +-
arch/arc/configs/vdk_hs38_smp_defconfig | 2 +-
arch/arc/kernel/setup.c | 6 +++---
arch/arc/kernel/time.c | 6 +-----
5 files changed, 8 insertions(+), 18 deletions(-)
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index bd204bfa29ed..bde3e558d8bc 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -410,15 +410,9 @@ config ARC_HAS_DIV_REM
bool "Insn: div, divu, rem, remu"
default y
-config ARC_HAS_RTC
- bool "Local 64-bit r/o cycle counter"
- default n
- depends on !SMP
-
-config ARC_HAS_GFRC
- bool "SMP synchronized 64-bit cycle counter"
+config ARC_TIMERS_64BIT
+ bool "64-bit r/o cycle counters RTC (up) and GFRC (smp)"
default y
- depends on SMP
config ARC_NUMBER_OF_INTERRUPTS
int "Number of interrupts"
diff --git a/arch/arc/configs/nsimosci_hs_smp_defconfig b/arch/arc/configs/nsimosci_hs_smp_defconfig
index 6da71ba253a9..155add7761ed 100644
--- a/arch/arc/configs/nsimosci_hs_smp_defconfig
+++ b/arch/arc/configs/nsimosci_hs_smp_defconfig
@@ -21,7 +21,7 @@ CONFIG_MODULES=y
CONFIG_ARC_PLAT_SIM=y
CONFIG_ISA_ARCV2=y
CONFIG_SMP=y
-# CONFIG_ARC_HAS_GFRC is not set
+# CONFIG_ARC_TIMERS_64BIT is not set
CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs_idu"
CONFIG_PREEMPT=y
# CONFIG_COMPACTION is not set
diff --git a/arch/arc/configs/vdk_hs38_smp_defconfig b/arch/arc/configs/vdk_hs38_smp_defconfig
index 969b206d6c67..573028f19de7 100644
--- a/arch/arc/configs/vdk_hs38_smp_defconfig
+++ b/arch/arc/configs/vdk_hs38_smp_defconfig
@@ -15,7 +15,7 @@ CONFIG_ARC_PLAT_AXS10X=y
CONFIG_AXS103=y
CONFIG_ISA_ARCV2=y
CONFIG_SMP=y
-# CONFIG_ARC_HAS_GFRC is not set
+# CONFIG_ARC_TIMERS_64BIT is not set
CONFIG_ARC_UBOOT_SUPPORT=y
CONFIG_ARC_BUILTIN_DTB_NAME="vdk_hs38_smp"
CONFIG_PREEMPT=y
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 1be9d5c81037..3093fa898a23 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -236,11 +236,11 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
is_isa_arcompact() ? "ARCompact" : "ARCv2",
IS_AVAIL1(cpu->isa.be, "[Big-Endian]"));
- n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
+ n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",
IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
- IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
- CONFIG_ARC_HAS_RTC));
+ IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
+ IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 7f06662f53e7..417d32e031d3 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -81,7 +81,7 @@ static int noinline arc_get_timer_clk(struct device_node *node)
/********** Clock Source Device *********/
-#ifdef CONFIG_ARC_HAS_GFRC
+#ifdef CONFIG_ARC_TIMERS_64BIT
static cycle_t arc_read_gfrc(struct clocksource *cs)
{
@@ -128,10 +128,6 @@ static int __init arc_cs_setup_gfrc(struct device_node *node)
}
CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
-#endif
-
-#ifdef CONFIG_ARC_HAS_RTC
-
#define AUX_RTC_CTRL 0x103
#define AUX_RTC_LOW 0x104
#define AUX_RTC_HIGH 0x105
--
2.7.4
... which allows for use in drivers/clocksource later
Signed-off-by: Vineet Gupta <[email protected]>
---
arch/arc/include/asm/arcregs.h | 9 +--------
arch/arc/kernel/time.c | 18 +++---------------
include/soc/arc/timers.h | 38 ++++++++++++++++++++++++++++++++++++++
3 files changed, 42 insertions(+), 23 deletions(-)
create mode 100644 include/soc/arc/timers.h
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 7a2c36e83186..da41a54ea2d7 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -20,7 +20,6 @@
#define ARC_REG_FP_V2_BCR 0xc8 /* ARCv2 FPU */
#define ARC_REG_SLC_BCR 0xce
#define ARC_REG_DCCM_BUILD 0x74 /* DCCM size (common) */
-#define ARC_REG_TIMERS_BCR 0x75
#define ARC_REG_AP_BCR 0x76
#define ARC_REG_ICCM_BUILD 0x78 /* ICCM size (common) */
#define ARC_REG_XY_MEM_BCR 0x79
@@ -208,13 +207,7 @@ struct bcr_fp_arcv2 {
#endif
};
-struct bcr_timer {
-#ifdef CONFIG_CPU_BIG_ENDIAN
- unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8;
-#else
- unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15;
-#endif
-};
+#include <soc/arc/timers.h>
struct bcr_bpu_arcompact {
#ifdef CONFIG_CPU_BIG_ENDIAN
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index ec1b896f27b2..94b9cd169374 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -38,22 +38,10 @@
#include <linux/of.h>
#include <linux/of_irq.h>
#include <asm/irq.h>
-#include <asm/arcregs.h>
+#include <soc/arc/timers.h>
#include <soc/arc/mcip.h>
-/* Timer related Aux registers */
-#define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */
-#define ARC_REG_TIMER0_CTRL 0x22 /* timer 0 control */
-#define ARC_REG_TIMER0_CNT 0x21 /* timer 0 count */
-#define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
-#define ARC_REG_TIMER1_CTRL 0x101 /* timer 1 control */
-#define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
-
-#define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit */
-#define TIMER_CTRL_NH (1 << 1) /* Count only when CPU NOT halted */
-
-#define ARC_TIMER_MAX 0xFFFFFFFF
static unsigned long arc_timer_freq;
@@ -218,7 +206,7 @@ static int __init arc_cs_setup_timer1(struct device_node *node)
if (ret)
return ret;
- write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMER_MAX);
+ write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMERN_MAX);
write_aux_reg(ARC_REG_TIMER1_CNT, 0);
write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH);
@@ -296,7 +284,7 @@ static int arc_timer_starting_cpu(unsigned int cpu)
evt->cpumask = cpumask_of(smp_processor_id());
- clockevents_config_and_register(evt, arc_timer_freq, 0, ARC_TIMER_MAX);
+ clockevents_config_and_register(evt, arc_timer_freq, 0, ARC_TIMERN_MAX);
enable_percpu_irq(arc_timer_irq, 0);
return 0;
}
diff --git a/include/soc/arc/timers.h b/include/soc/arc/timers.h
new file mode 100644
index 000000000000..a20ed2fbc432
--- /dev/null
+++ b/include/soc/arc/timers.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2016-17 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __SOC_ARC_TIMERS_H
+#define __SOC_ARC_TIMERS_H
+
+#include <soc/arc/aux.h>
+
+/* Timer related Aux registers */
+#define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */
+#define ARC_REG_TIMER0_CTRL 0x22 /* timer 0 control */
+#define ARC_REG_TIMER0_CNT 0x21 /* timer 0 count */
+#define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
+#define ARC_REG_TIMER1_CTRL 0x101 /* timer 1 control */
+#define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
+
+/* CTRL reg bits */
+#define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit */
+#define TIMER_CTRL_NH (1 << 1) /* Count only when CPU NOT halted */
+
+#define ARC_TIMERN_MAX 0xFFFFFFFF
+
+#define ARC_REG_TIMERS_BCR 0x75
+
+struct bcr_timer {
+#ifdef CONFIG_CPU_BIG_ENDIAN
+ unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8;
+#else
+ unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15;
+#endif
+};
+
+#endif
--
2.7.4
This adds support for
- CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP
from @CNT to @LIMIT, before optionally triggering an interrupt.
These are programmed using ARC auxiliary register interface.
These are present in all ARC cores (ARC700 and ARC HS38)
TIMER0 serves as clockevent for all ARC linux builds.
TIMER1 is used for clocksource in arc700 builds.
- CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in
ARC HS38 cores. These are independnet IP blocks with different
programming model respectively.
Signed-off-by: Vineet Gupta <[email protected]>
---
MAINTAINERS | 1 +
arch/arc/Kconfig | 7 ++----
arch/arc/kernel/Makefile | 2 +-
drivers/clocksource/Kconfig | 20 ++++++++++++++++
drivers/clocksource/Makefile | 1 +
.../time.c => drivers/clocksource/arc_timer.c | 27 +++++-----------------
6 files changed, 31 insertions(+), 27 deletions(-)
rename arch/arc/kernel/time.c => drivers/clocksource/arc_timer.c (90%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3d838cf49f81..57b56ff1dd68 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11632,6 +11632,7 @@ S: Supported
F: arch/arc/
F: Documentation/devicetree/bindings/arc/*
F: Documentation/devicetree/bindings/interrupt-controller/snps,arc*
+F: drivers/clocksource/arc_timer.c
F: drivers/tty/serial/arc_uart.c
T: git git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index bde3e558d8bc..ab12723d39a0 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -8,9 +8,9 @@
config ARC
def_bool y
+ select ARC_TIMERS
select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC
select BUILDTIME_EXTABLE_SORT
- select CLKSRC_OF
select CLONE_BACKWARDS
select COMMON_CLK
select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC)
@@ -115,6 +115,7 @@ config ISA_ARCOMPACT
config ISA_ARCV2
bool "ARC ISA v2"
+ select ARC_TIMERS_64BIT
help
ISA for the Next Generation ARC-HS cores
@@ -410,10 +411,6 @@ config ARC_HAS_DIV_REM
bool "Insn: div, divu, rem, remu"
default y
-config ARC_TIMERS_64BIT
- bool "64-bit r/o cycle counters RTC (up) and GFRC (smp)"
- default y
-
config ARC_NUMBER_OF_INTERRUPTS
int "Number of interrupts"
range 8 240
diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile
index cfcdedf52ff8..8942c5c3b4c5 100644
--- a/arch/arc/kernel/Makefile
+++ b/arch/arc/kernel/Makefile
@@ -8,7 +8,7 @@
# Pass UTS_MACHINE for user_regset definition
CFLAGS_ptrace.o += -DUTS_MACHINE='"$(UTS_MACHINE)"'
-obj-y := arcksyms.o setup.o irq.o time.o reset.o ptrace.o process.o devtree.o
+obj-y := arcksyms.o setup.o irq.o reset.o ptrace.o process.o devtree.o
obj-y += signal.o traps.o sys.o troubleshoot.o stacktrace.o disasm.o
obj-$(CONFIG_ISA_ARCOMPACT) += entry-compact.o intc-compact.o
obj-$(CONFIG_ISA_ARCV2) += entry-arcv2.o intc-arcv2.o
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index e2c6e43cf8ca..4866f7aa32e6 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -282,6 +282,26 @@ config CLKSRC_MPS2
select CLKSRC_MMIO
select CLKSRC_OF
+config ARC_TIMERS
+ bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
+ depends on GENERIC_CLOCKEVENTS
+ select CLKSRC_OF
+ help
+ These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
+ (ARC700 as well as ARC HS38).
+ TIMER0 serves as clockevent while TIMER1 provides clocksource
+
+config ARC_TIMERS_64BIT
+ bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST
+ depends on GENERIC_CLOCKEVENTS
+ depends on ARC_TIMERS
+ select CLKSRC_OF
+ help
+ This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP)
+ RTC is implemented inside the core, while GFRC sits outside the core in
+ ARConnect IP block. Driver automatically picks one of them for clocksource
+ as appropriate.
+
config ARM_ARCH_TIMER
bool
select CLKSRC_OF if OF
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index cf87f407f1ad..a14111e1f087 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o
obj-$(CONFIG_CLKSRC_NPS) += timer-nps.o
obj-$(CONFIG_OXNAS_RPS_TIMER) += timer-oxnas-rps.o
+obj-$(CONFIG_ARC_TIMERS) += arc_timer.o
obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
obj-$(CONFIG_ARMV7M_SYSTICK) += armv7m_systick.o
diff --git a/arch/arc/kernel/time.c b/drivers/clocksource/arc_timer.c
similarity index 90%
rename from arch/arc/kernel/time.c
rename to drivers/clocksource/arc_timer.c
index 94b9cd169374..a49748d826c0 100644
--- a/arch/arc/kernel/time.c
+++ b/drivers/clocksource/arc_timer.c
@@ -1,32 +1,18 @@
/*
+ * Copyright (C) 2016-17 Synopsys, Inc. (http://www.synopsys.com)
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (http://www.synopsys.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- *
- * vineetg: Jan 1011
- * -sched_clock( ) no longer jiffies based. Uses the same clocksource
- * as gtod
- *
- * Rajeshwarr/Vineetg: Mar 2008
- * -Implemented CONFIG_GENERIC_TIME (rather deleted arch specific code)
- * for arch independent gettimeofday()
- * -Implemented CONFIG_GENERIC_CLOCKEVENTS as base for hrtimers
- *
- * Vineetg: Mar 2008: Forked off from time.c which now is time-jiff.c
*/
-/* ARC700 has two 32bit independent prog Timers: TIMER0 and TIMER1
- * Each can programmed to go from @count to @limit and optionally
- * interrupt when that happens.
- * A write to Control Register clears the Interrupt
- *
- * We've designated TIMER0 for events (clockevents)
- * while TIMER1 for free running (clocksource)
+/* ARC700 has two 32bit independent prog Timers: TIMER0 and TIMER1, Each can be
+ * programmed to go from @count to @limit and optionally interrupt.
+ * We've designated TIMER0 for clockevents and TIMER1 for clocksource
*
- * Newer ARC700 cores have 64bit clk fetching RTSC insn, preferred over TIMER1
- * which however is currently broken
+ * ARCv2 based HS38 cores have RTC (in-core) and GFRC (inside ARConnect/MCIP)
+ * which are suitable for UP and SMP based clocksources respectively
*/
#include <linux/interrupt.h>
@@ -37,7 +23,6 @@
#include <linux/cpu.h>
#include <linux/of.h>
#include <linux/of_irq.h>
-#include <asm/irq.h>
#include <soc/arc/timers.h>
#include <soc/arc/mcip.h>
--
2.7.4
Also remove the dependency on ARCv2, to increase compile coverage for
!ARCV2 builds
Acked-by: Daniel Lezcano <[email protected]>
Signed-off-by: Vineet Gupta <[email protected]>
---
arch/arc/kernel/mcip.c | 2 +-
arch/arc/kernel/time.c | 2 +-
arch/arc/plat-axs10x/axs10x.c | 2 +-
{arch/arc/include/asm => include/soc/arc}/mcip.h | 8 ++------
4 files changed, 5 insertions(+), 9 deletions(-)
rename {arch/arc/include/asm => include/soc/arc}/mcip.h (96%)
diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index f39142acc89e..560c4afc2af4 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -11,8 +11,8 @@
#include <linux/smp.h>
#include <linux/irq.h>
#include <linux/spinlock.h>
+#include <soc/arc/mcip.h>
#include <asm/irqflags-arcv2.h>
-#include <asm/mcip.h>
#include <asm/setup.h>
static DEFINE_RAW_SPINLOCK(mcip_lock);
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 417d32e031d3..ec1b896f27b2 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -40,7 +40,7 @@
#include <asm/irq.h>
#include <asm/arcregs.h>
-#include <asm/mcip.h>
+#include <soc/arc/mcip.h>
/* Timer related Aux registers */
#define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index 86548701023c..38ff349d7f2a 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -21,7 +21,7 @@
#include <asm/asm-offsets.h>
#include <asm/io.h>
#include <asm/mach_desc.h>
-#include <asm/mcip.h>
+#include <soc/arc/mcip.h>
#define AXS_MB_CGU 0xE0010000
#define AXS_MB_CREG 0xE0011000
diff --git a/arch/arc/include/asm/mcip.h b/include/soc/arc/mcip.h
similarity index 96%
rename from arch/arc/include/asm/mcip.h
rename to include/soc/arc/mcip.h
index fc28d0944801..6902c2a8bd23 100644
--- a/arch/arc/include/asm/mcip.h
+++ b/include/soc/arc/mcip.h
@@ -8,10 +8,8 @@
* published by the Free Software Foundation.
*/
-#ifndef __ASM_MCIP_H
-#define __ASM_MCIP_H
-
-#ifdef CONFIG_ISA_ARCV2
+#ifndef __SOC_ARC_MCIP_H
+#define __SOC_ARC_MCIP_H
#include <soc/arc/aux.h>
@@ -103,5 +101,3 @@ static inline void __mcip_cmd_data(unsigned int cmd, unsigned int param,
}
#endif
-
-#endif
--
2.7.4
to allow future git mv of the driver into drivers/clocksource
Acked-by: Daniel Lezcano <[email protected]>
Signed-off-by: Vineet Gupta <[email protected]>
---
arch/arc/kernel/setup.c | 11 +++++++++++
arch/arc/kernel/time.c | 9 ---------
2 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 0385df77a697..1be9d5c81037 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -10,6 +10,8 @@
#include <linux/fs.h>
#include <linux/delay.h>
#include <linux/root_dev.h>
+#include <linux/clk-provider.h>
+#include <linux/clocksource.h>
#include <linux/console.h>
#include <linux/module.h>
#include <linux/cpu.h>
@@ -449,6 +451,15 @@ void __init setup_arch(char **cmdline_p)
arc_unwind_init();
}
+/*
+ * Called from start_kernel() - boot CPU only
+ */
+void __init time_init(void)
+{
+ of_clk_init(NULL);
+ clocksource_probe();
+}
+
static int __init customize_machine(void)
{
if (machine_desc->init_machine)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index d3f3750a0d2d..7f06662f53e7 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -365,12 +365,3 @@ static int __init arc_of_timer_init(struct device_node *np)
return ret;
}
CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);
-
-/*
- * Called from start_kernel() - boot CPU only
- */
-void __init time_init(void)
-{
- of_clk_init(NULL);
- clocksource_probe();
-}
--
2.7.4
... don't rely on cpuinfo populated in arc boot code. This paves way for
moving this code in drivers/clocksource/
And while at it, convert the WARN() to pr_warn() as sugested by Daniel
Signed-off-by: Vineet Gupta <[email protected]>
---
arch/arc/kernel/time.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 8d66bb446209..d3f3750a0d2d 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -111,11 +111,14 @@ static struct clocksource arc_counter_gfrc = {
static int __init arc_cs_setup_gfrc(struct device_node *node)
{
- int exists = cpuinfo_arc700[0].extn.gfrc;
+ struct mcip_bcr mp;
int ret;
- if (WARN(!exists, "Global-64-bit-Ctr clocksource not detected"))
+ READ_BCR(ARC_REG_MCIP_BCR, mp);
+ if (!mp.gfrc) {
+ pr_warn("Global-64-bit-Ctr clocksource not detected");
return -ENXIO;
+ }
ret = arc_get_timer_clk(node);
if (ret)
@@ -163,15 +166,20 @@ static struct clocksource arc_counter_rtc = {
static int __init arc_cs_setup_rtc(struct device_node *node)
{
- int exists = cpuinfo_arc700[smp_processor_id()].extn.rtc;
+ struct bcr_timer timer;
int ret;
- if (WARN(!exists, "Local-64-bit-Ctr clocksource not detected"))
+ READ_BCR(ARC_REG_TIMERS_BCR, timer);
+ if (!timer.rtc) {
+ pr_warn("Local-64-bit-Ctr clocksource not detected");
return -ENXIO;
+ }
/* Local to CPU hence not usable in SMP */
- if (WARN(IS_ENABLED(CONFIG_SMP), "Local-64-bit-Ctr not usable in SMP"))
+ if (IS_ENABLED(CONFIG_SMP)) {
+ pr_warn("Local-64-bit-Ctr not usable in SMP");
return -EINVAL;
+ }
ret = arc_get_timer_clk(node);
if (ret)
--
2.7.4
On Fri, Nov 11, 2016 at 01:38:52PM -0800, Vineet Gupta wrote:
> This adds support for
>
> - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP
> from @CNT to @LIMIT, before optionally triggering an interrupt.
> These are programmed using ARC auxiliary register interface.
> These are present in all ARC cores (ARC700 and ARC HS38)
> TIMER0 serves as clockevent for all ARC linux builds.
> TIMER1 is used for clocksource in arc700 builds.
>
> - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in
> ARC HS38 cores. These are independnet IP blocks with different
> programming model respectively.
>
> Signed-off-by: Vineet Gupta <[email protected]>
> ---
Acked-by: Daniel Lezcano <[email protected]>
On 11/11/2016 03:11 PM, Daniel Lezcano wrote:
> On Fri, Nov 11, 2016 at 01:38:52PM -0800, Vineet Gupta wrote:
>> This adds support for
>>
>> - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP
>> from @CNT to @LIMIT, before optionally triggering an interrupt.
>> These are programmed using ARC auxiliary register interface.
>> These are present in all ARC cores (ARC700 and ARC HS38)
>> TIMER0 serves as clockevent for all ARC linux builds.
>> TIMER1 is used for clocksource in arc700 builds.
>>
>> - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in
>> ARC HS38 cores. These are independnet IP blocks with different
>> programming model respectively.
>>
>> Signed-off-by: Vineet Gupta <[email protected]>
>> ---
>
> Acked-by: Daniel Lezcano <[email protected]>
>
Thx Daniel. So I suppose for 4.10, I will get these merged, including the
driver/clocksource bits. OK ?
-Vineet
On 12/11/2016 11:19, Daniel Lezcano wrote:
> Yes.
>
>
> Le 12 nov. 2016 1:53 AM, "Vineet Gupta" <[email protected]
> <mailto:[email protected]>> a écrit :
>
> On 11/11/2016 03:11 PM, Daniel Lezcano wrote:
> > On Fri, Nov 11, 2016 at 01:38:52PM -0800, Vineet Gupta wrote:
> >> This adds support for
> >>
> >> - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP
> >> from @CNT to @LIMIT, before optionally triggering an interrupt.
> >> These are programmed using ARC auxiliary register interface.
> >> These are present in all ARC cores (ARC700 and ARC HS38)
> >> TIMER0 serves as clockevent for all ARC linux builds.
> >> TIMER1 is used for clocksource in arc700 builds.
> >>
> >> - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in
> >> ARC HS38 cores. These are independnet IP blocks with different
> >> programming model respectively.
> >>
> >> Signed-off-by: Vineet Gupta <[email protected]
> <mailto:[email protected]>>
> >> ---
> >
> > Acked-by: Daniel Lezcano <[email protected]
> <mailto:[email protected]>>
> >
>
>
> Thx Daniel. So I suppose for 4.10, I will get these merged,
> including the
> driver/clocksource bits. OK ?
Hi Vineet,
I just want to clarify. Do you want the entire series to go through my
tree ? Or through your tree ?
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On 11/15/2016 02:30 AM, Daniel Lezcano wrote:
>> Thx Daniel. So I suppose for 4.10, I will get these merged,
>> > including the
>> > driver/clocksource bits. OK ?
> Hi Vineet,
>
> I just want to clarify. Do you want the entire series to go through my
> tree ? Or through your tree ?
I'd prefer my tree ! FWIW per our last agreement, I already pushed it to my
for-next :-)
-Vineet
On Tue, Nov 15, 2016 at 09:16:44AM -0800, Vineet Gupta wrote:
> On 11/15/2016 02:30 AM, Daniel Lezcano wrote:
> >> Thx Daniel. So I suppose for 4.10, I will get these merged,
> >> > including the
> >> > driver/clocksource bits. OK ?
> > Hi Vineet,
> >
> > I just want to clarify. Do you want the entire series to go through my
> > tree ? Or through your tree ?
>
> I'd prefer my tree ! FWIW per our last agreement, I already pushed it to my
> for-next :-)
Ok, that's what I understood. So it is fine.
Do you mind to pick Noam's series in your tree also ? I acked the patches.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
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On 11/15/2016 09:23 AM, Daniel Lezcano wrote:
> On Tue, Nov 15, 2016 at 09:16:44AM -0800, Vineet Gupta wrote:
>> On 11/15/2016 02:30 AM, Daniel Lezcano wrote:
>>>> Thx Daniel. So I suppose for 4.10, I will get these merged,
>>>>> including the
>>>>> driver/clocksource bits. OK ?
>>> Hi Vineet,
>>>
>>> I just want to clarify. Do you want the entire series to go through my
>>> tree ? Or through your tree ?
>>
>> I'd prefer my tree ! FWIW per our last agreement, I already pushed it to my
>> for-next :-)
>
> Ok, that's what I understood. So it is fine.
>
> Do you mind to pick Noam's series in your tree also ? I acked the patches.
Sure I can. Although for some reasons I was never CC'ed (nor was linus-snps-arc)
for the series per se. Noam do you mind reposting the series (with Daniel's Ack to
linus-snps-arc) and I can pick it up from there ?
-vineet
On Tue, Nov 15, 2016 at 05:42:22PM +0000, Noam Camus wrote:
> > Sent: Tuesday, November 15, 2016 7:27 PM
>
> > To: Daniel Lezcano
>
> >>
> >> Do you mind to pick Noam's series in your tree also ? I acked the patches.
>
> >Sure I can. Although for some reasons I was never CC'ed (nor was linus-snps-arc)
> >for the series per se. Noam do you mind reposting the series (with Daniel's Ack to
> >linus-snps-arc) and I can pick it up from there ?
>
> Daniel please Ack my series and CC [email protected]
> This way Vineet can take the series into his tree.
I believe the request was for you.
--
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On Tue, Nov 15, 2016 at 06:05:32PM +0000, Noam Camus wrote:
> >From: Daniel Lezcano <[email protected]>
>
> >Sent: Tuesday, November 15, 2016 7:49 PM
>
> > I believe the request was for you.
> Indeed it was.
>
> However no formal Ack was made by you. Since I got no tree I preferred that
> you will take the series into your tree instead of getting your ack. Now
> that Vineet is helping I got an alternative. I will add "acked-by" in your
> name in each of my patches (V7) and reply-all + CC to linux-snps-arc
It will be simpler for Vineet and for the review process to resend the v7 with my
acked-by prefixed with [RESEND PATCH v7 x/3].
> Many Thanks for your review Bye till next time Noam
You are welcome.
-- Daniel
--
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