2016-11-17 08:12:35

by Y.T. Tang

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Subject: [PATCH 1/2] dt-bindings: ahci-fsl-qoriq: added explanation for reg-names

From: Tang Yuantian <[email protected]>

Added explanation for reg-names to make it more clear.

Signed-off-by: Tang Yuantian <[email protected]>
---
Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt | 2 ++
1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
index fc33ca0..80cf10c 100644
--- a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
@@ -10,6 +10,8 @@ Required properties:
Optional properties:
- dma-coherent: Enable AHCI coherent DMA operation.
- reg-names: register area names when there are more than 1 register area.
+ example: 'ahci' is for sata controller register.
+ 'sata-ecc' is for sata ecc register.

Examples:
sata@3200000 {
--
2.1.0.27.g96db324


2016-11-17 08:12:45

by Y.T. Tang

[permalink] [raw]
Subject: [PATCH 2/2] arm64: dts: updated sata node on ls1046a dts

From: Tang Yuantian <[email protected]>

On ls1046a soc, sata ecc should be disabled. So added sata ecc
register address so that driver can get this information.

Signed-off-by: Tang Yuantian <[email protected]>
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 38806ca..88aaaf1 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -507,7 +507,9 @@

sata: sata@3200000 {
compatible = "fsl,ls1046a-ahci";
- reg = <0x0 0x3200000 0x0 0x10000>;
+ reg = <0x0 0x3200000 0x0 0x10000>,
+ <0x0 0x20140520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
};
--
2.1.0.27.g96db324

2016-11-18 14:23:49

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH 1/2] dt-bindings: ahci-fsl-qoriq: added explanation for reg-names

On Thu, Nov 17, 2016 at 03:59:19PM +0800, [email protected] wrote:
> From: Tang Yuantian <[email protected]>
>
> Added explanation for reg-names to make it more clear.
>
> Signed-off-by: Tang Yuantian <[email protected]>
> ---
> Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
> index fc33ca0..80cf10c 100644
> --- a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
> +++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
> @@ -10,6 +10,8 @@ Required properties:
> Optional properties:
> - dma-coherent: Enable AHCI coherent DMA operation.
> - reg-names: register area names when there are more than 1 register area.
> + example: 'ahci' is for sata controller register.
> + 'sata-ecc' is for sata ecc register.

This is not an example, but should be exactly what names are used.

When is there more than one area? That should be defined by the
compatible string and spelled out here.

Rob

2016-12-30 02:36:20

by Shawn Guo

[permalink] [raw]
Subject: Re: [PATCH 2/2] arm64: dts: updated sata node on ls1046a dts

On Thu, Nov 17, 2016 at 03:59:20PM +0800, [email protected] wrote:
> From: Tang Yuantian <[email protected]>
>
> On ls1046a soc, sata ecc should be disabled. So added sata ecc

disabled or enabled?

Shawn

> register address so that driver can get this information.
>
> Signed-off-by: Tang Yuantian <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index 38806ca..88aaaf1 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -507,7 +507,9 @@
>
> sata: sata@3200000 {
> compatible = "fsl,ls1046a-ahci";
> - reg = <0x0 0x3200000 0x0 0x10000>;
> + reg = <0x0 0x3200000 0x0 0x10000>,
> + <0x0 0x20140520 0x0 0x4>;
> + reg-names = "ahci", "sata-ecc";
> interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clockgen 4 1>;
> };
> --
> 2.1.0.27.g96db324
>