2017-03-15 11:40:41

by Philipp Tomsich

[permalink] [raw]
Subject: [PATCH] clk: sunxi-ng: Fix div/mult settings for osc12M on A64

The mult/div for osc12M was previously backwards (giving a 48M rate
for osc12M). Fix it.

X-AffectedPlatforms: A64-uQ7
Signed-off-by: Philipp Tomsich <[email protected]>
Tested-by: Christoph Muellner <[email protected]>

Cc: Maxime Ripard <[email protected]>
---

drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index e3c084c..f54114c 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -566,7 +566,7 @@ static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu",
0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT);

/* Fixed Factor clocks */
-static CLK_FIXED_FACTOR(osc12M_clk, "osc12M", "osc24M", 1, 2, 0);
+static CLK_FIXED_FACTOR(osc12M_clk, "osc12M", "osc24M", 2, 1, 0);

/* We hardcode the divider to 4 for now */
static CLK_FIXED_FACTOR(pll_audio_clk, "pll-audio",
--
1.9.1


2017-03-20 09:30:15

by Maxime Ripard

[permalink] [raw]
Subject: Re: [PATCH] clk: sunxi-ng: Fix div/mult settings for osc12M on A64

On Wed, Mar 15, 2017 at 12:23:58PM +0100, Philipp Tomsich wrote:
> The mult/div for osc12M was previously backwards (giving a 48M rate
> for osc12M). Fix it.
>
> X-AffectedPlatforms: A64-uQ7
> Signed-off-by: Philipp Tomsich <[email protected]>
> Tested-by: Christoph Muellner <[email protected]>
>
> Cc: Maxime Ripard <[email protected]>

I dropped your extra tag, and queued it for 4.11, thanks!
Maxime

--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com


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