This series try to support i2c/spi/pwm/saradc/pmic/watchdog
on rockchip rv1108 soc.
As the clk tree part has been taken from Elaine's series, so
this part will be not included in my series from this version.
This version has no more changes, except the pwm dt-bindings
followed by Rob's suggestion, and the Acked-by from Rob of other
dt-bindings.
Changes in v3:
- remove the clk tree part
- make the compatible string be: "rockchip,rv1108-pwm", "rockchip,rk3288-pwm"
for rv1108 pwm
Changes in v2:
- add compatible string "rockchip,rv1108-pwm"
- add compatible string "rockchip,rv1108-saradc"
Andy Yan (13):
dt-bindings: i2c: rk3x: add support for rv1108
i2c: rk3x: add support for rv1108
ARM: dts: rockchip: add i2c dt node for rv1108
spi: rockchip: add compatible string for rv1108 spi
ARM: dts: rockchip: add spi dt node for rv1108
dt-bindings: pwm: add description for rv1108 pwm
ARM: dts: rockchip: add pwm dt node for rv1108
ARM: dts: rockchip: add watchdog dt node for rv1108
dt-bindings: adc: add description for rv1108 saradc
ARM: dts: rockchip: add saradc support for rv1108
ARM: dts: rockchip: add pwm backlight for rv1108 evb
ARM: dts: rockchip: add pmic rk805 dt node for rv1108 evb
ARM: dts: rockchip: add accelerometer bma250e dt node for rv1108 evb
Documentation/devicetree/bindings/i2c/i2c-rk3x.txt | 1 +
.../bindings/iio/adc/rockchip-saradc.txt | 1 +
.../devicetree/bindings/pwm/pwm-rockchip.txt | 3 +-
.../devicetree/bindings/spi/spi-rockchip.txt | 1 +
arch/arm/boot/dts/rv1108-evb.dts | 158 +++++++++++++
arch/arm/boot/dts/rv1108.dtsi | 249 +++++++++++++++++++++
drivers/i2c/busses/i2c-rk3x.c | 9 +
drivers/spi/spi-rockchip.c | 1 +
8 files changed, 422 insertions(+), 1 deletion(-)
--
2.7.4
Add dt Document for i2c controller on rv1108
Signed-off-by: Andy Yan <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/i2c/i2c-rk3x.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
index e18445d..22f2eeb 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
@@ -7,6 +7,7 @@ Required properties :
- reg : Offset and length of the register set for the device
- compatible: should be one of the following:
+ - "rockchip,rv1108-i2c": for rv1108
- "rockchip,rk3066-i2c": for rk3066
- "rockchip,rk3188-i2c": for rk3188
- "rockchip,rk3228-i2c": for rk3228
--
2.7.4
Support for the i2c controller on rv1108 soc.
Signed-off-by: Andy Yan <[email protected]>
Reviewed-by: Heiko Stuebner <[email protected]>
---
Changes in v3: None
Changes in v2: None
drivers/i2c/busses/i2c-rk3x.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
index df22066..fe23457 100644
--- a/drivers/i2c/busses/i2c-rk3x.c
+++ b/drivers/i2c/busses/i2c-rk3x.c
@@ -1131,6 +1131,11 @@ static const struct i2c_algorithm rk3x_i2c_algorithm = {
.functionality = rk3x_i2c_func,
};
+static const struct rk3x_i2c_soc_data rv1108_soc_data = {
+ .grf_offset = -1,
+ .calc_timings = rk3x_i2c_v1_calc_timings,
+};
+
static const struct rk3x_i2c_soc_data rk3066_soc_data = {
.grf_offset = 0x154,
.calc_timings = rk3x_i2c_v0_calc_timings,
@@ -1158,6 +1163,10 @@ static const struct rk3x_i2c_soc_data rk3399_soc_data = {
static const struct of_device_id rk3x_i2c_match[] = {
{
+ .compatible = "rockchip,rv1108-i2c",
+ .data = (void *)&rv1108_soc_data
+ },
+ {
.compatible = "rockchip,rk3066-i2c",
.data = (void *)&rk3066_soc_data
},
--
2.7.4
There are four i2c controllers on rv1108, add
device tree node for them.
Signed-off-by: Andy Yan <[email protected]>
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rv1108.dtsi | 72 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 72 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 8377eb9..663f2f2 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -52,6 +52,10 @@
interrupt-parent = <&gic>;
aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -154,11 +158,67 @@
status = "disabled";
};
+ i2c1: i2c@10240000 {
+ compatible = "rockchip,rv1108-i2c";
+ reg = <0x10240000 0x1000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
+ clock-names = "i2c", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_xfer>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@10250000 {
+ compatible = "rockchip,rv1108-i2c";
+ reg = <0x10250000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
+ clock-names = "i2c", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2m1_xfer>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@10260000 {
+ compatible = "rockchip,rv1108-i2c";
+ reg = <0x10260000 0x1000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
+ clock-names = "i2c", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_xfer>;
+ status = "disabled";
+ };
+
grf: syscon@10300000 {
compatible = "rockchip,rv1108-grf", "syscon";
reg = <0x10300000 0x1000>;
};
+ i2c0: i2c@20000000 {
+ compatible = "rockchip,rv1108-i2c";
+ reg = <0x20000000 0x1000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru SCLK_I2C0_PMU>, <&cru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ status = "disabled";
+ };
+
pmugrf: syscon@20060000 {
compatible = "rockchip,rv1108-pmugrf", "syscon";
reg = <0x20060000 0x1000>;
@@ -343,6 +403,18 @@
input-enable;
};
+ pcfg_pull_none_smt: pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ };
+
+ i2c0 {
+ i2c0_xfer: i2c0-xfer {
+ rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>,
+ <0 RK_PB2 RK_FUNC_1 &pcfg_pull_none_smt>;
+ };
+ };
+
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins = <2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>,
--
2.7.4
The spi on rv1108 is the same as other rockchip based
socs, add compatible string for it.
Signed-off-by: Andy Yan <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/spi/spi-rockchip.txt | 1 +
drivers/spi/spi-rockchip.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.txt b/Documentation/devicetree/bindings/spi/spi-rockchip.txt
index 83da493..6e3ffac 100644
--- a/Documentation/devicetree/bindings/spi/spi-rockchip.txt
+++ b/Documentation/devicetree/bindings/spi/spi-rockchip.txt
@@ -6,6 +6,7 @@ and display controllers using the SPI communication interface.
Required Properties:
- compatible: should be one of the following.
+ "rockchip,rv1108-spi" for rv1108 SoCs.
"rockchip,rk3036-spi" for rk3036 SoCS.
"rockchip,rk3066-spi" for rk3066 SoCs.
"rockchip,rk3188-spi" for rk3188 SoCs.
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 0b4a52b..27b4db2 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -919,6 +919,7 @@ static const struct dev_pm_ops rockchip_spi_pm = {
};
static const struct of_device_id rockchip_spi_dt_match[] = {
+ { .compatible = "rockchip,rv1108-spi", },
{ .compatible = "rockchip,rk3036-spi", },
{ .compatible = "rockchip,rk3066-spi", },
{ .compatible = "rockchip,rk3188-spi", },
--
2.7.4
Add SPI device tree node for rv1108.
Signed-off-by: Andy Yan <[email protected]>
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rv1108.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 663f2f2..b688f4a 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -200,6 +200,19 @@
status = "disabled";
};
+ spi: spi@10270000 {
+ compatible = "rockchip,rv1108-spi";
+ reg = <0x10270000 0x1000>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
+ clock-names = "spiclk", "apb_pclk";
+ dmas = <&pdma 8>, <&pdma 9>;
+ #dma-cells = <2>;
+ status = "disabled";
+ };
+
grf: syscon@10300000 {
compatible = "rockchip,rv1108-grf", "syscon";
reg = <0x10300000 0x1000>;
--
2.7.4
Add SPI device tree node for rv1108.
Signed-off-by: Andy Yan <[email protected]>
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rv1108.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 663f2f2..b688f4a 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -200,6 +200,19 @@
status = "disabled";
};
+ spi: spi@10270000 {
+ compatible = "rockchip,rv1108-spi";
+ reg = <0x10270000 0x1000>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
+ clock-names = "spiclk", "apb_pclk";
+ dmas = <&pdma 8>, <&pdma 9>;
+ #dma-cells = <2>;
+ status = "disabled";
+ };
+
grf: syscon@10300000 {
compatible = "rockchip,rv1108-grf", "syscon";
reg = <0x10300000 0x1000>;
--
2.7.4
Add device tree bindings document for pwm on
rockchip rv1108 soc.
Signed-off-by: Andy Yan <[email protected]>
---
Changes in v3:
- make the compatible string be: "rockchip,rv1108-pwm", "rockchip,rk3288-pwm"
for rv1108
Changes in v2: None
Documentation/devicetree/bindings/pwm/pwm-rockchip.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
index 2350ef9..2c5e52a 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
@@ -3,7 +3,8 @@ Rockchip PWM controller
Required properties:
- compatible: should be "rockchip,<name>-pwm"
"rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
- "rockchip,rk3288-pwm": found on RK3288 SoC
+ "rockchip,rk3288-pwm": found on RK3288 SOC
+ "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
"rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
- reg: physical base address and length of the controller's registers
- clocks: See ../clock/clock-bindings.txt
--
2.7.4
Add pwm device tree node for rv1108 soc
Signed-off-by: Andy Yan <[email protected]>
---
Changes in v3: None
Changes in v2:
- add compatible string "rockchip,rv1108-pwm"
arch/arm/boot/dts/rv1108.dtsi | 143 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 143 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index b688f4a..76a325a 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -213,6 +213,54 @@
status = "disabled";
};
+ pwm4: pwm@10280000 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x10280000 0x10>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm4_pin>;
+ clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+ clock-names = "pwm", "pclk";
+ status = "disabled";
+ };
+
+ pwm5: pwm@10280010 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x10280010 0x10>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm5_pin>;
+ clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+ clock-names = "pwm", "pclk";
+ status = "disabled";
+ };
+
+ pwm6: pwm@10280020 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x10280020 0x10>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm6_pin>;
+ clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+ clock-names = "pwm", "pclk";
+ status = "disabled";
+ };
+
+ pwm7: pwm@10280030 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x10280030 0x10>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm7_pin>;
+ clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+ clock-names = "pwm", "pclk";
+ status = "disabled";
+ };
+
grf: syscon@10300000 {
compatible = "rockchip,rv1108-grf", "syscon";
reg = <0x10300000 0x1000>;
@@ -232,6 +280,53 @@
status = "disabled";
};
+ pwm0: pwm@20040000 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x20040000 0x10>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
+ clock-names = "pwm", "pclk";
+ status = "disabled";
+ };
+
+ pwm1: pwm@20040010 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x20040010 0x10>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_pin>;
+ clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
+ clock-names = "pwm", "pclk";
+ status = "disabled";
+ };
+
+ pwm2: pwm@20040020 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x20040020 0x10>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_pin>;
+ clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
+ clock-names = "pwm", "pclk";
+ status = "disabled";
+ };
+
+ pwm3: pwm@20040030 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x20040030 0x10>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3_pin>;
+ clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
+ clock-names = "pwm", "pclk";
+ status = "disabled";
+ };
pmugrf: syscon@20060000 {
compatible = "rockchip,rv1108-pmugrf", "syscon";
reg = <0x20060000 0x1000>;
@@ -466,6 +561,54 @@
};
};
+ pwm0 {
+ pwm0_pin: pwm0-pin {
+ rockchip,pins = <0 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
+ pwm1 {
+ pwm1_pin: pwm1-pin {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
+ pwm2 {
+ pwm2_pin: pwm2-pin {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
+ pwm3 {
+ pwm3_pin: pwm3-pin {
+ rockchip,pins = <0 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
+ pwm4 {
+ pwm4_pin: pwm4-pin {
+ rockchip,pins = <1 RK_PC1 RK_FUNC_3 &pcfg_pull_none>;
+ };
+ };
+
+ pwm5 {
+ pwm5_pin: pwm5-pin {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;
+ };
+ };
+
+ pwm6 {
+ pwm6_pin: pwm6-pin {
+ rockchip,pins = <1 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;
+ };
+ };
+
+ pwm7 {
+ pwm7_pin: pwm7-pin {
+ rockchip,pins = <1 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
+ };
+ };
+
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;
--
2.7.4
Add watchdog device tree node for rv1108
Signed-off-by: Andy Yan <[email protected]>
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rv1108.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 76a325a..75a0b1e 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -266,6 +266,15 @@
reg = <0x10300000 0x1000>;
};
+ watchdog: wdt@10360000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x10360000 0x100>;
+ clocks = <&cru PCLK_WDT>;
+ clock-names = "pclk_wdt";
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
i2c0: i2c@20000000 {
compatible = "rockchip,rv1108-i2c";
reg = <0x20000000 0x1000>;
--
2.7.4
Add device tree bindings document for saradc on
rockchip rv1108 soc.
Signed-off-by: Andy Yan <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
index e0a9b9d..c2c50b5 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
@@ -6,6 +6,7 @@ Required properties:
- "rockchip,rk3066-tsadc": for rk3036
- "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
- "rockchip,rk3399-saradc": for rk3399
+ - "rockchip,rv1108-saradc", "rockchip,rk3399-saradc": for rv1108
- reg: physical base address of the controller and length of memory mapped
region.
--
2.7.4
Add saradc device tree node for rv1108 soc
Signed-off-by: Andy Yan <[email protected]>
---
Changes in v3: None
Changes in v2:
- add compatible string "rockchip,rv1108-saradc"
arch/arm/boot/dts/rv1108.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 75a0b1e..92b6005 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -275,6 +275,18 @@
status = "disabled";
};
+ adc: adc@1038c000 {
+ compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
+ reg = <0x1038c000 0x100>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #io-channel-cells = <1>;
+ io-channel-ranges;
+ clock-frequency = <1000000>;
+ clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+ clock-names = "saradc", "apb_pclk";
+ status = "disabled";
+ };
+
i2c0: i2c@20000000 {
compatible = "rockchip,rv1108-i2c";
reg = <0x20000000 0x1000>;
--
2.7.4
RV1108 EVB uses pwm0 modulate the backlight, add dt
node to enable it.
Signed-off-by: Andy Yan <[email protected]>
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rv1108-evb.dts | 43 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108-evb.dts b/arch/arm/boot/dts/rv1108-evb.dts
index 44feea7..77ce707 100644
--- a/arch/arm/boot/dts/rv1108-evb.dts
+++ b/arch/arm/boot/dts/rv1108-evb.dts
@@ -55,6 +55,49 @@
stdout-path = "serial2:1500000n8";
bootargs = "root=/dev/mtdblock2 mtdparts=spi-nor:256k@0(u-boot)ro,6m(kernel)ro,9m(rootfs),-(freedisk)";
};
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm0 0 25000 0>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+ 16 17 18 19 20 21 22 23
+ 24 25 26 27 28 29 30 31
+ 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47
+ 48 49 50 51 52 53 54 55
+ 56 57 58 59 60 61 62 63
+ 64 65 66 67 68 69 70 71
+ 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87
+ 88 89 90 91 92 93 94 95
+ 96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <200>;
+ };
+};
+
+&pwm0 {
+ status = "okay";
};
&sdmmc {
--
2.7.4
RK805 is used as the voltage regulator on rv1108 evaluation
board. Add device tree node for it.
Signed-off-by: Andy Yan <[email protected]>
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rv1108-evb.dts | 108 +++++++++++++++++++++++++++++++++++++++
1 file changed, 108 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108-evb.dts b/arch/arm/boot/dts/rv1108-evb.dts
index 77ce707..a1bd95e 100644
--- a/arch/arm/boot/dts/rv1108-evb.dts
+++ b/arch/arm/boot/dts/rv1108-evb.dts
@@ -94,6 +94,114 @@
248 249 250 251 252 253 254 255>;
default-brightness-level = <200>;
};
+
+ vcc_sys: vsys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vsys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+ i2c-scl-rising-time-ns = <275>;
+ i2c-scl-falling-time-ns = <16>;
+ clock-frequency = <400000>;
+
+ rk805: pmic@18 {
+ compatible = "rockchip,rk805";
+ reg = <0x18>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
+ rockchip,system-power-controller;
+
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc5-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+
+ regulators {
+ vdd_core: DCDC_REG1 {
+ regulator-name= "vdd_core";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-state-enabled;
+ regulator-state-uv = <900000>;
+ };
+ };
+
+ vdd_cam: DCDC_REG2 {
+ regulator-name= "vdd_cam";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-state-mem {
+ regulator-state-disabled;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name= "vcc_ddr";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-state-enabled;
+ };
+ };
+
+ vcc_io: DCDC_REG4 {
+ regulator-name= "vcc_io";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-state-enabled;
+ regulator-state-uv = <3300000>;
+ };
+ };
+
+ vdd_10: LDO_REG1 {
+ regulator-name= "vdd_10";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-state-disabled;
+ };
+ };
+
+ vcc_18: LDO_REG2 {
+ regulator-name= "vcc_18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-state-disabled;
+ };
+ };
+
+ vdd10_pmu: LDO_REG3 {
+ regulator-name= "vdd10_pmu";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-state-enabled;
+ regulator-state-uv = <1000000>;
+ };
+ };
+ };
+ };
};
&pwm0 {
--
2.7.4
Add dt node of bosch accelerometer bma250e on rv1108 evb.
Signed-off-by: Andy Yan <[email protected]>
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/rv1108-evb.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/rv1108-evb.dts b/arch/arm/boot/dts/rv1108-evb.dts
index a1bd95e..6690083 100644
--- a/arch/arm/boot/dts/rv1108-evb.dts
+++ b/arch/arm/boot/dts/rv1108-evb.dts
@@ -110,6 +110,13 @@
i2c-scl-falling-time-ns = <16>;
clock-frequency = <400000>;
+ bma250: accelerometer@19 {
+ compatible = "bosch,bma250e";
+ reg = <0x19>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PB3 IRQ_TYPE_LEVEL_LOW>;
+ };
+
rk805: pmic@18 {
compatible = "rockchip,rk805";
reg = <0x18>;
--
2.7.4
On Fri, 11 Aug 2017 11:46:20 +0800
Andy Yan <[email protected]> wrote:
> Add device tree bindings document for saradc on
> rockchip rv1108 soc.
>
> Signed-off-by: Andy Yan <[email protected]>
> Acked-by: Rob Herring <[email protected]>
I've already applied. This please drop it from the next version of the
series.
Jonathan
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
> index e0a9b9d..c2c50b5 100644
> --- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
> +++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
> @@ -6,6 +6,7 @@ Required properties:
> - "rockchip,rk3066-tsadc": for rk3036
> - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
> - "rockchip,rk3399-saradc": for rk3399
> + - "rockchip,rv1108-saradc", "rockchip,rk3399-saradc": for rv1108
>
> - reg: physical base address of the controller and length of memory mapped
> region.
Hi,
> +static const struct rk3x_i2c_soc_data rv1108_soc_data = {
> + .grf_offset = -1,
> + .calc_timings = rk3x_i2c_v1_calc_timings,
> +};
> +
I don't care super much, but why don't you reuse rk3399_soc_data()?
Or even use the rk3399 compatible as fallback value?
Kind regards,
Wolfram
> Actually, there is one I2C controller(I2C2) has a different feature with
> all the other rockchip soc.The I2C2 is not used on my current board. But I
> plan to add this feature later。 So I give RV1108 a new compatible string
> here。
Makes sense. Thanks!
On Fri, Aug 11, 2017 at 11:38:29AM +0800, Andy Yan wrote:
> Add dt Document for i2c controller on rv1108
>
> Signed-off-by: Andy Yan <[email protected]>
> Acked-by: Rob Herring <[email protected]>
>
Applied to for-next, thanks!
On Fri, Aug 11, 2017 at 11:39:13AM +0800, Andy Yan wrote:
> Support for the i2c controller on rv1108 soc.
>
> Signed-off-by: Andy Yan <[email protected]>
> Reviewed-by: Heiko Stuebner <[email protected]>
Applied to for-next, thanks!
On Fri, Aug 11, 2017 at 11:39:50AM +0800, Andy Yan wrote:
> There are four i2c controllers on rv1108, add
> device tree node for them.
>
> Signed-off-by: Andy Yan <[email protected]>
This usually needs to go via some arm tree.
Hi Andy,
Am Freitag, 11. August 2017, 11:44:06 CEST schrieb Andy Yan:
> Add device tree bindings document for pwm on
> rockchip rv1108 soc.
>
> Signed-off-by: Andy Yan <[email protected]>
I think you forgot to add Thierry ([email protected])
who is the pwm maintainer, to your binding patch.
Especially, as normally he would take this binding patch.
Heiko
Am Samstag, 12. August 2017, 16:40:47 CEST schrieb Wolfram Sang:
> On Fri, Aug 11, 2017 at 11:39:50AM +0800, Andy Yan wrote:
> > There are four i2c controllers on rv1108, add
> > device tree node for them.
> >
> > Signed-off-by: Andy Yan <[email protected]>
>
> This usually needs to go via some arm tree.
correct, and with the driver side being applied I've now also
applied this devicetree patch for 4.14
[With some slight reordering of properties]
Thanks
Heiko
Hi Andy,
Am Freitag, 11. August 2017, 11:46:51 CEST schrieb Andy Yan:
> Add saradc device tree node for rv1108 soc
>
> Signed-off-by: Andy Yan <[email protected]>
>
> + adc: adc@1038c000 {
> + compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
> + reg = <0x1038c000 0x100>;
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> + #io-channel-cells = <1>;
> + io-channel-ranges;
What do you need the io-channel-ranges for?
I.e. according to the documenation it is meant for when the adc is also
a "bus node" and has children that should inherit channels from it.
In all saradc uses so far we only have separate nodes referencing the
adc controller (like adc-keys etc), so this does not look like it is needed?
Heiko
Am Freitag, 11. August 2017, 11:45:33 CEST schrieb Andy Yan:
> Add watchdog device tree node for rv1108
>
> Signed-off-by: Andy Yan <[email protected]>
applied for 4.14
Thanks
Heiko
Am Freitag, 11. August 2017, 11:49:18 CEST schrieb Andy Yan:
> Add dt node of bosch accelerometer bma250e on rv1108 evb.
>
> Signed-off-by: Andy Yan <[email protected]>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/rv1108-evb.dts | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rv1108-evb.dts b/arch/arm/boot/dts/rv1108-evb.dts
> index a1bd95e..6690083 100644
> --- a/arch/arm/boot/dts/rv1108-evb.dts
> +++ b/arch/arm/boot/dts/rv1108-evb.dts
> @@ -110,6 +110,13 @@
> i2c-scl-falling-time-ns = <16>;
> clock-frequency = <400000>;
>
> + bma250: accelerometer@19 {
please order such things by address,
foo@19 should come after bar@18 of course
Thanks
Heiko
> + compatible = "bosch,bma250e";
> + reg = <0x19>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <RK_PB3 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
> rk805: pmic@18 {
> compatible = "rockchip,rk805";
> reg = <0x18>;
>
Hi Heiko:
On 2017年08月13日 20:13, Heiko Stuebner wrote:
> Hi Andy,
>
> Am Freitag, 11. August 2017, 11:46:51 CEST schrieb Andy Yan:
>> Add saradc device tree node for rv1108 soc
>>
>> Signed-off-by: Andy Yan <[email protected]>
>>
>> + adc: adc@1038c000 {
>> + compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
>> + reg = <0x1038c000 0x100>;
>> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
>> + #io-channel-cells = <1>;
>> + io-channel-ranges;
> What do you need the io-channel-ranges for?
> I.e. according to the documenation it is meant for when the adc is also
> a "bus node" and has children that should inherit channels from it.
>
> In all saradc uses so far we only have separate nodes referencing the
> adc controller (like adc-keys etc), so this does not look like it is needed?
Sorry, I just copied it from the downstream dts. After checked with
David, he suggested that we could remove it.
>
>
> Heiko
>
>
>
>