2017-08-11 06:55:44

by Vinay Simha B N

Subject: [PATCH 1/2] pinctrl: msm: GP clock for pinctrl-apq8064 binding

DT binding documentation for qcom,apq8064-pinctrl driver
for general purpose (GP) clocks.

Signed-off-by: Vinay Simha BN <[email protected]>
---
Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt
index a7bde64..a752a47 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt
@@ -46,7 +46,8 @@ Valid values for pins are:
gpio0-gpio89

Valid values for function are:
- cam_mclk, codec_mic_i2s, codec_spkr_i2s, gpio, gsbi1, gsbi2, gsbi3, gsbi4,
+ cam_mclk, codec_mic_i2s, codec_spkr_i2s, gp_clk_0a, gp_clk_0b, gp_clk_1a,
+ gp_clk_1b, gp_clk_2a, gp_clk_2b, gpio, gsbi1, gsbi2, gsbi3, gsbi4,
gsbi4_cam_i2c, gsbi5, gsbi5_spi_cs1, gsbi5_spi_cs2, gsbi5_spi_cs3, gsbi6,
gsbi6_spi_cs1, gsbi6_spi_cs2, gsbi6_spi_cs3, gsbi7, gsbi7_spi_cs1,
gsbi7_spi_cs2, gsbi7_spi_cs3, gsbi_cam_i2c, hdmi, mi2s, riva_bt, riva_fm,
--
2.7.4

2017-08-11 06:55:57

by Vinay Simha B N

Subject: [PATCH 2/2] pinctrl: qcom: General Purpose clocks for apq8064

Add support for general purpose (GP) clocks
for apq8064

Signed-off-by: Vinay Simha BN <[email protected]>

---
v1:
* only gp_clk_1b tested in nexus7 anx7808 slimport.
---
drivers/pinctrl/qcom/pinctrl-apq8064.c | 37 ++++++++++++++++++++++++++++------
1 file changed, 31 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-apq8064.c b/drivers/pinctrl/qcom/pinctrl-apq8064.c
index cd96699..e59ee61 100644
--- a/drivers/pinctrl/qcom/pinctrl-apq8064.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8064.c
@@ -295,6 +295,12 @@ enum apq8064_functions {
APQ_MUX_cam_mclk,
APQ_MUX_codec_mic_i2s,
APQ_MUX_codec_spkr_i2s,
+ APQ_MUX_gp_clk_0a,
+ APQ_MUX_gp_clk_0b,
+ APQ_MUX_gp_clk_1a,
+ APQ_MUX_gp_clk_1b,
+ APQ_MUX_gp_clk_2a,
+ APQ_MUX_gp_clk_2b,
APQ_MUX_gpio,
APQ_MUX_gsbi1,
APQ_MUX_gsbi2,
@@ -354,6 +360,24 @@ static const char * const gpio_groups[] = {
"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
"gpio85", "gpio86", "gpio87", "gpio88", "gpio89"
};
+static const char * const gp_clk_0a_groups[] = {
+ "gpio3"
+};
+static const char * const gp_clk_0b_groups[] = {
+ "gpio34"
+};
+static const char * const gp_clk_1a_groups[] = {
+ "gpio4"
+};
+static const char * const gp_clk_1b_groups[] = {
+ "gpio50"
+};
+static const char * const gp_clk_2a_groups[] = {
+ "gpio32"
+};
+static const char * const gp_clk_2b_groups[] = {
+ "gpio25"
+};
static const char * const ps_hold_groups[] = {
"gpio78"
};
@@ -453,6 +477,7 @@ static const struct msm_function apq8064_functions[] = {
FUNCTION(codec_mic_i2s),
FUNCTION(codec_spkr_i2s),
FUNCTION(gpio),
+ FUNCTION(gp_clk_1b),
FUNCTION(gsbi1),
FUNCTION(gsbi2),
FUNCTION(gsbi3),
@@ -490,8 +515,8 @@ static const struct msm_pingroup apq8064_groups[] = {
PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(4, NA, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(3, NA, gp_clk_0a, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(4, NA, NA, cam_mclk, gp_clk_1a, NA, NA, NA, NA, NA, NA),
PINGROUP(5, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(6, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(7, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
@@ -512,16 +537,16 @@ static const struct msm_pingroup apq8064_groups[] = {
PINGROUP(22, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(23, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(24, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(25, gsbi2, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(25, gsbi2, gp_clk_2b, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(26, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(27, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(28, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(29, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(30, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(31, mi2s, NA, gsbi5_spi_cs2, gsbi6_spi_cs2, gsbi7_spi_cs2, NA, NA, NA, NA, NA),
- PINGROUP(32, mi2s, NA, NA, NA, NA, gsbi5_spi_cs3, gsbi6_spi_cs3, gsbi7_spi_cs3, NA, NA),
+ PINGROUP(32, mi2s, gp_clk_2a, NA, NA, NA, gsbi5_spi_cs3, gsbi6_spi_cs3, gsbi7_spi_cs3, NA, NA),
PINGROUP(33, mi2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(34, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(34, codec_mic_i2s, gp_clk_0b, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(35, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(36, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(37, codec_mic_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
@@ -537,7 +562,7 @@ static const struct msm_pingroup apq8064_groups[] = {
PINGROUP(47, spkr_i2s, gsbi5_spi_cs1, gsbi6_spi_cs1, gsbi7_spi_cs1, NA, NA, NA, NA, NA, NA),
PINGROUP(48, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(49, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
- PINGROUP(50, spkr_i2s, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(50, spkr_i2s, gp_clk_1b, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(51, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(52, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(53, NA, gsbi5, NA, NA, NA, NA, NA, NA, NA, NA),
--
2.7.4

2017-08-14 15:28:52

by Bjorn Andersson

Subject: Re: [PATCH 2/2] pinctrl: qcom: General Purpose clocks for apq8064

On Thu 10 Aug 23:55 PDT 2017, Vinay Simha BN wrote:

> Add support for general purpose (GP) clocks
> for apq8064
>
> Signed-off-by: Vinay Simha BN <[email protected]>
>
> ---
> v1:
> * only gp_clk_1b tested in nexus7 anx7808 slimport.
> ---
> drivers/pinctrl/qcom/pinctrl-apq8064.c | 37 ++++++++++++++++++++++++++++------
> 1 file changed, 31 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-apq8064.c b/drivers/pinctrl/qcom/pinctrl-apq8064.c
[..]
> @@ -453,6 +477,7 @@ static const struct msm_function apq8064_functions[] = {
> FUNCTION(codec_mic_i2s),
> FUNCTION(codec_spkr_i2s),
> FUNCTION(gpio),
> + FUNCTION(gp_clk_1b),

You missed the others variants here.

Other than that this looks good. So please add the other 5 functions and
you can resend this with my Acked-by.

PS. For small incremental patches like this, feel free to send the DT
binding updates in the same patch as the driver changes.

Regards,
Bjorn

2017-08-17 15:28:13

by Rob Herring (Arm)

Subject: Re: [PATCH 1/2] pinctrl: msm: GP clock for pinctrl-apq8064 binding

On Fri, Aug 11, 2017 at 12:25:15PM +0530, Vinay Simha BN wrote:
> DT binding documentation for qcom,apq8064-pinctrl driver
> for general purpose (GP) clocks.
>
> Signed-off-by: Vinay Simha BN <[email protected]>
> ---
> Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)

Acked-by: Rob Herring <[email protected]>

2017-08-31 09:31:17

by Linus Walleij

Subject: Re: [PATCH 1/2] pinctrl: msm: GP clock for pinctrl-apq8064 binding

On Fri, Aug 11, 2017 at 8:55 AM, Vinay Simha BN <[email protected]> wrote:

> DT binding documentation for qcom,apq8064-pinctrl driver
> for general purpose (GP) clocks.
>
> Signed-off-by: Vinay Simha BN <[email protected]>

Patch applied with Rob's ACK.
I don't think Björn will mind.

Yours,
Linus Walleij