2017-08-15 17:26:24

by Scott Branden

[permalink] [raw]
Subject: [PATCH 0/6] ARM: dts: cygnus dts updates

This patch series is a collection of patches for the Cygnus SoC dts files.

Jason Uy (1):
ARM: dts: cygnus: Enable Performance Monitoring Unit

Jonathan Richardson (1):
ARM: dts: cygnus: Add additional peripherals to dtsi

Raveendra Padasalagi (1):
ARM: dts: cygnus: Add generic-ehci/ohci nodes

Ray Jui (1):
ARM: dts: cygnus: Fix incorrect UART2 register base

Scott Branden (2):
ARM: dts: cygnus: place v3d in proper address ordered location
ARM: dts: cygnus: add serial0 alias for uart3 on bcm91130_entphn

arch/arm/boot/dts/bcm-cygnus.dtsi | 149 +++++++++++++++++++++++++++++----
arch/arm/boot/dts/bcm911360_entphn.dts | 7 +-
2 files changed, 140 insertions(+), 16 deletions(-)

--
2.5.0


2017-08-15 17:26:29

by Scott Branden

[permalink] [raw]
Subject: [PATCH 1/6] ARM: dts: cygnus: Fix incorrect UART2 register base

From: Ray Jui <[email protected]>

Fix incorrect Cygnus UART2 register base.

Fixes: 0f0b21a83ad2 ("ARM: dts: Move all Cygnus peripherals into axi bus")
Signed-off-by: Ray Jui <[email protected]>
Signed-off-by: Scott Branden <[email protected]>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index bf8c838..e4d07f4 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -324,7 +324,7 @@

uart2: serial@18022000 {
compatible = "snps,dw-apb-uart";
- reg = <0x18020000 0x100>;
+ reg = <0x18022000 0x100>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
--
2.5.0

2017-08-15 17:26:35

by Scott Branden

[permalink] [raw]
Subject: [PATCH 2/6] ARM: dts: cygnus: place v3d in proper address ordered location

Move v3d devicetree node to proper address ordered location in Cygnus
dtsi.

Signed-off-by: Scott Branden <[email protected]>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index e4d07f4..2077fee 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -366,6 +366,19 @@
brcm,nand-has-wp;
};

+ v3d: v3d@180a2000 {
+ compatible = "brcm,cygnus-v3d";
+ reg = <0x180a2000 0x1000>;
+ clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>;
+ clock-names = "v3d_clk";
+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ vc4: gpu {
+ compatible = "brcm,cygnus-vc4";
+ };
+
gpio_asiu: gpio@180a5000 {
compatible = "brcm,cygnus-asiu-gpio";
reg = <0x180a5000 0x668>;
@@ -444,19 +457,6 @@
status = "disabled";
};

- v3d: v3d@180a2000 {
- compatible = "brcm,cygnus-v3d";
- reg = <0x180a2000 0x1000>;
- clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>;
- clock-names = "v3d_clk";
- interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- vc4: gpu {
- compatible = "brcm,cygnus-vc4";
- };
-
adc: adc@180a6000 {
compatible = "brcm,iproc-static-adc";
#io-channel-cells = <1>;
--
2.5.0

2017-08-15 17:26:40

by Scott Branden

[permalink] [raw]
Subject: [PATCH 3/6] ARM: dts: cygnus: Enable Performance Monitoring Unit

From: Jason Uy <[email protected]>

Add PMU capability to Cygnus so trace and performance profiling
can be used.

Signed-off-by: Jason Uy <[email protected]>
Signed-off-by: Scott Branden <[email protected]>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 2077fee..bc08987 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -55,6 +55,11 @@

/include/ "bcm-cygnus-clock.dtsi"

+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
core {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x1000000>;
--
2.5.0

2017-08-15 17:26:45

by Scott Branden

[permalink] [raw]
Subject: [PATCH 4/6] ARM: dts: cygnus: Add additional peripherals to dtsi

From: Jonathan Richardson <[email protected]>

Add nodes for peripherals in Cygnus dtsi: sdhci, keypad, spi, dma,
pinmux configs.

Signed-off-by: Jonathan Richardson <[email protected]>
Signed-off-by: Scott Branden <[email protected]>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 102 ++++++++++++++++++++++++++++++++++++++
1 file changed, 102 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index bc08987..306b04c 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -124,6 +124,21 @@
compatible = "brcm,cygnus-pinmux";
reg = <0x0301d0c8 0x30>,
<0x0301d24c 0x2c>;
+
+ spi_0: spi_0 {
+ function = "spi0";
+ groups = "spi0_grp";
+ };
+
+ spi_1: spi_1 {
+ function = "spi1";
+ groups = "spi1_grp";
+ };
+
+ spi_2: spi_2 {
+ function = "spi2";
+ groups = "spi2_grp";
+ };
};

mailbox: mailbox@03024024 {
@@ -305,6 +320,23 @@
};
};

+ dma0: dma@18018000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x18018000 0x1000>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&apb_clk>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ };
+
uart0: serial@18020000 {
compatible = "snps,dw-apb-uart";
reg = <0x18020000 0x100>;
@@ -349,6 +381,52 @@
status = "disabled";
};

+ spi0: spi@18028000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x18028000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&spi_0>;
+ clocks = <&axi81_clk>;
+ clock-names = "apb_pclk";
+ status = "disabled";
+ };
+
+ spi1: spi@18029000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x18029000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&spi_1>;
+ clocks = <&axi81_clk>;
+ clock-names = "apb_pclk";
+ status = "disabled";
+ };
+
+ spi2: spi@1802a000 {
+ compatible = "arm,pl022", "arm,primecell";
+ reg = <0x1802a000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&spi_2>;
+ clocks = <&axi81_clk>;
+ clock-names = "apb_pclk";
+ status = "disabled";
+ };
+
+ sdhci0: sdhci@18041000 {
+ compatible = "brcm,sdhci-iproc-cygnus";
+ reg = <0x18041000 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lcpll0 BCM_CYGNUS_LCPLL0_SDIO_CLK>;
+ bus-width = <4>;
+ sdhci,auto-cmd12;
+ status = "disabled";
+ };
+
eth0: ethernet@18042000 {
compatible = "brcm,amac";
reg = <0x18042000 0x1000>,
@@ -358,6 +436,16 @@
status = "disabled";
};

+ sdhci1: sdhci@18043000 {
+ compatible = "brcm,sdhci-iproc-cygnus";
+ reg = <0x18043000 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&lcpll0 BCM_CYGNUS_LCPLL0_SDIO_CLK>;
+ bus-width = <4>;
+ sdhci,auto-cmd12;
+ status = "disabled";
+ };
+
nand: nand@18046000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x18046000 0x600>, <0xf8105408 0x600>,
@@ -472,5 +560,19 @@
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
+
+ keypad: keypad@180ac000 {
+ compatible = "brcm,bcm-keypad";
+ reg = <0x180ac000 0x14c>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&asiu_clks BCM_CYGNUS_ASIU_KEYPAD_CLK>;
+ clock-names = "peri_clk";
+ clock-frequency = <31250>;
+ pull-up-enabled;
+ col-debounce-filter-period = <0>;
+ status-debounce-filter-period = <0>;
+ row-output-enabled;
+ status = "disabled";
+ };
};
};
--
2.5.0

2017-08-15 17:26:50

by Scott Branden

[permalink] [raw]
Subject: [PATCH 5/6] ARM: dts: cygnus: add serial0 alias for uart3 on bcm91130_entphn

Use serial0 alias to select stdout-path on Cygnus bcm911360_entphon
board.

Signed-off-by: Scott Branden <[email protected]>
---
arch/arm/boot/dts/bcm911360_entphn.dts | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts
index 000f5f1..53f990d 100644
--- a/arch/arm/boot/dts/bcm911360_entphn.dts
+++ b/arch/arm/boot/dts/bcm911360_entphn.dts
@@ -39,9 +39,12 @@
model = "Cygnus Enterprise Phone (BCM911360_ENTPHN)";
compatible = "brcm,bcm11360", "brcm,cygnus";

+ aliases {
+ serial0 = &uart3;
+ };
+
chosen {
- stdout-path = &uart3;
- bootargs = "console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
};

gpio_keys {
--
2.5.0

2017-08-15 17:26:58

by Scott Branden

[permalink] [raw]
Subject: [PATCH 6/6] ARM: dts: cygnus: Add generic-ehci/ohci nodes

From: Raveendra Padasalagi <[email protected]>

Add dt nodes for generic-ehci/ohci host controller.

Signed-off-by: Raveendra Padasalagi <[email protected]>
Signed-off-by: Scott Branden <[email protected]>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 306b04c..7c957ea 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -459,6 +459,20 @@
brcm,nand-has-wp;
};

+ ehci0: usb@18048000 {
+ compatible = "generic-ehci";
+ reg = <0x18048000 0x100>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ ohci0: usb@18048800 {
+ compatible = "generic-ohci";
+ reg = <0x18048800 0x100>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
v3d: v3d@180a2000 {
compatible = "brcm,cygnus-v3d";
reg = <0x180a2000 0x1000>;
--
2.5.0

2017-08-15 18:24:07

by Eric Anholt

[permalink] [raw]
Subject: Re: [PATCH 2/6] ARM: dts: cygnus: place v3d in proper address ordered location

Scott Branden <[email protected]> writes:

> Move v3d devicetree node to proper address ordered location in Cygnus
> dtsi.
>
> Signed-off-by: Scott Branden <[email protected]>

Reviewed-by: Eric Anholt <[email protected]>


Attachments:
signature.asc (832.00 B)

2017-08-15 18:24:21

by Eric Anholt

[permalink] [raw]
Subject: Re: [PATCH 1/6] ARM: dts: cygnus: Fix incorrect UART2 register base

Scott Branden <[email protected]> writes:

> From: Ray Jui <[email protected]>
>
> Fix incorrect Cygnus UART2 register base.
>
> Fixes: 0f0b21a83ad2 ("ARM: dts: Move all Cygnus peripherals into axi bus")
> Signed-off-by: Ray Jui <[email protected]>
> Signed-off-by: Scott Branden <[email protected]>

Reviewed-by: Eric Anholt <[email protected]>


Attachments:
signature.asc (832.00 B)

2017-08-17 17:14:19

by Florian Fainelli

[permalink] [raw]
Subject: Re: [PATCH 0/6] ARM: dts: cygnus dts updates

On 08/15/2017 10:25 AM, Scott Branden wrote:
> This patch series is a collection of patches for the Cygnus SoC dts files.
>
> Jason Uy (1):
> ARM: dts: cygnus: Enable Performance Monitoring Unit
>
> Jonathan Richardson (1):
> ARM: dts: cygnus: Add additional peripherals to dtsi
>
> Raveendra Padasalagi (1):
> ARM: dts: cygnus: Add generic-ehci/ohci nodes
>
> Ray Jui (1):
> ARM: dts: cygnus: Fix incorrect UART2 register base
>
> Scott Branden (2):
> ARM: dts: cygnus: place v3d in proper address ordered location
> ARM: dts: cygnus: add serial0 alias for uart3 on bcm91130_entphn

Series applied, thanks!
--
Florian