From: Liang Chen <[email protected]>
1. enalbe sdio/sdmmc/emmc.
2. enable cpufreq.
Liang Chen (3):
arm64: dts: rockchip: add mmc nodes for rk3328 evaluation board
cpufreq: rockchip: add support for rk3328 soc
arm64: dts: rockchip: add cpu regulator for rk3328 evaluation board
arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 78 +++++++++++++++++++++++++++++
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
2 files changed, 79 insertions(+)
--
1.9.1
From: Liang Chen <[email protected]>
Add compatible rockchip,rk3328 to the machines table to
launch cpufreq-dt driver for rk3328 soc.
Signed-off-by: Liang Chen <[email protected]>
---
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index 1c26292..f16c3ba 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -76,6 +76,7 @@
{ .compatible = "rockchip,rk3188", },
{ .compatible = "rockchip,rk3228", },
{ .compatible = "rockchip,rk3288", },
+ { .compatible = "rockchip,rk3328", },
{ .compatible = "rockchip,rk3366", },
{ .compatible = "rockchip,rk3368", },
{ .compatible = "rockchip,rk3399", },
--
1.9.1
From: Liang Chen <[email protected]>
RK3328 Evaluation Board use rk805 pmic, and one of the DCDCs in
rk805 is for cpu regulator, assign the cpu regulator, so the
cpufreq can work fine.
Signed-off-by: Liang Chen <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 479f9d9..b0658f4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -96,6 +96,10 @@
};
};
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
--
1.9.1
From: Liang Chen <[email protected]>
Rockchip's rk3328 evaluation board has 3 mmc controllers for
sdio/sdmmc/emmc, let's enable them.
Signed-off-by: Liang Chen <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 74 +++++++++++++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
index 86605ae..479f9d9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
@@ -60,6 +60,20 @@
regulator-max-microvolt = <12000000>;
};
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
+ };
+
vcc_sys: vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
@@ -69,6 +83,29 @@
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_12v>;
};
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0m1_gpio>;
+ regulator-name = "vcc_sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_io>;
+ };
+};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ supports-emmc;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ status = "okay";
};
&i2c1 {
@@ -186,6 +223,43 @@
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins =
+ <1 18 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdio {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ max-frequency = <150000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
+ supports-sdio;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <150000000>;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+ supports-sd;
+ vmmc-supply = <&vcc_sd>;
+ status = "okay";
};
&tsadc {
--
1.9.1
On 2017/8/23 16:40, [email protected] wrote:
> From: Liang Chen <[email protected]>
>
> Rockchip's rk3328 evaluation board has 3 mmc controllers for
> sdio/sdmmc/emmc, let's enable them.
>
> Signed-off-by: Liang Chen <[email protected]>
> ---
> arch/arm64/boot/dts/rockchip/rk3328-evb.dts | 74 +++++++++++++++++++++++++++++
> 1 file changed, 74 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> index 86605ae..479f9d9 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3328-evb.dts
> @@ -60,6 +60,20 @@
> regulator-max-microvolt = <12000000>;
> };
>
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_enable_h>;
> +
> + /*
> + * On the module itself this is one of these (depending
> + * on the actual card populated):
> + * - SDIO_RESET_L_WL_REG_ON
> + * - PDN (power down when low)
> + */
> + reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
> + };
> +
> vcc_sys: vcc-sys {
> compatible = "regulator-fixed";
> regulator-name = "vcc_sys";
> @@ -69,6 +83,29 @@
> regulator-max-microvolt = <5000000>;
> vin-supply = <&dc_12v>;
> };
> +
> + vcc_sd: sdmmc-regulator {
> + compatible = "regulator-fixed";
> + gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc0m1_gpio>;
> + regulator-name = "vcc_sd";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_io>;
> + };
> +};
> +
> +&emmc {
> + bus-width = <8>;
> + cap-mmc-highspeed;
> + supports-emmc;
> + disable-wp;
Please remove supports-{emmc,sd, sdio} for all mmc node.
And disable-wp is for SD *only*.
> + non-removable;
> + num-slots = <1>;
num-slots is deprecated.
> + pinctrl-names = "default";
> + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
> + status = "okay";
> };
>
> &i2c1 {
> @@ -186,6 +223,43 @@
> rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
> };
> };
> +
> + sdio-pwrseq {
> + wifi_enable_h: wifi-enable-h {
> + rockchip,pins =
> + <1 18 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +};
> +
> +&sdio {
> + bus-width = <4>;
> + cap-sd-highspeed;
> + cap-sdio-irq;
> + disable-wp;
Ditto
> + keep-power-in-suspend;
> + max-frequency = <150000000>;
> + mmc-pwrseq = <&sdio_pwrseq>;
> + non-removable;
> + num-slots = <1>;
Ditto
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
> + supports-sdio;
Ditto
> + status = "okay";
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + cap-mmc-highspeed;
> + cap-sd-highspeed;
Ditto
> + disable-wp;
> + max-frequency = <150000000>;
> + num-slots = <1>;
Ditto
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
> + supports-sd;
Ditto
> + vmmc-supply = <&vcc_sd>;
> + status = "okay";
> };
>
> &tsadc {
>
On 23-08-17, 16:40, [email protected] wrote:
> From: Liang Chen <[email protected]>
>
> Add compatible rockchip,rk3328 to the machines table to
> launch cpufreq-dt driver for rk3328 soc.
>
> Signed-off-by: Liang Chen <[email protected]>
> ---
> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
> index 1c26292..f16c3ba 100644
> --- a/drivers/cpufreq/cpufreq-dt-platdev.c
> +++ b/drivers/cpufreq/cpufreq-dt-platdev.c
> @@ -76,6 +76,7 @@
> { .compatible = "rockchip,rk3188", },
> { .compatible = "rockchip,rk3228", },
> { .compatible = "rockchip,rk3288", },
> + { .compatible = "rockchip,rk3328", },
> { .compatible = "rockchip,rk3366", },
> { .compatible = "rockchip,rk3368", },
> { .compatible = "rockchip,rk3399", },
Acked-by: Viresh Kumar <[email protected]>
--
viresh