According to LS1021A RM, the value of PAL can be set so that the start of the
IP header in the receive data buffer is aligned to a 32-bit boundary. Normally,
setting PAL = 2 provides minimal padding to ensure such alignment of the IP
header.
However every incoming packet's 8-byte time stamp will be inserted into the
packet data buffer as padding alignment bytes when hardware time stamping is
enabled.
So we set the padding 8+2 here to avoid the flooded alignment faults:
root@128:~# cat /proc/cpu/alignment
User: 0
System: 17539 (inet_gro_receive+0x114/0x2c0)
Skipped: 0
Half: 0
Word: 0
DWord: 0
Multi: 17539
User faults: 2 (fixup)
Also shown when exception report enablement
CPU: 0 PID: 161 Comm: irq/66-eth1_g0_ Not tainted 4.1.21-rt13-WR8.0.0.0_preempt-rt #16
Hardware name: Freescale LS1021A
[<8001b420>] (unwind_backtrace) from [<8001476c>] (show_stack+0x20/0x24)
[<8001476c>] (show_stack) from [<807cfb48>] (dump_stack+0x94/0xac)
[<807cfb48>] (dump_stack) from [<80025d70>] (do_alignment+0x720/0x958)
[<80025d70>] (do_alignment) from [<80009224>] (do_DataAbort+0x40/0xbc)
[<80009224>] (do_DataAbort) from [<80015398>] (__dabt_svc+0x38/0x60)
Exception stack(0x86ad1cc0 to 0x86ad1d08)
1cc0: f9b3e080 86b3d072 2d78d287 00000000 866816c0 86b3d05e 86e785d0 00000000
1ce0: 00000011 0000000e 80840ab0 86ad1d3c 86ad1d08 86ad1d08 806d7fc0 806d806c
1d00: 40070013 ffffffff
[<80015398>] (__dabt_svc) from [<806d806c>] (inet_gro_receive+0x114/0x2c0)
[<806d806c>] (inet_gro_receive) from [<80660eec>] (dev_gro_receive+0x21c/0x3c0)
[<80660eec>] (dev_gro_receive) from [<8066133c>] (napi_gro_receive+0x44/0x17c)
[<8066133c>] (napi_gro_receive) from [<804f0538>] (gfar_clean_rx_ring+0x39c/0x7d4)
[<804f0538>] (gfar_clean_rx_ring) from [<804f0bf4>] (gfar_poll_rx_sq+0x58/0xe0)
[<804f0bf4>] (gfar_poll_rx_sq) from [<80660b10>] (net_rx_action+0x27c/0x43c)
[<80660b10>] (net_rx_action) from [<80033638>] (do_current_softirqs+0x1e0/0x3dc)
[<80033638>] (do_current_softirqs) from [<800338c4>] (__local_bh_enable+0x90/0xa8)
[<800338c4>] (__local_bh_enable) from [<8008025c>] (irq_forced_thread_fn+0x70/0x84)
[<8008025c>] (irq_forced_thread_fn) from [<800805e8>] (irq_thread+0x16c/0x244)
[<800805e8>] (irq_thread) from [<8004e490>] (kthread+0xe8/0x104)
[<8004e490>] (kthread) from [<8000fda8>] (ret_from_fork+0x14/0x2c)
Signed-off-by: Zumeng Chen <[email protected]>
---
Hi,
This patch has been seen in arm and validated, and compile, boot, and ptpd testing passed in powerpc as well.
Not sure if it's the similar fix as fec_main.c did, all yours.
Cheers,
drivers/net/ethernet/freescale/gianfar.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
index e616b71..e47945f 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -1413,9 +1413,11 @@ static int gfar_probe(struct platform_device *ofdev)
gfar_init_addr_hash_table(priv);
- /* Insert receive time stamps into padding alignment bytes */
+ /* Insert receive time stamps into padding alignment bytes, and
+ * plus 2 bytes padding to ensure the cpu alignment.
+ */
if (priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
- priv->padding = 8;
+ priv->padding = 8 + DEFAULT_PADDING;
if (dev->features & NETIF_F_IP_CSUM ||
priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
--
2.5.0
>-----Original Message-----
>From: Zumeng Chen [mailto:[email protected]]
>Sent: Monday, December 04, 2017 5:22 AM
>To: [email protected]; [email protected]
>Cc: Claudiu Manoil <[email protected]>; [email protected]
>Subject: [PATCH 1/1] gianfar: fix a flooded alignment reports because of padding
>issue.
>
>According to LS1021A RM, the value of PAL can be set so that the start of the
>IP header in the receive data buffer is aligned to a 32-bit boundary. Normally,
>setting PAL = 2 provides minimal padding to ensure such alignment of the IP
>header.
>
>However every incoming packet's 8-byte time stamp will be inserted into the
>packet data buffer as padding alignment bytes when hardware time stamping is
>enabled.
>
>So we set the padding 8+2 here to avoid the flooded alignment faults:
>
>root@128:~# cat /proc/cpu/alignment
>User: 0
>System: 17539 (inet_gro_receive+0x114/0x2c0)
>Skipped: 0
>Half: 0
>Word: 0
>DWord: 0
>Multi: 17539
>User faults: 2 (fixup)
>
[...]
>
> drivers/net/ethernet/freescale/gianfar.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/net/ethernet/freescale/gianfar.c
>b/drivers/net/ethernet/freescale/gianfar.c
>index e616b71..e47945f 100644
>--- a/drivers/net/ethernet/freescale/gianfar.c
>+++ b/drivers/net/ethernet/freescale/gianfar.c
>@@ -1413,9 +1413,11 @@ static int gfar_probe(struct platform_device *ofdev)
>
> gfar_init_addr_hash_table(priv);
>
>- /* Insert receive time stamps into padding alignment bytes */
>+ /* Insert receive time stamps into padding alignment bytes, and
>+ * plus 2 bytes padding to ensure the cpu alignment.
>+ */
> if (priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
>- priv->padding = 8;
>+ priv->padding = 8 + DEFAULT_PADDING;
>
> if (dev->features & NETIF_F_IP_CSUM ||
> priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
>--
>2.5.0
Why handle only the rx timestamp path (HAS_TIMER) when the issue, as presented
by you, should be applicable to the default path as well?
The code change according to the patch description should be more likely:
+ priv->padding = DEFAULT_PADDING;
/* Insert receive time stamps into padding alignment bytes */
if (priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
- priv->padding = 8;
+ priv->padding += 8;
Do you have any performance numbers for this change?
Thanks,
Claudiu
On 12/05/2017 12:06 AM, Claudiu Manoil wrote:
>> -----Original Message-----
>> From: Zumeng Chen [mailto:[email protected]]
>> Sent: Monday, December 04, 2017 5:22 AM
>> To: [email protected]; [email protected]
>> Cc: Claudiu Manoil <[email protected]>; [email protected]
>> Subject: [PATCH 1/1] gianfar: fix a flooded alignment reports because of padding
>> issue.
>>
>> According to LS1021A RM, the value of PAL can be set so that the start of the
>> IP header in the receive data buffer is aligned to a 32-bit boundary. Normally,
>> setting PAL = 2 provides minimal padding to ensure such alignment of the IP
>> header.
>>
>> However every incoming packet's 8-byte time stamp will be inserted into the
>> packet data buffer as padding alignment bytes when hardware time stamping is
>> enabled.
>>
>> So we set the padding 8+2 here to avoid the flooded alignment faults:
>>
>> root@128:~# cat /proc/cpu/alignment
>> User: 0
>> System: 17539 (inet_gro_receive+0x114/0x2c0)
>> Skipped: 0
>> Half: 0
>> Word: 0
>> DWord: 0
>> Multi: 17539
>> User faults: 2 (fixup)
>>
> [...]
>> drivers/net/ethernet/freescale/gianfar.c | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/freescale/gianfar.c
>> b/drivers/net/ethernet/freescale/gianfar.c
>> index e616b71..e47945f 100644
>> --- a/drivers/net/ethernet/freescale/gianfar.c
>> +++ b/drivers/net/ethernet/freescale/gianfar.c
>> @@ -1413,9 +1413,11 @@ static int gfar_probe(struct platform_device *ofdev)
>>
>> gfar_init_addr_hash_table(priv);
>>
>> - /* Insert receive time stamps into padding alignment bytes */
>> + /* Insert receive time stamps into padding alignment bytes, and
>> + * plus 2 bytes padding to ensure the cpu alignment.
>> + */
>> if (priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
>> - priv->padding = 8;
>> + priv->padding = 8 + DEFAULT_PADDING;
>>
>> if (dev->features & NETIF_F_IP_CSUM ||
>> priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
>> --
>> 2.5.0
> Why handle only the rx timestamp path (HAS_TIMER) when the issue, as presented
> by you, should be applicable to the default path as well?
>
> The code change according to the patch description should be more likely:
>
> + priv->padding = DEFAULT_PADDING;
> /* Insert receive time stamps into padding alignment bytes */
> if (priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
> - priv->padding = 8;
> + priv->padding += 8;
En, seems more reasonable and clear, feel free to merge it if
convenience, thanks :-)
>
> Do you have any performance numbers for this change?
No performance testing since just padding issue but with
the clear sky of /proc/cpu/alignment in arm side.
Cheers,
Zumeng
>
> Thanks,
> Claudiu
On 12/05/2017 12:06 AM, Claudiu Manoil wrote:
>> -----Original Message-----
>> From: Zumeng Chen [mailto:[email protected]]
>> Sent: Monday, December 04, 2017 5:22 AM
>> To: [email protected]; [email protected]
>> Cc: Claudiu Manoil <[email protected]>; [email protected]
>> Subject: [PATCH 1/1] gianfar: fix a flooded alignment reports because of padding
>> issue.
>>
>> According to LS1021A RM, the value of PAL can be set so that the start of the
>> IP header in the receive data buffer is aligned to a 32-bit boundary. Normally,
>> setting PAL = 2 provides minimal padding to ensure such alignment of the IP
>> header.
>>
>> However every incoming packet's 8-byte time stamp will be inserted into the
>> packet data buffer as padding alignment bytes when hardware time stamping is
>> enabled.
>>
>> So we set the padding 8+2 here to avoid the flooded alignment faults:
>>
>> root@128:~# cat /proc/cpu/alignment
>> User: 0
>> System: 17539 (inet_gro_receive+0x114/0x2c0)
>> Skipped: 0
>> Half: 0
>> Word: 0
>> DWord: 0
>> Multi: 17539
>> User faults: 2 (fixup)
>>
> [...]
>> drivers/net/ethernet/freescale/gianfar.c | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/freescale/gianfar.c
>> b/drivers/net/ethernet/freescale/gianfar.c
>> index e616b71..e47945f 100644
>> --- a/drivers/net/ethernet/freescale/gianfar.c
>> +++ b/drivers/net/ethernet/freescale/gianfar.c
>> @@ -1413,9 +1413,11 @@ static int gfar_probe(struct platform_device *ofdev)
>>
>> gfar_init_addr_hash_table(priv);
>>
>> - /* Insert receive time stamps into padding alignment bytes */
>> + /* Insert receive time stamps into padding alignment bytes, and
>> + * plus 2 bytes padding to ensure the cpu alignment.
>> + */
>> if (priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
>> - priv->padding = 8;
>> + priv->padding = 8 + DEFAULT_PADDING;
>>
>> if (dev->features & NETIF_F_IP_CSUM ||
>> priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
>> --
>> 2.5.0
> Why handle only the rx timestamp path (HAS_TIMER) when the issue,
Sorry, missed this one. Because the mis-alignment is only been
seen in gfar_clean_rx_ring from padding issue so far.
> as presented
> by you, should be applicable to the default path as well?
>
> The code change according to the patch description should be more likely:
>
> + priv->padding = DEFAULT_PADDING;
> /* Insert receive time stamps into padding alignment bytes */
> if (priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)
> - priv->padding = 8;
> + priv->padding += 8;
I just did a sanity testing on your change, it's OK.
root@1021:~# cat /proc/cpu/alignment
User: 0
System: 0 ( (null))
Skipped: 0
Half: 0
Word: 0
DWord: 0
Multi: 0
User faults: 2 (fixup)
>
>
> Do you have any performance numbers for this change?
>
> Thanks,
> Claudiu
From: Zumeng Chen <[email protected]>
Date: Mon, 4 Dec 2017 11:22:02 +0800
> According to LS1021A RM, the value of PAL can be set so that the start of the
> IP header in the receive data buffer is aligned to a 32-bit boundary. Normally,
> setting PAL = 2 provides minimal padding to ensure such alignment of the IP
> header.
>
> However every incoming packet's 8-byte time stamp will be inserted into the
> packet data buffer as padding alignment bytes when hardware time stamping is
> enabled.
>
> So we set the padding 8+2 here to avoid the flooded alignment faults:
>
> root@128:~# cat /proc/cpu/alignment
> User: 0
> System: 17539 (inet_gro_receive+0x114/0x2c0)
> Skipped: 0
> Half: 0
> Word: 0
> DWord: 0
> Multi: 17539
> User faults: 2 (fixup)
>
> Also shown when exception report enablement
...
> Signed-off-by: Zumeng Chen <[email protected]>
Applied.