From: Kieran Bingham <[email protected]>
The FCPVB handles the interface between the VSPB and memory.
Signed-off-by: Kieran Bingham <[email protected]>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index cd3c6a30fc47..6cf935d307d9 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -691,6 +691,15 @@
#phy-cells = <0>;
status = "disabled";
};
+
+ fcpvb0: fcp@fe96f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe96f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 607>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 607>;
+ iommus = <&ipmmu_vp0 5>;
+ };
};
timer {
--
2.7.4
Hi Kieran,
Thank you for the patch.
On Tuesday, 13 February 2018 00:25:26 EET Kieran Bingham wrote:
> From: Kieran Bingham <[email protected]>
>
> The FCPVB handles the interface between the VSPB and memory.
>
> Signed-off-by: Kieran Bingham <[email protected]>
Reviewed-by: Laurent Pinchart <[email protected]>
> ---
> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index
> cd3c6a30fc47..6cf935d307d9 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -691,6 +691,15 @@
> #phy-cells = <0>;
> status = "disabled";
> };
> +
> + fcpvb0: fcp@fe96f000 {
> + compatible = "renesas,fcpv";
> + reg = <0 0xfe96f000 0 0x200>;
> + clocks = <&cpg CPG_MOD 607>;
> + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> + resets = <&cpg 607>;
> + iommus = <&ipmmu_vp0 5>;
> + };
> };
>
> timer {
--
Regards,
Laurent Pinchart
On Tue, Feb 13, 2018 at 02:31:48PM +0200, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Tuesday, 13 February 2018 00:25:26 EET Kieran Bingham wrote:
> > From: Kieran Bingham <[email protected]>
> >
> > The FCPVB handles the interface between the VSPB and memory.
> >
> > Signed-off-by: Kieran Bingham <[email protected]>
>
> Reviewed-by: Laurent Pinchart <[email protected]>
Thanks, applied.