Hello,
in this second iteration I have fixed two remarks from Geert received on
v1:
- Extend "du" address length to include third channel
- Move usb2_phy1 device node next to usb2_phy0
Two minor nits were not addressed:
- "placeholder" comment position not changed to maintain consistency with
placeholders in M3-W. When they'll get changed, let's change all of them at
the same time.
- The addresses block sizes (and multiple address range blocks) are still there
(next time we can consider dropping the unit address from place-holder nodes
and do not add any "reg" property at all, until DTC won't start complaining
about this as well)
All patches but the newly introduced 7/7 now have Geert's Reviewed-by tag.
Simon: as per v1, this series is based on my M3-N enablement series, last
patch on Ether-AVB excluded.
Thanks
j
v1 -> v2:
- Extend "du" address length to include third channel
- Move usb2_phy1 node next to usb2_phy0
Jacopo Mondi (7):
arm64: dts: renesas: r8a77965: Add "reg" properties
arm64: dts: renesas: r8a77965: Add #address-cells and #size-cells
arm64: dts: renesas: r8a77965: Remove stale reg property
arm64: dts: renesas: r8a77965: Add #phy-cells property
arm64: dts: renesas: r8a77965: Add #pwm-cells property
arm64: dts: renesas: r8a77965: Add #interrupt-cells property
arm64: dts: renesas: r8a77965: Move usb2_phy1 up
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 89 +++++++++++++++++++++++++++++--
1 file changed, 84 insertions(+), 5 deletions(-)
--
2.7.4
Move "usb2_ph1" place-holder device node next to "usb2_phy0" one.
Signed-off-by: Jacopo Mondi <[email protected]>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 0118956..8c9648a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -604,6 +604,11 @@
/* placeholder */
};
+ usb2_phy1: usb-phy@ee0a0200 {
+ reg = <0 0xee0a0200 0 0x700>;
+ /* placeholder */
+ };
+
ohci1: usb@ee0a0000 {
reg = <0 0xee0a0000 0 0x100>;
/* placeholder */
@@ -771,11 +776,6 @@
};
};
- usb2_phy1: usb-phy@ee0a0200 {
- reg = <0 0xee0a0200 0 0x700>;
- /* placeholder */
- };
-
sdhi0: sd@ee100000 {
reg = <0 0xee100000 0 0x2000>;
/* placeholder */
--
2.7.4
Add "#interrupt-cells" property and "interrupt-controller" label to
"interrupt-controller@e61c0000" device node.
This silences the following DTC compiler warnings:
Warning (interrupts_property): Missing interrupt-controller or
interrupt-map property in /soc/interrupt-controller@e61c0000
Warning (interrupts_property): Missing #interrupt-cells in
interrupt-parent /soc/interrupt-controller@e61c000
Signed-off-by: Jacopo Mondi <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 5dff176..0118956 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -316,6 +316,8 @@
};
intc_ex: interrupt-controller@e61c0000 {
+ #interrupt-cells = <2>;
+ interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
/* placeholder */
};
--
2.7.4
Add "#phy-cells" property to "usb-phy@e65ee000" device node.
This silences the following DTC compiler warning:
Warning (phys_property): Missing property '#phy-cells' in node
/soc/usb-phy@e65ee000 or bad phandle (referred from
/soc/usb@ee020000:phys[0])
Signed-off-by: Jacopo Mondi <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 0536b94..1a21967 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -795,6 +795,7 @@
usb3_phy0: usb-phy@e65ee000 {
reg = <0 0xe65ee000 0 0x90>;
+ #phy-cells = <0>;
/* placeholder */
};
--
2.7.4
Add "#address-cells" and "#size-cells" properties to all place-holder nodes
that have children nodes defined by salvator-x[s].dtsi device tree.
This silences the following DTC compiler warnings:
Warning (reg_format): "reg" property in /soc/.. has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells
value for /soc/...
Warning (avoid_default_addr_size): Relying on default #size-cells value
for /soc/...
Signed-off-by: Jacopo Mondi <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 4286453..61efb2d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -521,6 +521,9 @@
};
avb: ethernet@e6800000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
/* placeholder */
};
@@ -528,11 +531,21 @@
csi20: csi2@fea80000 {
reg = <0 0xfea80000 0 0x10000>;
/* placeholder */
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
csi40: csi2@feaa0000 {
reg = <0 0xfeaa0000 0 0x10000>;
/* placeholder */
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
vin0: video@e6ef0000 {
@@ -611,6 +624,9 @@
};
i2c2: i2c@e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
reg = <0 0xe6510000 0 0x40>;
/* placeholder */
};
@@ -621,6 +637,9 @@
};
i2c4: i2c@e66d8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
reg = <0 0xe66d8000 0 0x40>;
/* placeholder */
};
@@ -636,6 +655,9 @@
};
i2c_dvfs: i2c@e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
reg = <0 0xe60b0000 0 0x425>;
/* placeholder */
};
@@ -681,6 +703,9 @@
/* placeholder */
ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
port@0 {
reg = <0>;
du_out_rgb: endpoint {
--
2.7.4
Remove "reg" property from cache-controller-0 device node as it does not
have any unit address.
This silences the following DTC compiler warning:
Warning (unit_address_vs_reg): Node /cpus/cache-controller-0 has a reg
or ranges property, but no unit name
Signed-off-by: Jacopo Mondi <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 61efb2d..0536b94 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -47,7 +47,6 @@
L2_CA57: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc 12>;
cache-unified;
cache-level = <2>;
--
2.7.4
Add "#pwm-cells" property to "pwm@e6e31000" device node.
This silences the following DTC compiler warning:
Warning (pwms_property): Missing property '#pwm-cells' in node
/soc/pwm@e6e31000 or bad phandle (referred from /backlight:pwms[0])
Signed-off-by: Jacopo Mondi <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 1a21967..5dff176 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -668,6 +668,7 @@
pwm1: pwm@e6e31000 {
reg = <0 0xe6e31000 0 8>;
+ #pwm-cells = <2>;
/* placeholder */
};
--
2.7.4
Add "reg" properties to place-holder nodes with unit address defined for
R-Car M3-N SoC.
This silences the following DTC compiler warning:
Warning (unit_address_vs_reg): Node /soc/... has a unit name,
but no reg property
Signed-off-by: Jacopo Mondi <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
---
v1 -> v2:
- Extend "du" address length to include third channel
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 51 +++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 55f05f7..4286453 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -317,6 +317,7 @@
};
intc_ex: interrupt-controller@e61c0000 {
+ reg = <0 0xe61c0000 0 0x200>;
/* placeholder */
};
@@ -520,130 +521,163 @@
};
avb: ethernet@e6800000 {
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
/* placeholder */
};
csi20: csi2@fea80000 {
+ reg = <0 0xfea80000 0 0x10000>;
/* placeholder */
};
csi40: csi2@feaa0000 {
+ reg = <0 0xfeaa0000 0 0x10000>;
/* placeholder */
};
vin0: video@e6ef0000 {
+ reg = <0 0xe6ef0000 0 0x1000>;
/* placeholder */
};
vin1: video@e6ef1000 {
+ reg = <0 0xe6ef1000 0 0x1000>;
/* placeholder */
};
vin2: video@e6ef2000 {
+ reg = <0 0xe6ef2000 0 0x1000>;
/* placeholder */
};
vin3: video@e6ef3000 {
+ reg = <0 0xe6ef3000 0 0x1000>;
/* placeholder */
};
vin4: video@e6ef4000 {
+ reg = <0 0xe6ef4000 0 0x1000>;
/* placeholder */
};
vin5: video@e6ef5000 {
+ reg = <0 0xe6ef5000 0 0x1000>;
/* placeholder */
};
vin6: video@e6ef6000 {
+ reg = <0 0xe6ef6000 0 0x1000>;
/* placeholder */
};
vin7: video@e6ef7000 {
+ reg = <0 0xe6ef7000 0 0x1000>;
/* placeholder */
};
ohci0: usb@ee080000 {
+ reg = <0 0xee080000 0 0x100>;
/* placeholder */
};
ehci0: usb@ee080100 {
+ reg = <0 0xee080100 0 0x100>;
/* placeholder */
};
usb2_phy0: usb-phy@ee080200 {
+ reg = <0 0xee080200 0 0x700>;
/* placeholder */
};
ohci1: usb@ee0a0000 {
+ reg = <0 0xee0a0000 0 0x100>;
/* placeholder */
};
ehci1: usb@ee0a0100 {
+ reg = <0 0xee0a0100 0 0x100>;
/* placeholder */
};
i2c0: i2c@e6500000 {
+ reg = <0 0xe6500000 0 0x40>;
/* placeholder */
};
i2c1: i2c@e6508000 {
+ reg = <0 0xe6508000 0 0x40>;
/* placeholder */
};
i2c2: i2c@e6510000 {
+ reg = <0 0xe6510000 0 0x40>;
/* placeholder */
};
i2c3: i2c@e66d0000 {
+ reg = <0 0xe66d0000 0 0x40>;
/* placeholder */
};
i2c4: i2c@e66d8000 {
+ reg = <0 0xe66d8000 0 0x40>;
/* placeholder */
};
i2c5: i2c@e66e0000 {
+ reg = <0 0xe66e0000 0 0x40>;
/* placeholder */
};
i2c6: i2c@e66e8000 {
+ reg = <0 0xe66e8000 0 0x40>;
/* placeholder */
};
i2c_dvfs: i2c@e60b0000 {
+ reg = <0 0xe60b0000 0 0x425>;
/* placeholder */
};
pwm0: pwm@e6e30000 {
+ reg = <0 0xe6e30000 0 8>;
/* placeholder */
};
pwm1: pwm@e6e31000 {
+ reg = <0 0xe6e31000 0 8>;
/* placeholder */
};
pwm2: pwm@e6e32000 {
+ reg = <0 0xe6e32000 0 8>;
/* placeholder */
};
pwm3: pwm@e6e33000 {
+ reg = <0 0xe6e33000 0 8>;
/* placeholder */
};
pwm4: pwm@e6e34000 {
+ reg = <0 0xe6e34000 0 8>;
/* placeholder */
};
pwm5: pwm@e6e35000 {
+ reg = <0 0xe6e35000 0 8>;
/* placeholder */
};
pwm6: pwm@e6e36000 {
+ reg = <0 0xe6e36000 0 8>;
/* placeholder */
};
du: display@feb00000 {
+ reg = <0 0xfeb00000 0 0x80000>,
+ <0 0xfeb90000 0 0x14>;
/* placeholder */
ports {
@@ -666,18 +700,26 @@
};
hsusb: usb@e6590000 {
+ reg = <0 0xe6590000 0 0x100>;
/* placeholder */
};
pciec0: pcie@fe000000 {
+ reg = <0 0xfe000000 0 0x80000>;
/* placeholder */
};
pciec1: pcie@ee800000 {
+ reg = <0 0xee800000 0 0x80000>;
/* placeholder */
};
rcar_sound: sound@ec500000 {
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
/* placeholder */
rcar_sound,dvc {
@@ -703,38 +745,47 @@
};
usb2_phy1: usb-phy@ee0a0200 {
+ reg = <0 0xee0a0200 0 0x700>;
/* placeholder */
};
sdhi0: sd@ee100000 {
+ reg = <0 0xee100000 0 0x2000>;
/* placeholder */
};
sdhi1: sd@ee120000 {
+ reg = <0 0xee120000 0 0x2000>;
/* placeholder */
};
sdhi2: sd@ee140000 {
+ reg = <0 0xee140000 0 0x2000>;
/* placeholder */
};
sdhi3: sd@ee160000 {
+ reg = <0 0xee160000 0 0x2000>;
/* placeholder */
};
usb3_phy0: usb-phy@e65ee000 {
+ reg = <0 0xe65ee000 0 0x90>;
/* placeholder */
};
usb3_peri0: usb@ee020000 {
+ reg = <0 0xee020000 0 0x400>;
/* placeholder */
};
xhci0: usb@ee000000 {
+ reg = <0 0xee000000 0 0xc00>;
/* placeholder */
};
wdt0: watchdog@e6020000 {
+ reg = <0 0xe6020000 0 0x0c>;
/* placeholder */
};
};
--
2.7.4
On Fri, Feb 23, 2018 at 02:40:52PM +0100, Jacopo Mondi wrote:
> Hello,
> in this second iteration I have fixed two remarks from Geert received on
> v1:
> - Extend "du" address length to include third channel
> - Move usb2_phy1 device node next to usb2_phy0
>
> Two minor nits were not addressed:
> - "placeholder" comment position not changed to maintain consistency with
> placeholders in M3-W. When they'll get changed, let's change all of them at
> the same time.
> - The addresses block sizes (and multiple address range blocks) are still there
> (next time we can consider dropping the unit address from place-holder nodes
> and do not add any "reg" property at all, until DTC won't start complaining
> about this as well)
>
> All patches but the newly introduced 7/7 now have Geert's Reviewed-by tag.
>
> Simon: as per v1, this series is based on my M3-N enablement series, last
> patch on Ether-AVB excluded.
>
> Thanks
> j
>
> v1 -> v2:
> - Extend "du" address length to include third channel
> - Move usb2_phy1 node next to usb2_phy0
>
> Jacopo Mondi (7):
> arm64: dts: renesas: r8a77965: Add "reg" properties
> arm64: dts: renesas: r8a77965: Add #address-cells and #size-cells
> arm64: dts: renesas: r8a77965: Remove stale reg property
> arm64: dts: renesas: r8a77965: Add #phy-cells property
> arm64: dts: renesas: r8a77965: Add #pwm-cells property
> arm64: dts: renesas: r8a77965: Add #interrupt-cells property
> arm64: dts: renesas: r8a77965: Move usb2_phy1 up
>
> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 89 +++++++++++++++++++++++++++++--
Thanks, applied.