Per PCIe r4.0, sec 9.3.4.1.11, the BARs registers from the VF config space
are all RO Zero for PCI VFs. So just skip reading them for VFs.
This is an optimization when enabling SR-IOV on a device with many VFs.
Cc: Bjorn Helgaas <[email protected]>
Cc: [email protected]
Cc: [email protected]
Suggested-by: Bjorn Helgaas <[email protected]>
Signed-off-by: KarimAllah Ahmed <[email protected]>
---
drivers/pci/probe.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index a96837e..7204d46 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -329,6 +329,10 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
if (dev->non_compliant_bars)
return;
+ /* Per PCIe r4.0, sec 9.3.4.1.11, the VF BARs are all RO Zero */
+ if (dev->is_virtfn)
+ return;
+
for (pos = 0; pos < howmany; pos++) {
struct resource *res = &dev->resource[pos];
reg = PCI_BASE_ADDRESS_0 + (pos << 2);
--
2.7.4
On Sat, Mar 03, 2018 at 05:33:10AM +0100, KarimAllah Ahmed wrote:
> Per PCIe r4.0, sec 9.3.4.1.11, the BARs registers from the VF config space
> are all RO Zero for PCI VFs. So just skip reading them for VFs.
>
> This is an optimization when enabling SR-IOV on a device with many VFs.
>
> Cc: Bjorn Helgaas <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Suggested-by: Bjorn Helgaas <[email protected]>
> Signed-off-by: KarimAllah Ahmed <[email protected]>
Applied to pci/virtualization for v4.17, thanks!
> ---
> drivers/pci/probe.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index a96837e..7204d46 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -329,6 +329,10 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
> if (dev->non_compliant_bars)
> return;
>
> + /* Per PCIe r4.0, sec 9.3.4.1.11, the VF BARs are all RO Zero */
> + if (dev->is_virtfn)
> + return;
> +
> for (pos = 0; pos < howmany; pos++) {
> struct resource *res = &dev->resource[pos];
> reg = PCI_BASE_ADDRESS_0 + (pos << 2);
> --
> 2.7.4
>