2018-11-14 15:26:47

by Jan Kotas

Subject: [PATCH 1/2] dt-bindings: clk: Add bindings for Fixed MMIO clock

This patch adds a DT binding documentation for Fixed
Memory Mapped IO clocks.

Signed-off-by: Jan Kotas <[email protected]>
---
.../devicetree/bindings/clock/fixed-mmio-clock.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/fixed-mmio-clock.txt

diff --git a/Documentation/devicetree/bindings/clock/fixed-mmio-clock.txt b/Documentation/devicetree/bindings/clock/fixed-mmio-clock.txt
new file mode 100644
index 0000000000..6441821688
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/fixed-mmio-clock.txt
@@ -0,0 +1,22 @@
+Binding for simple memory mapped io fixed-rate clock sources.
+The driver reads a clock frequency value from a single 32-bit memory mapped
+register and registers it as a fixed rate clock.
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be "fixed-mmio-clock".
+- #clock-cells : from common clock binding; shall be set to 0.
+- reg : Address and length of the clock value register set.
+
+Optional properties:
+- clock-output-names : From common clock binding.
+
+Example:
+sysclock: sysclock@fd020004 {
+ #clock-cells = <0>;
+ compatible = "fixed-mmio-clock";
+ reg = <0xfd020004 0x4>;
+};
--
2.15.0

2018-11-14 22:38:41

by Stephen Boyd

Subject: Re: [PATCH 1/2] dt-bindings: clk: Add bindings for Fixed MMIO clock

Quoting Janek Kotas (2018-11-14 07:24:21)
> +
> +Required properties:
> +- compatible : shall be "fixed-mmio-clock".
> +- #clock-cells : from common clock binding; shall be set to 0.
> +- reg : Address and length of the clock value register set.
> +
> +Optional properties:
> +- clock-output-names : From common clock binding.
> +
> +Example:
> +sysclock: sysclock@fd020004 {
> + #clock-cells = <0>;
> + compatible = "fixed-mmio-clock";
> + reg = <0xfd020004 0x4>;

Unfortunately this looks wrong and seems to be a way to split up a
hardware IP block into many little DT nodes to describe clks inside of a
clock controller. We don't do that style of clk drivers anymore.