From: Michael Kao <[email protected]>
This patchset supports for mt8183 chip to mtk_thermal.c.
MT8183 has six temperature sensors and two thermal
controllers. It has different calibration coefficent with
past project, and doesn't need to select bank.
As a result, we add the common architecture for scalability.
Michael Kao (7):
thermal: mediatek: fix register index error
thermal: mediatek: add common index of vts settings.
thermal: mediatek: add calibration item
thermal: mediatek: add thermal controller offset
thermal: mediatek: add flag for bank selection
dt-bindings: thermal: add binding document for mt8183 thermal
controller
thermal: mediatek: add support for MT8183
.../bindings/thermal/mediatek-thermal.txt | 1 +
drivers/thermal/mtk_thermal.c | 315 +++++++++++++++++----
2 files changed, 257 insertions(+), 59 deletions(-)
--
1.9.1
From: Michael Kao <[email protected]>
The index of msr and adcpnp should match the sensor
which belongs to the selected bank in the for loop.
Signed-off-by: Michael Kao <[email protected]>
---
drivers/thermal/mtk_thermal.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 0691f26..f646436 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -431,7 +431,8 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
u32 raw;
for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) {
- raw = readl(mt->thermal_base + conf->msr[i]);
+ raw = readl(mt->thermal_base +
+ conf->msr[conf->bank_data[bank->id].sensors[i]]);
temp = raw_to_mcelsius(mt,
conf->bank_data[bank->id].sensors[i],
@@ -568,7 +569,8 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
for (i = 0; i < conf->bank_data[num].num_sensors; i++)
writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]],
- mt->thermal_base + conf->adcpnp[i]);
+ mt->thermal_base +
+ conf->adcpnp[conf->bank_data[num].sensors[i]]);
writel((1 << conf->bank_data[num].num_sensors) - 1,
mt->thermal_base + TEMP_MONCTL0);
--
1.9.1
From: Michael Kao <[email protected]>
One thermal controller can read four sensors at most,
so we need to add controller_offset for the project with
more than four sensors to reuse the same register settings.
Signed-off-by: Michael Kao <[email protected]>
---
drivers/thermal/mtk_thermal.c | 79 +++++++++++++++++++++++++++++--------------
1 file changed, 54 insertions(+), 25 deletions(-)
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 45c6587..e5cf3f4 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -105,6 +105,9 @@
/* The number of sensing points per bank */
#define MT8173_NUM_SENSORS_PER_ZONE 4
+/* The number of controller in the MT8173 */
+#define MT8173_NUM_CONTROLLER 1
+
/* The calibration coefficient of sensor */
#define MT8173_CALIBRATION 165
@@ -150,6 +153,9 @@ enum {
/* The number of sensing points per bank */
#define MT2701_NUM_SENSORS_PER_ZONE 3
+/* The number of controller in the MT2701 */
+#define MT2701_NUM_CONTROLLER 1
+
/* The calibration coefficient of sensor */
#define MT2701_CALIBRATION 165
@@ -168,6 +174,9 @@ enum {
/* The number of sensing points per bank */
#define MT2712_NUM_SENSORS_PER_ZONE 4
+/* The number of controller in the MT2712 */
+#define MT2712_NUM_CONTROLLER 1
+
/* The calibration coefficient of sensor */
#define MT2712_CALIBRATION 165
@@ -176,6 +185,7 @@ enum {
#define MT7622_NUM_ZONES 1
#define MT7622_NUM_SENSORS_PER_ZONE 1
#define MT7622_TS1 0
+#define MT7622_NUM_CONTROLLER 1
/* The calibration coefficient of sensor */
#define MT7622_CALIBRATION 165
@@ -201,6 +211,8 @@ struct mtk_thermal_data {
const int *msr;
const int *adcpnp;
const int cali_val;
+ const int num_controller;
+ const int *controller_offset;
struct thermal_bank_cfg bank_data[];
};
@@ -240,6 +252,7 @@ struct mtk_thermal {
};
static const int mt8173_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
+static const int mt8173_tc_offset[MT8173_NUM_CONTROLLER] = { 0x0, };
static const int mt8173_vts_index[MT8173_NUM_SENSORS] = {
VTS1, VTS2, VTS3, VTS4, VTSABB
@@ -259,6 +272,7 @@ struct mtk_thermal {
};
static const int mt2701_mux_values[MT2701_NUM_SENSORS] = { 0, 1, 16 };
+static const int mt2701_tc_offset[MT2701_NUM_CONTROLLER] = { 0x0, };
static const int mt2701_vts_index[MT2701_NUM_SENSORS] = {
VTS1, VTS2, VTS3
@@ -278,6 +292,7 @@ struct mtk_thermal {
};
static const int mt2712_mux_values[MT2712_NUM_SENSORS] = { 0, 1, 2, 3 };
+static const int mt2712_tc_offset[MT2712_NUM_CONTROLLER] = { 0x0, };
static const int mt2712_vts_index[MT2712_NUM_SENSORS] = {
VTS1, VTS2, VTS3, VTS4
@@ -289,6 +304,7 @@ struct mtk_thermal {
static const int mt7622_adcpnp[MT7622_NUM_SENSORS_PER_ZONE] = { TEMP_ADCPNP0, };
static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, };
static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 };
+static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, };
/**
* The MT8173 thermal controller has four banks. Each bank can read up to
@@ -309,6 +325,8 @@ struct mtk_thermal {
.num_sensors = MT8173_NUM_SENSORS,
.vts_index = mt8173_vts_index,
.cali_val = MT8173_CALIBRATION,
+ .num_controller = MT8173_NUM_CONTROLLER,
+ .controller_offset = mt8173_tc_offset,
.bank_data = {
{
.num_sensors = 2,
@@ -345,6 +363,8 @@ struct mtk_thermal {
.num_sensors = MT2701_NUM_SENSORS,
.vts_index = mt2701_vts_index,
.cali_val = MT2701_CALIBRATION,
+ .num_controller = MT2701_NUM_CONTROLLER,
+ .controller_offset = mt2701_tc_offset,
.bank_data = {
{
.num_sensors = 3,
@@ -372,6 +392,8 @@ struct mtk_thermal {
.num_sensors = MT2712_NUM_SENSORS,
.vts_index = mt2712_vts_index,
.cali_val = MT2712_CALIBRATION,
+ .num_controller = MT2712_NUM_CONTROLLER,
+ .controller_offset = mt2712_tc_offset,
.bank_data = {
{
.num_sensors = 4,
@@ -393,6 +415,8 @@ struct mtk_thermal {
.num_sensors = MT7622_NUM_SENSORS,
.vts_index = mt7622_vts_index,
.cali_val = MT7622_CALIBRATION,
+ .num_controller = MT7622_NUM_CONTROLLER,
+ .controller_offset = mt7622_tc_offset,
.bank_data = {
{
.num_sensors = 1,
@@ -523,19 +547,23 @@ static int mtk_read_temp(void *data, int *temperature)
};
static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
- u32 apmixed_phys_base, u32 auxadc_phys_base)
+ u32 apmixed_phys_base, u32 auxadc_phys_base,
+ int ctrl_id)
{
struct mtk_thermal_bank *bank = &mt->banks[num];
const struct mtk_thermal_data *conf = mt->conf;
int i;
+ int offset = mt->conf->controller_offset[ctrl_id];
+ void *controller_base = mt->thermal_base + offset;
+
bank->id = num;
bank->mt = mt;
mtk_thermal_get_bank(bank);
/* bus clock 66M counting unit is 12 * 15.15ns * 256 = 46.540us */
- writel(TEMP_MONCTL1_PERIOD_UNIT(12), mt->thermal_base + TEMP_MONCTL1);
+ writel(TEMP_MONCTL1_PERIOD_UNIT(12), controller_base + TEMP_MONCTL1);
/*
* filt interval is 1 * 46.540us = 46.54us,
@@ -543,21 +571,21 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
*/
writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
TEMP_MONCTL2_SENSOR_INTERVAL(429),
- mt->thermal_base + TEMP_MONCTL2);
+ controller_base + TEMP_MONCTL2);
/* poll is set to 10u */
writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
- mt->thermal_base + TEMP_AHBPOLL);
+ controller_base + TEMP_AHBPOLL);
/* temperature sampling control, 1 sample */
- writel(0x0, mt->thermal_base + TEMP_MSRCTL0);
+ writel(0x0, controller_base + TEMP_MSRCTL0);
/* exceed this polling time, IRQ would be inserted */
- writel(0xffffffff, mt->thermal_base + TEMP_AHBTO);
+ writel(0xffffffff, controller_base + TEMP_AHBTO);
/* number of interrupts per event, 1 is enough */
- writel(0x0, mt->thermal_base + TEMP_MONIDET0);
- writel(0x0, mt->thermal_base + TEMP_MONIDET1);
+ writel(0x0, controller_base + TEMP_MONIDET0);
+ writel(0x0, controller_base + TEMP_MONIDET1);
/*
* The MT8173 thermal controller does not have its own ADC. Instead it
@@ -572,44 +600,44 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
* this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
* automatically by hw
*/
- writel(BIT(conf->auxadc_channel), mt->thermal_base + TEMP_ADCMUX);
+ writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCMUX);
/* AHB address for auxadc mux selection */
writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
- mt->thermal_base + TEMP_ADCMUXADDR);
+ controller_base + TEMP_ADCMUXADDR);
/* AHB address for pnp sensor mux selection */
writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
- mt->thermal_base + TEMP_PNPMUXADDR);
+ controller_base + TEMP_PNPMUXADDR);
/* AHB value for auxadc enable */
- writel(BIT(conf->auxadc_channel), mt->thermal_base + TEMP_ADCEN);
+ writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCEN);
/* AHB address for auxadc enable (channel 0 immediate mode selected) */
writel(auxadc_phys_base + AUXADC_CON1_SET_V,
- mt->thermal_base + TEMP_ADCENADDR);
+ controller_base + TEMP_ADCENADDR);
/* AHB address for auxadc valid bit */
writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
- mt->thermal_base + TEMP_ADCVALIDADDR);
+ controller_base + TEMP_ADCVALIDADDR);
/* AHB address for auxadc voltage output */
writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
- mt->thermal_base + TEMP_ADCVOLTADDR);
+ controller_base + TEMP_ADCVOLTADDR);
/* read valid & voltage are at the same register */
- writel(0x0, mt->thermal_base + TEMP_RDCTRL);
+ writel(0x0, controller_base + TEMP_RDCTRL);
/* indicate where the valid bit is */
writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
- mt->thermal_base + TEMP_ADCVALIDMASK);
+ controller_base + TEMP_ADCVALIDMASK);
/* no shift */
- writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT);
+ writel(0x0, controller_base + TEMP_ADCVOLTAGESHIFT);
/* enable auxadc mux write transaction */
writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
- mt->thermal_base + TEMP_ADCWRITECTRL);
+ controller_base + TEMP_ADCWRITECTRL);
for (i = 0; i < conf->bank_data[num].num_sensors; i++)
writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]],
@@ -617,11 +645,11 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
conf->adcpnp[conf->bank_data[num].sensors[i]]);
writel((1 << conf->bank_data[num].num_sensors) - 1,
- mt->thermal_base + TEMP_MONCTL0);
+ controller_base + TEMP_MONCTL0);
writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE |
TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
- mt->thermal_base + TEMP_ADCWRITECTRL);
+ controller_base + TEMP_ADCWRITECTRL);
mtk_thermal_put_bank(bank);
}
@@ -737,7 +765,7 @@ static int mtk_thermal_get_calibration_data(struct device *dev,
static int mtk_thermal_probe(struct platform_device *pdev)
{
- int ret, i;
+ int ret, i, ctrl_id;
struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node;
struct mtk_thermal *mt;
struct resource *res;
@@ -817,9 +845,10 @@ static int mtk_thermal_probe(struct platform_device *pdev)
goto err_disable_clk_auxadc;
}
- for (i = 0; i < mt->conf->num_banks; i++)
- mtk_thermal_init_bank(mt, i, apmixed_phys_base,
- auxadc_phys_base);
+ for (ctrl_id = 0; ctrl_id < mt->conf->num_controller ; ctrl_id++)
+ for (i = 0; i < mt->conf->num_banks; i++)
+ mtk_thermal_init_bank(mt, i, apmixed_phys_base,
+ auxadc_phys_base, ctrl_id);
platform_set_drvdata(pdev, mt);
--
1.9.1
From: Michael Kao <[email protected]>
For past ic designs, the thermal controller should select banks before
reading the thermal sensor.
And the new ic design architecture removes this mechanism.
Signed-off-by: Michael Kao <[email protected]>
---
drivers/thermal/mtk_thermal.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index e5cf3f4..3e97638 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -213,6 +213,7 @@ struct mtk_thermal_data {
const int cali_val;
const int num_controller;
const int *controller_offset;
+ bool need_switch_bank;
struct thermal_bank_cfg bank_data[];
};
@@ -327,6 +328,7 @@ struct mtk_thermal {
.cali_val = MT8173_CALIBRATION,
.num_controller = MT8173_NUM_CONTROLLER,
.controller_offset = mt8173_tc_offset,
+ .need_switch_bank = true,
.bank_data = {
{
.num_sensors = 2,
@@ -365,6 +367,7 @@ struct mtk_thermal {
.cali_val = MT2701_CALIBRATION,
.num_controller = MT2701_NUM_CONTROLLER,
.controller_offset = mt2701_tc_offset,
+ .need_switch_bank = true,
.bank_data = {
{
.num_sensors = 3,
@@ -394,6 +397,7 @@ struct mtk_thermal {
.cali_val = MT2712_CALIBRATION,
.num_controller = MT2712_NUM_CONTROLLER,
.controller_offset = mt2712_tc_offset,
+ .need_switch_bank = true,
.bank_data = {
{
.num_sensors = 4,
@@ -417,6 +421,7 @@ struct mtk_thermal {
.cali_val = MT7622_CALIBRATION,
.num_controller = MT7622_NUM_CONTROLLER,
.controller_offset = mt7622_tc_offset,
+ .need_switch_bank = true,
.bank_data = {
{
.num_sensors = 1,
@@ -463,12 +468,14 @@ static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
struct mtk_thermal *mt = bank->mt;
u32 val;
- mutex_lock(&mt->lock);
+ if (mt->conf->need_switch_bank) {
+ mutex_lock(&mt->lock);
- val = readl(mt->thermal_base + PTPCORESEL);
- val &= ~0xf;
- val |= bank->id;
- writel(val, mt->thermal_base + PTPCORESEL);
+ val = readl(mt->thermal_base + PTPCORESEL);
+ val &= ~0xf;
+ val |= bank->id;
+ writel(val, mt->thermal_base + PTPCORESEL);
+ }
}
/**
@@ -481,7 +488,8 @@ static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
{
struct mtk_thermal *mt = bank->mt;
- mutex_unlock(&mt->lock);
+ if (mt->conf->need_switch_bank)
+ mutex_unlock(&mt->lock);
}
/**
--
1.9.1
From: Michael Kao <[email protected]>
Add calibration item in thermal_data to support
the project with different calibration coefficient.
Signed-off-by: Michael Kao <[email protected]>
---
drivers/thermal/mtk_thermal.c | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 07f8ad7..45c6587 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -105,6 +105,9 @@
/* The number of sensing points per bank */
#define MT8173_NUM_SENSORS_PER_ZONE 4
+/* The calibration coefficient of sensor */
+#define MT8173_CALIBRATION 165
+
/*
* Layout of the fuses providing the calibration data
* These macros could be used for MT8173, MT2701, and MT2712.
@@ -147,6 +150,9 @@ enum {
/* The number of sensing points per bank */
#define MT2701_NUM_SENSORS_PER_ZONE 3
+/* The calibration coefficient of sensor */
+#define MT2701_CALIBRATION 165
+
/* MT2712 thermal sensors */
#define MT2712_TS1 0
#define MT2712_TS2 1
@@ -162,12 +168,18 @@ enum {
/* The number of sensing points per bank */
#define MT2712_NUM_SENSORS_PER_ZONE 4
+/* The calibration coefficient of sensor */
+#define MT2712_CALIBRATION 165
+
#define MT7622_TEMP_AUXADC_CHANNEL 11
#define MT7622_NUM_SENSORS 1
#define MT7622_NUM_ZONES 1
#define MT7622_NUM_SENSORS_PER_ZONE 1
#define MT7622_TS1 0
+/* The calibration coefficient of sensor */
+#define MT7622_CALIBRATION 165
+
struct mtk_thermal;
struct thermal_bank_cfg {
@@ -188,6 +200,7 @@ struct mtk_thermal_data {
const int *sensor_mux_values;
const int *msr;
const int *adcpnp;
+ const int cali_val;
struct thermal_bank_cfg bank_data[];
};
@@ -295,6 +308,7 @@ struct mtk_thermal {
.num_banks = MT8173_NUM_ZONES,
.num_sensors = MT8173_NUM_SENSORS,
.vts_index = mt8173_vts_index,
+ .cali_val = MT8173_CALIBRATION,
.bank_data = {
{
.num_sensors = 2,
@@ -330,6 +344,7 @@ struct mtk_thermal {
.num_banks = 1,
.num_sensors = MT2701_NUM_SENSORS,
.vts_index = mt2701_vts_index,
+ .cali_val = MT2701_CALIBRATION,
.bank_data = {
{
.num_sensors = 3,
@@ -356,6 +371,7 @@ struct mtk_thermal {
.num_banks = 1,
.num_sensors = MT2712_NUM_SENSORS,
.vts_index = mt2712_vts_index,
+ .cali_val = MT2712_CALIBRATION,
.bank_data = {
{
.num_sensors = 4,
@@ -376,6 +392,7 @@ struct mtk_thermal {
.num_banks = MT7622_NUM_ZONES,
.num_sensors = MT7622_NUM_SENSORS,
.vts_index = mt7622_vts_index,
+ .cali_val = MT7622_CALIBRATION,
.bank_data = {
{
.num_sensors = 1,
@@ -402,7 +419,7 @@ static int raw_to_mcelsius(struct mtk_thermal *mt, int sensno, s32 raw)
raw &= 0xfff;
tmp = 203450520 << 3;
- tmp /= 165 + mt->o_slope;
+ tmp /= mt->conf->cali_val + mt->o_slope;
tmp /= 10000 + mt->adc_ge;
tmp *= raw - mt->vts[sensno] - 3350;
tmp >>= 3;
--
1.9.1
From: Michael Kao <[email protected]>
MT8183 has two built-in thermal controllers with total six thermal
sensors. And it doesn't have bank, so doesn't need to select bank.
This patch adds support for mt8183.
Signed-off-by: Michael Kao <[email protected]>
---
drivers/thermal/mtk_thermal.c | 98 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 97 insertions(+), 1 deletion(-)
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 3e97638..e449177 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -71,6 +71,15 @@
#define TEMP_SPARE0 0x0f0
+#define TEMP_ADCPNP0_1 0x148
+#define TEMP_ADCPNP1_1 0x14c
+#define TEMP_ADCPNP2_1 0x150
+#define TEMP_MSR0_1 0x190
+#define TEMP_MSR1_1 0x194
+#define TEMP_MSR2_1 0x198
+#define TEMP_ADCPNP3_1 0x1b4
+#define TEMP_MSR3_1 0x1B8
+
#define PTPCORESEL 0x400
#define TEMP_MONCTL1_PERIOD_UNIT(x) ((x) & 0x3ff)
@@ -113,7 +122,8 @@
/*
* Layout of the fuses providing the calibration data
- * These macros could be used for MT8173, MT2701, and MT2712.
+ * These macros could be used for MT8183, MT8173, MT2701, and MT2712.
+ * MT8183 has 6 sensors and needs 6 VTS calibration data.
* MT8173 has 5 sensors and needs 5 VTS calibration data.
* MT2701 has 3 sensors and needs 3 VTS calibration data.
* MT2712 has 4 sensors and needs 4 VTS calibration data.
@@ -124,6 +134,7 @@
#define CALIB_BUF0_VTS_TS2(x) (((x) >> 8) & 0x1ff)
#define CALIB_BUF1_VTS_TS3(x) (((x) >> 0) & 0x1ff)
#define CALIB_BUF2_VTS_TS4(x) (((x) >> 23) & 0x1ff)
+#define CALIB_BUF2_VTS_TS5(x) (((x) >> 5) & 0x1ff)
#define CALIB_BUF2_VTS_TSABB(x) (((x) >> 14) & 0x1ff)
#define CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f)
#define CALIB_BUF0_O_SLOPE(x) (((x) >> 26) & 0x3f)
@@ -135,6 +146,7 @@ enum {
VTS2,
VTS3,
VTS4,
+ VTS5,
VTSABB,
MAX_NUM_VTS,
};
@@ -190,6 +202,29 @@ enum {
/* The calibration coefficient of sensor */
#define MT7622_CALIBRATION 165
+/* MT8183 thermal sensors */
+#define MT8183_TS1 0
+#define MT8183_TS2 1
+#define MT8183_TS3 2
+#define MT8183_TS4 3
+#define MT8183_TS5 4
+#define MT8183_TSABB 5
+
+/* AUXADC channel is used for the temperature sensors */
+#define MT8183_TEMP_AUXADC_CHANNEL 11
+
+/* The total number of temperature sensors in the MT8183 */
+#define MT8183_NUM_SENSORS 6
+
+/* The number of sensing points per bank */
+#define MT8183_NUM_SENSORS_PER_ZONE 6
+
+/* The number of controller in the MT8183 */
+#define MT8183_NUM_CONTROLLER 2
+
+/* The calibration coefficient of sensor */
+#define MT8183_CALIBRATION 153
+
struct mtk_thermal;
struct thermal_bank_cfg {
@@ -236,6 +271,27 @@ struct mtk_thermal {
struct mtk_thermal_bank banks[];
};
+/* MT8183 thermal sensor data */
+static const int mt8183_bank_data[MT8183_NUM_SENSORS] = {
+ MT8183_TS1, MT8183_TS2, MT8183_TS3, MT8183_TS4, MT8183_TS5, MT8183_TSABB
+};
+
+static const int mt8183_msr[MT8183_NUM_SENSORS_PER_ZONE] = {
+ TEMP_MSR0_1, TEMP_MSR1_1, TEMP_MSR2_1, TEMP_MSR1, TEMP_MSR0, TEMP_MSR3_1
+};
+
+static const int mt8183_adcpnp[MT8183_NUM_SENSORS_PER_ZONE] = {
+ TEMP_ADCPNP0_1, TEMP_ADCPNP1_1, TEMP_ADCPNP2_1,
+ TEMP_ADCPNP1, TEMP_ADCPNP0, TEMP_ADCPNP3_1
+};
+
+static const int mt8183_mux_values[MT8183_NUM_SENSORS] = { 0, 1, 2, 3, 4, 0 };
+static const int mt8183_tc_offset[MT8183_NUM_CONTROLLER] = {0x0, 0x100};
+
+static const int mt8183_vts_index[MT8183_NUM_SENSORS] = {
+ VTS1, VTS2, VTS3, VTS4, VTS5, VTSABB
+};
+
/* MT8173 thermal sensor data */
static const int mt8173_bank_data[MT8173_NUM_ZONES][3] = {
{ MT8173_TS2, MT8173_TS3 },
@@ -434,6 +490,39 @@ struct mtk_thermal {
};
/**
+ * The MT8183 thermal controller has one bank for the current SW framework.
+ * The MT8183 has a total of 6 temperature sensors.
+ * There are two thermal controller to control the six sensor.
+ * The first one bind 2 sensor, and the other bind 4 sensors.
+ * The thermal core only gets the maximum temperature of all sensor, so
+ * the bank concept wouldn't be necessary here. However, the SVS (Smart
+ * Voltage Scaling) unit makes its decisions based on the same bank
+ * data, and this indeed needs the temperatures of the individual banks
+ * for making better decisions.
+ */
+
+static const struct mtk_thermal_data mt8183_thermal_data = {
+ .auxadc_channel = MT8183_TEMP_AUXADC_CHANNEL,
+ .num_banks = MT8183_NUM_SENSORS_PER_ZONE,
+ .num_sensors = MT8183_NUM_SENSORS,
+ .vts_index = mt8183_vts_index,
+ .cali_val = MT8183_CALIBRATION,
+ .num_controller = MT8183_NUM_CONTROLLER,
+ .controller_offset = mt8183_tc_offset,
+ .need_switch_bank = false,
+ .bank_data = {
+ {
+ .num_sensors = 6,
+ .sensors = mt8183_bank_data,
+ },
+ },
+
+ .msr = mt8183_msr,
+ .adcpnp = mt8183_adcpnp,
+ .sensor_mux_values = mt8183_mux_values,
+};
+
+/**
* raw_to_mcelsius - convert a raw ADC value to mcelsius
* @mt: The thermal controller
* @raw: raw ADC value
@@ -726,6 +815,9 @@ static int mtk_thermal_get_calibration_data(struct device *dev,
case VTS4:
mt->vts[VTS4] = CALIB_BUF2_VTS_TS4(buf[2]);
break;
+ case VTS5:
+ mt->vts[VTS5] = CALIB_BUF2_VTS_TS5(buf[2]);
+ break;
case VTSABB:
mt->vts[VTSABB] = CALIB_BUF2_VTS_TSABB(buf[2]);
break;
@@ -766,6 +858,10 @@ static int mtk_thermal_get_calibration_data(struct device *dev,
{
.compatible = "mediatek,mt7622-thermal",
.data = (void *)&mt7622_thermal_data,
+ },
+ {
+ .compatible = "mediatek,mt8183-thermal",
+ .data = (void *)&mt8183_thermal_data,
}, {
},
};
--
1.9.1
From: Michael Kao <[email protected]>
This patch adds binding document for mt8183 thermal controller.
Signed-off-by: Michael Kao <[email protected]>
---
Documentation/devicetree/bindings/thermal/mediatek-thermal.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
index 41d6a44..f8d7831 100644
--- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt
@@ -13,6 +13,7 @@ Required properties:
- "mediatek,mt2701-thermal" : For MT2701 family of SoCs
- "mediatek,mt2712-thermal" : For MT2712 family of SoCs
- "mediatek,mt7622-thermal" : For MT7622 SoC
+ - "mediatek,mt8183-thermal" : For MT8183 family of SoCs
- reg: Address range of the thermal controller
- interrupts: IRQ for the thermal controller
- clocks, clock-names: Clocks needed for the thermal controller. required
--
1.9.1
From: Michael Kao <[email protected]>
Each project has different number of vts settings.
For the MT2701 just have to set three vts, but the
original code flow add five unnecessary vts.
Add common index of vts settings for scalablity,
and reduce the setting of unnecessary vts.
Signed-off-by: Michael Kao <[email protected]>
---
drivers/thermal/mtk_thermal.c | 93 ++++++++++++++++++++++++++++++++-----------
1 file changed, 69 insertions(+), 24 deletions(-)
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index f646436..07f8ad7 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -112,17 +112,26 @@
* MT2701 has 3 sensors and needs 3 VTS calibration data.
* MT2712 has 4 sensors and needs 4 VTS calibration data.
*/
-#define MT8173_CALIB_BUF0_VALID BIT(0)
-#define MT8173_CALIB_BUF1_ADC_GE(x) (((x) >> 22) & 0x3ff)
-#define MT8173_CALIB_BUF0_VTS_TS1(x) (((x) >> 17) & 0x1ff)
-#define MT8173_CALIB_BUF0_VTS_TS2(x) (((x) >> 8) & 0x1ff)
-#define MT8173_CALIB_BUF1_VTS_TS3(x) (((x) >> 0) & 0x1ff)
-#define MT8173_CALIB_BUF2_VTS_TS4(x) (((x) >> 23) & 0x1ff)
-#define MT8173_CALIB_BUF2_VTS_TSABB(x) (((x) >> 14) & 0x1ff)
-#define MT8173_CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f)
-#define MT8173_CALIB_BUF0_O_SLOPE(x) (((x) >> 26) & 0x3f)
-#define MT8173_CALIB_BUF0_O_SLOPE_SIGN(x) (((x) >> 7) & 0x1)
-#define MT8173_CALIB_BUF1_ID(x) (((x) >> 9) & 0x1)
+#define CALIB_BUF0_VALID BIT(0)
+#define CALIB_BUF1_ADC_GE(x) (((x) >> 22) & 0x3ff)
+#define CALIB_BUF0_VTS_TS1(x) (((x) >> 17) & 0x1ff)
+#define CALIB_BUF0_VTS_TS2(x) (((x) >> 8) & 0x1ff)
+#define CALIB_BUF1_VTS_TS3(x) (((x) >> 0) & 0x1ff)
+#define CALIB_BUF2_VTS_TS4(x) (((x) >> 23) & 0x1ff)
+#define CALIB_BUF2_VTS_TSABB(x) (((x) >> 14) & 0x1ff)
+#define CALIB_BUF0_DEGC_CALI(x) (((x) >> 1) & 0x3f)
+#define CALIB_BUF0_O_SLOPE(x) (((x) >> 26) & 0x3f)
+#define CALIB_BUF0_O_SLOPE_SIGN(x) (((x) >> 7) & 0x1)
+#define CALIB_BUF1_ID(x) (((x) >> 9) & 0x1)
+
+enum {
+ VTS1,
+ VTS2,
+ VTS3,
+ VTS4,
+ VTSABB,
+ MAX_NUM_VTS,
+};
/* MT2701 thermal sensors */
#define MT2701_TS1 0
@@ -175,6 +184,7 @@ struct mtk_thermal_data {
s32 num_banks;
s32 num_sensors;
s32 auxadc_channel;
+ const int *vts_index;
const int *sensor_mux_values;
const int *msr;
const int *adcpnp;
@@ -194,7 +204,7 @@ struct mtk_thermal {
s32 adc_ge;
s32 degc_cali;
s32 o_slope;
- s32 vts[MT8173_NUM_SENSORS];
+ s32 vts[MAX_NUM_VTS];
const struct mtk_thermal_data *conf;
struct mtk_thermal_bank banks[];
@@ -218,6 +228,10 @@ struct mtk_thermal {
static const int mt8173_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
+static const int mt8173_vts_index[MT8173_NUM_SENSORS] = {
+ VTS1, VTS2, VTS3, VTS4, VTSABB
+};
+
/* MT2701 thermal sensor data */
static const int mt2701_bank_data[MT2701_NUM_SENSORS] = {
MT2701_TS1, MT2701_TS2, MT2701_TSABB
@@ -233,6 +247,10 @@ struct mtk_thermal {
static const int mt2701_mux_values[MT2701_NUM_SENSORS] = { 0, 1, 16 };
+static const int mt2701_vts_index[MT2701_NUM_SENSORS] = {
+ VTS1, VTS2, VTS3
+};
+
/* MT2712 thermal sensor data */
static const int mt2712_bank_data[MT2712_NUM_SENSORS] = {
MT2712_TS1, MT2712_TS2, MT2712_TS3, MT2712_TS4
@@ -248,11 +266,16 @@ struct mtk_thermal {
static const int mt2712_mux_values[MT2712_NUM_SENSORS] = { 0, 1, 2, 3 };
+static const int mt2712_vts_index[MT2712_NUM_SENSORS] = {
+ VTS1, VTS2, VTS3, VTS4
+};
+
/* MT7622 thermal sensor data */
static const int mt7622_bank_data[MT7622_NUM_SENSORS] = { MT7622_TS1, };
static const int mt7622_msr[MT7622_NUM_SENSORS_PER_ZONE] = { TEMP_MSR0, };
static const int mt7622_adcpnp[MT7622_NUM_SENSORS_PER_ZONE] = { TEMP_ADCPNP0, };
static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, };
+static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 };
/**
* The MT8173 thermal controller has four banks. Each bank can read up to
@@ -271,6 +294,7 @@ struct mtk_thermal {
.auxadc_channel = MT8173_TEMP_AUXADC_CHANNEL,
.num_banks = MT8173_NUM_ZONES,
.num_sensors = MT8173_NUM_SENSORS,
+ .vts_index = mt8173_vts_index,
.bank_data = {
{
.num_sensors = 2,
@@ -305,6 +329,7 @@ struct mtk_thermal {
.auxadc_channel = MT2701_TEMP_AUXADC_CHANNEL,
.num_banks = 1,
.num_sensors = MT2701_NUM_SENSORS,
+ .vts_index = mt2701_vts_index,
.bank_data = {
{
.num_sensors = 3,
@@ -330,6 +355,7 @@ struct mtk_thermal {
.auxadc_channel = MT2712_TEMP_AUXADC_CHANNEL,
.num_banks = 1,
.num_sensors = MT2712_NUM_SENSORS,
+ .vts_index = mt2712_vts_index,
.bank_data = {
{
.num_sensors = 4,
@@ -349,6 +375,7 @@ struct mtk_thermal {
.auxadc_channel = MT7622_TEMP_AUXADC_CHANNEL,
.num_banks = MT7622_NUM_ZONES,
.num_sensors = MT7622_NUM_SENSORS,
+ .vts_index = mt7622_vts_index,
.bank_data = {
{
.num_sensors = 1,
@@ -629,19 +656,37 @@ static int mtk_thermal_get_calibration_data(struct device *dev,
goto out;
}
- if (buf[0] & MT8173_CALIB_BUF0_VALID) {
- mt->adc_ge = MT8173_CALIB_BUF1_ADC_GE(buf[1]);
- mt->vts[MT8173_TS1] = MT8173_CALIB_BUF0_VTS_TS1(buf[0]);
- mt->vts[MT8173_TS2] = MT8173_CALIB_BUF0_VTS_TS2(buf[0]);
- mt->vts[MT8173_TS3] = MT8173_CALIB_BUF1_VTS_TS3(buf[1]);
- mt->vts[MT8173_TS4] = MT8173_CALIB_BUF2_VTS_TS4(buf[2]);
- mt->vts[MT8173_TSABB] = MT8173_CALIB_BUF2_VTS_TSABB(buf[2]);
- mt->degc_cali = MT8173_CALIB_BUF0_DEGC_CALI(buf[0]);
- if (MT8173_CALIB_BUF1_ID(buf[1]) &
- MT8173_CALIB_BUF0_O_SLOPE_SIGN(buf[0]))
- mt->o_slope = -MT8173_CALIB_BUF0_O_SLOPE(buf[0]);
+ if (buf[0] & CALIB_BUF0_VALID) {
+ mt->adc_ge = CALIB_BUF1_ADC_GE(buf[1]);
+
+ for (i = 0; i < mt->conf->num_sensors; i++) {
+ switch (mt->conf->vts_index[i]) {
+ case VTS1:
+ mt->vts[VTS1] = CALIB_BUF0_VTS_TS1(buf[0]);
+ break;
+ case VTS2:
+ mt->vts[VTS2] = CALIB_BUF0_VTS_TS2(buf[0]);
+ break;
+ case VTS3:
+ mt->vts[VTS3] = CALIB_BUF1_VTS_TS3(buf[1]);
+ break;
+ case VTS4:
+ mt->vts[VTS4] = CALIB_BUF2_VTS_TS4(buf[2]);
+ break;
+ case VTSABB:
+ mt->vts[VTSABB] = CALIB_BUF2_VTS_TSABB(buf[2]);
+ break;
+ default:
+ break;
+ }
+ }
+
+ mt->degc_cali = CALIB_BUF0_DEGC_CALI(buf[0]);
+ if (CALIB_BUF1_ID(buf[1]) &
+ CALIB_BUF0_O_SLOPE_SIGN(buf[0]))
+ mt->o_slope = -CALIB_BUF0_O_SLOPE(buf[0]);
else
- mt->o_slope = MT8173_CALIB_BUF0_O_SLOPE(buf[0]);
+ mt->o_slope = CALIB_BUF0_O_SLOPE(buf[0]);
} else {
dev_info(dev, "Device not calibrated, using default calibration values\n");
}
--
1.9.1
Hi Michael,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on soc-thermal/next]
[also build test WARNING on v5.0-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/michael-kao-mediatek-com/Add-Mediatek-thermal-dirver-for-mt8183/20190204-131145
base: https://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git next
reproduce:
# apt-get install sparse
make ARCH=x86_64 allmodconfig
make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'
All warnings (new ones prefixed by >>):
>> drivers/thermal/mtk_thermal.c:558:50: sparse: warning: incorrect type in initializer (different address spaces)
drivers/thermal/mtk_thermal.c:558:50: sparse: expected void *controller_base
drivers/thermal/mtk_thermal.c:558:50: sparse: got void [noderef] <asn:2> *
>> drivers/thermal/mtk_thermal.c:566:62: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:566:62: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:566:62: sparse: got void *
drivers/thermal/mtk_thermal.c:574:41: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:574:41: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:574:41: sparse: got void *
drivers/thermal/mtk_thermal.c:578:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:578:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:578:32: sparse: got void *
drivers/thermal/mtk_thermal.c:581:37: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:581:37: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:581:37: sparse: got void *
drivers/thermal/mtk_thermal.c:584:44: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:584:44: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:584:44: sparse: got void *
drivers/thermal/mtk_thermal.c:587:37: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:587:37: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:587:37: sparse: got void *
drivers/thermal/mtk_thermal.c:588:37: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:588:37: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:588:37: sparse: got void *
drivers/thermal/mtk_thermal.c:603:59: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:603:59: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:603:59: sparse: got void *
drivers/thermal/mtk_thermal.c:607:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:607:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:607:32: sparse: got void *
drivers/thermal/mtk_thermal.c:611:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:611:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:611:32: sparse: got void *
drivers/thermal/mtk_thermal.c:614:59: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:614:59: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:614:59: sparse: got void *
drivers/thermal/mtk_thermal.c:618:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:618:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:618:32: sparse: got void *
drivers/thermal/mtk_thermal.c:622:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:622:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:622:32: sparse: got void *
drivers/thermal/mtk_thermal.c:626:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:626:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:626:32: sparse: got void *
drivers/thermal/mtk_thermal.c:629:37: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:629:37: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:629:37: sparse: got void *
drivers/thermal/mtk_thermal.c:633:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:633:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:633:32: sparse: got void *
drivers/thermal/mtk_thermal.c:636:37: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:636:37: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:636:37: sparse: got void *
drivers/thermal/mtk_thermal.c:640:33: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:640:33: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:640:33: sparse: got void *
drivers/thermal/mtk_thermal.c:648:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:648:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:648:32: sparse: got void *
drivers/thermal/mtk_thermal.c:652:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:652:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:652:32: sparse: got void *
sparse warnings: (new ones prefixed by >>)
drivers/thermal/mtk_thermal.c:558:50: sparse: warning: incorrect type in initializer (different address spaces)
>> drivers/thermal/mtk_thermal.c:558:50: sparse: expected void *controller_base
>> drivers/thermal/mtk_thermal.c:558:50: sparse: got void [noderef] <asn:2> *
drivers/thermal/mtk_thermal.c:566:62: sparse: warning: incorrect type in argument 2 (different address spaces)
>> drivers/thermal/mtk_thermal.c:566:62: sparse: expected void volatile [noderef] <asn:2> *addr
>> drivers/thermal/mtk_thermal.c:566:62: sparse: got void *
drivers/thermal/mtk_thermal.c:574:41: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:574:41: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:574:41: sparse: got void *
drivers/thermal/mtk_thermal.c:578:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:578:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:578:32: sparse: got void *
drivers/thermal/mtk_thermal.c:581:37: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:581:37: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:581:37: sparse: got void *
drivers/thermal/mtk_thermal.c:584:44: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:584:44: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:584:44: sparse: got void *
drivers/thermal/mtk_thermal.c:587:37: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:587:37: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:587:37: sparse: got void *
drivers/thermal/mtk_thermal.c:588:37: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:588:37: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:588:37: sparse: got void *
drivers/thermal/mtk_thermal.c:603:59: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:603:59: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:603:59: sparse: got void *
drivers/thermal/mtk_thermal.c:607:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:607:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:607:32: sparse: got void *
drivers/thermal/mtk_thermal.c:611:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:611:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:611:32: sparse: got void *
drivers/thermal/mtk_thermal.c:614:59: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:614:59: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:614:59: sparse: got void *
drivers/thermal/mtk_thermal.c:618:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:618:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:618:32: sparse: got void *
drivers/thermal/mtk_thermal.c:622:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:622:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:622:32: sparse: got void *
drivers/thermal/mtk_thermal.c:626:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:626:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:626:32: sparse: got void *
drivers/thermal/mtk_thermal.c:629:37: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:629:37: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:629:37: sparse: got void *
drivers/thermal/mtk_thermal.c:633:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:633:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:633:32: sparse: got void *
drivers/thermal/mtk_thermal.c:636:37: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:636:37: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:636:37: sparse: got void *
drivers/thermal/mtk_thermal.c:640:33: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:640:33: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:640:33: sparse: got void *
drivers/thermal/mtk_thermal.c:648:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:648:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:648:32: sparse: got void *
drivers/thermal/mtk_thermal.c:652:32: sparse: warning: incorrect type in argument 2 (different address spaces)
drivers/thermal/mtk_thermal.c:652:32: sparse: expected void volatile [noderef] <asn:2> *addr
drivers/thermal/mtk_thermal.c:652:32: sparse: got void *
vim +558 drivers/thermal/mtk_thermal.c
548
549 static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
550 u32 apmixed_phys_base, u32 auxadc_phys_base,
551 int ctrl_id)
552 {
553 struct mtk_thermal_bank *bank = &mt->banks[num];
554 const struct mtk_thermal_data *conf = mt->conf;
555 int i;
556
557 int offset = mt->conf->controller_offset[ctrl_id];
> 558 void *controller_base = mt->thermal_base + offset;
559
560 bank->id = num;
561 bank->mt = mt;
562
563 mtk_thermal_get_bank(bank);
564
565 /* bus clock 66M counting unit is 12 * 15.15ns * 256 = 46.540us */
> 566 writel(TEMP_MONCTL1_PERIOD_UNIT(12), controller_base + TEMP_MONCTL1);
567
568 /*
569 * filt interval is 1 * 46.540us = 46.54us,
570 * sen interval is 429 * 46.540us = 19.96ms
571 */
572 writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
573 TEMP_MONCTL2_SENSOR_INTERVAL(429),
574 controller_base + TEMP_MONCTL2);
575
576 /* poll is set to 10u */
577 writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
578 controller_base + TEMP_AHBPOLL);
579
580 /* temperature sampling control, 1 sample */
581 writel(0x0, controller_base + TEMP_MSRCTL0);
582
583 /* exceed this polling time, IRQ would be inserted */
584 writel(0xffffffff, controller_base + TEMP_AHBTO);
585
586 /* number of interrupts per event, 1 is enough */
587 writel(0x0, controller_base + TEMP_MONIDET0);
588 writel(0x0, controller_base + TEMP_MONIDET1);
589
590 /*
591 * The MT8173 thermal controller does not have its own ADC. Instead it
592 * uses AHB bus accesses to control the AUXADC. To do this the thermal
593 * controller has to be programmed with the physical addresses of the
594 * AUXADC registers and with the various bit positions in the AUXADC.
595 * Also the thermal controller controls a mux in the APMIXEDSYS register
596 * space.
597 */
598
599 /*
600 * this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
601 * automatically by hw
602 */
603 writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCMUX);
604
605 /* AHB address for auxadc mux selection */
606 writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
607 controller_base + TEMP_ADCMUXADDR);
608
609 /* AHB address for pnp sensor mux selection */
610 writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
611 controller_base + TEMP_PNPMUXADDR);
612
613 /* AHB value for auxadc enable */
614 writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCEN);
615
616 /* AHB address for auxadc enable (channel 0 immediate mode selected) */
617 writel(auxadc_phys_base + AUXADC_CON1_SET_V,
618 controller_base + TEMP_ADCENADDR);
619
620 /* AHB address for auxadc valid bit */
621 writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
622 controller_base + TEMP_ADCVALIDADDR);
623
624 /* AHB address for auxadc voltage output */
625 writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
626 controller_base + TEMP_ADCVOLTADDR);
627
628 /* read valid & voltage are at the same register */
629 writel(0x0, controller_base + TEMP_RDCTRL);
630
631 /* indicate where the valid bit is */
632 writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
633 controller_base + TEMP_ADCVALIDMASK);
634
635 /* no shift */
636 writel(0x0, controller_base + TEMP_ADCVOLTAGESHIFT);
637
638 /* enable auxadc mux write transaction */
639 writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
640 controller_base + TEMP_ADCWRITECTRL);
641
642 for (i = 0; i < conf->bank_data[num].num_sensors; i++)
643 writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]],
644 mt->thermal_base +
645 conf->adcpnp[conf->bank_data[num].sensors[i]]);
646
647 writel((1 << conf->bank_data[num].num_sensors) - 1,
648 controller_base + TEMP_MONCTL0);
649
650 writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE |
651 TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
652 controller_base + TEMP_ADCWRITECTRL);
653
654 mtk_thermal_put_bank(bank);
655 }
656
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
On 01/02/2019 08:38, [email protected] wrote:
> From: Michael Kao <[email protected]>
>
> The index of msr and adcpnp should match the sensor
> which belongs to the selected bank in the for loop.
>
If I get that right, this fixes
b7cf0053738c ("thermal: Add Mediatek thermal driver for mt2701.")
So please add a fixes tag to the commit.
Thanks,
Matthias
> Signed-off-by: Michael Kao <[email protected]>
> ---
> drivers/thermal/mtk_thermal.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> index 0691f26..f646436 100644
> --- a/drivers/thermal/mtk_thermal.c
> +++ b/drivers/thermal/mtk_thermal.c
> @@ -431,7 +431,8 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
> u32 raw;
>
> for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) {
> - raw = readl(mt->thermal_base + conf->msr[i]);
> + raw = readl(mt->thermal_base +
> + conf->msr[conf->bank_data[bank->id].sensors[i]]);
>
> temp = raw_to_mcelsius(mt,
> conf->bank_data[bank->id].sensors[i],
> @@ -568,7 +569,8 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
>
> for (i = 0; i < conf->bank_data[num].num_sensors; i++)
> writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]],
> - mt->thermal_base + conf->adcpnp[i]);
> + mt->thermal_base +
> + conf->adcpnp[conf->bank_data[num].sensors[i]]);
>
> writel((1 << conf->bank_data[num].num_sensors) - 1,
> mt->thermal_base + TEMP_MONCTL0);
>
On 01/02/2019 08:38, [email protected] wrote:
> From: Michael Kao <[email protected]>
>
> Add calibration item in thermal_data to support
> the project with different calibration coefficient.
>
> Signed-off-by: Michael Kao <[email protected]>
> ---
> drivers/thermal/mtk_thermal.c | 19 ++++++++++++++++++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> index 07f8ad7..45c6587 100644
> --- a/drivers/thermal/mtk_thermal.c
> +++ b/drivers/thermal/mtk_thermal.c
> @@ -105,6 +105,9 @@
> /* The number of sensing points per bank */
> #define MT8173_NUM_SENSORS_PER_ZONE 4
>
> +/* The calibration coefficient of sensor */
> +#define MT8173_CALIBRATION 165
> +
Calibration value is the same for all SoCs (including mt8183), we can define it
once and use it in all mtk_thermal structs.
Regards,
Matthias
> /*
> * Layout of the fuses providing the calibration data
> * These macros could be used for MT8173, MT2701, and MT2712.
> @@ -147,6 +150,9 @@ enum {
> /* The number of sensing points per bank */
> #define MT2701_NUM_SENSORS_PER_ZONE 3
>
> +/* The calibration coefficient of sensor */
> +#define MT2701_CALIBRATION 165
> +
> /* MT2712 thermal sensors */
> #define MT2712_TS1 0
> #define MT2712_TS2 1
> @@ -162,12 +168,18 @@ enum {
> /* The number of sensing points per bank */
> #define MT2712_NUM_SENSORS_PER_ZONE 4
>
> +/* The calibration coefficient of sensor */
> +#define MT2712_CALIBRATION 165
> +
> #define MT7622_TEMP_AUXADC_CHANNEL 11
> #define MT7622_NUM_SENSORS 1
> #define MT7622_NUM_ZONES 1
> #define MT7622_NUM_SENSORS_PER_ZONE 1
> #define MT7622_TS1 0
>
> +/* The calibration coefficient of sensor */
> +#define MT7622_CALIBRATION 165
> +
> struct mtk_thermal;
>
> struct thermal_bank_cfg {
> @@ -188,6 +200,7 @@ struct mtk_thermal_data {
> const int *sensor_mux_values;
> const int *msr;
> const int *adcpnp;
> + const int cali_val;
> struct thermal_bank_cfg bank_data[];
> };
>
> @@ -295,6 +308,7 @@ struct mtk_thermal {
> .num_banks = MT8173_NUM_ZONES,
> .num_sensors = MT8173_NUM_SENSORS,
> .vts_index = mt8173_vts_index,
> + .cali_val = MT8173_CALIBRATION,
> .bank_data = {
> {
> .num_sensors = 2,
> @@ -330,6 +344,7 @@ struct mtk_thermal {
> .num_banks = 1,
> .num_sensors = MT2701_NUM_SENSORS,
> .vts_index = mt2701_vts_index,
> + .cali_val = MT2701_CALIBRATION,
> .bank_data = {
> {
> .num_sensors = 3,
> @@ -356,6 +371,7 @@ struct mtk_thermal {
> .num_banks = 1,
> .num_sensors = MT2712_NUM_SENSORS,
> .vts_index = mt2712_vts_index,
> + .cali_val = MT2712_CALIBRATION,
> .bank_data = {
> {
> .num_sensors = 4,
> @@ -376,6 +392,7 @@ struct mtk_thermal {
> .num_banks = MT7622_NUM_ZONES,
> .num_sensors = MT7622_NUM_SENSORS,
> .vts_index = mt7622_vts_index,
> + .cali_val = MT7622_CALIBRATION,
> .bank_data = {
> {
> .num_sensors = 1,
> @@ -402,7 +419,7 @@ static int raw_to_mcelsius(struct mtk_thermal *mt, int sensno, s32 raw)
> raw &= 0xfff;
>
> tmp = 203450520 << 3;
> - tmp /= 165 + mt->o_slope;
> + tmp /= mt->conf->cali_val + mt->o_slope;
> tmp /= 10000 + mt->adc_ge;
> tmp *= raw - mt->vts[sensno] - 3350;
> tmp >>= 3;
>
On Mon, Feb 04, 2019 at 06:31:41PM +0100, Matthias Brugger wrote:
>
>
> On 01/02/2019 08:38, [email protected] wrote:
> > From: Michael Kao <[email protected]>
> >
> > Add calibration item in thermal_data to support
> > the project with different calibration coefficient.
> >
> > Signed-off-by: Michael Kao <[email protected]>
> > ---
> > drivers/thermal/mtk_thermal.c | 19 ++++++++++++++++++-
> > 1 file changed, 18 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> > index 07f8ad7..45c6587 100644
> > --- a/drivers/thermal/mtk_thermal.c
> > +++ b/drivers/thermal/mtk_thermal.c
> > @@ -105,6 +105,9 @@
> > /* The number of sensing points per bank */
> > #define MT8173_NUM_SENSORS_PER_ZONE 4
> >
> > +/* The calibration coefficient of sensor */
> > +#define MT8173_CALIBRATION 165
> > +
>
> Calibration value is the same for all SoCs (including mt8183), we can define it
> once and use it in all mtk_thermal structs.
Well, on patch 7 we have:
+#define MT8183_CALIBRATION 153
>
> Regards,
> Matthias
>
>
> > /*
> > * Layout of the fuses providing the calibration data
> > * These macros could be used for MT8173, MT2701, and MT2712.
> > @@ -147,6 +150,9 @@ enum {
> > /* The number of sensing points per bank */
> > #define MT2701_NUM_SENSORS_PER_ZONE 3
> >
> > +/* The calibration coefficient of sensor */
> > +#define MT2701_CALIBRATION 165
> > +
> > /* MT2712 thermal sensors */
> > #define MT2712_TS1 0
> > #define MT2712_TS2 1
> > @@ -162,12 +168,18 @@ enum {
> > /* The number of sensing points per bank */
> > #define MT2712_NUM_SENSORS_PER_ZONE 4
> >
> > +/* The calibration coefficient of sensor */
> > +#define MT2712_CALIBRATION 165
> > +
> > #define MT7622_TEMP_AUXADC_CHANNEL 11
> > #define MT7622_NUM_SENSORS 1
> > #define MT7622_NUM_ZONES 1
> > #define MT7622_NUM_SENSORS_PER_ZONE 1
> > #define MT7622_TS1 0
> >
> > +/* The calibration coefficient of sensor */
> > +#define MT7622_CALIBRATION 165
> > +
> > struct mtk_thermal;
> >
> > struct thermal_bank_cfg {
> > @@ -188,6 +200,7 @@ struct mtk_thermal_data {
> > const int *sensor_mux_values;
> > const int *msr;
> > const int *adcpnp;
> > + const int cali_val;
> > struct thermal_bank_cfg bank_data[];
> > };
> >
> > @@ -295,6 +308,7 @@ struct mtk_thermal {
> > .num_banks = MT8173_NUM_ZONES,
> > .num_sensors = MT8173_NUM_SENSORS,
> > .vts_index = mt8173_vts_index,
> > + .cali_val = MT8173_CALIBRATION,
> > .bank_data = {
> > {
> > .num_sensors = 2,
> > @@ -330,6 +344,7 @@ struct mtk_thermal {
> > .num_banks = 1,
> > .num_sensors = MT2701_NUM_SENSORS,
> > .vts_index = mt2701_vts_index,
> > + .cali_val = MT2701_CALIBRATION,
> > .bank_data = {
> > {
> > .num_sensors = 3,
> > @@ -356,6 +371,7 @@ struct mtk_thermal {
> > .num_banks = 1,
> > .num_sensors = MT2712_NUM_SENSORS,
> > .vts_index = mt2712_vts_index,
> > + .cali_val = MT2712_CALIBRATION,
> > .bank_data = {
> > {
> > .num_sensors = 4,
> > @@ -376,6 +392,7 @@ struct mtk_thermal {
> > .num_banks = MT7622_NUM_ZONES,
> > .num_sensors = MT7622_NUM_SENSORS,
> > .vts_index = mt7622_vts_index,
> > + .cali_val = MT7622_CALIBRATION,
> > .bank_data = {
> > {
> > .num_sensors = 1,
> > @@ -402,7 +419,7 @@ static int raw_to_mcelsius(struct mtk_thermal *mt, int sensno, s32 raw)
> > raw &= 0xfff;
> >
> > tmp = 203450520 << 3;
> > - tmp /= 165 + mt->o_slope;
> > + tmp /= mt->conf->cali_val + mt->o_slope;
> > tmp /= 10000 + mt->adc_ge;
> > tmp *= raw - mt->vts[sensno] - 3350;
> > tmp >>= 3;
> >
On Fri, Feb 01, 2019 at 03:38:10PM +0800, [email protected] wrote:
> From: Michael Kao <[email protected]>
>
> One thermal controller can read four sensors at most,
> so we need to add controller_offset for the project with
> more than four sensors to reuse the same register settings.
>
> Signed-off-by: Michael Kao <[email protected]>
> ---
> drivers/thermal/mtk_thermal.c | 79 +++++++++++++++++++++++++++++--------------
> 1 file changed, 54 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> index 45c6587..e5cf3f4 100644
> --- a/drivers/thermal/mtk_thermal.c
> +++ b/drivers/thermal/mtk_thermal.c
> @@ -105,6 +105,9 @@
> /* The number of sensing points per bank */
> #define MT8173_NUM_SENSORS_PER_ZONE 4
>
> +/* The number of controller in the MT8173 */
> +#define MT8173_NUM_CONTROLLER 1
> +
> /* The calibration coefficient of sensor */
> #define MT8173_CALIBRATION 165
>
> @@ -150,6 +153,9 @@ enum {
> /* The number of sensing points per bank */
> #define MT2701_NUM_SENSORS_PER_ZONE 3
>
> +/* The number of controller in the MT2701 */
> +#define MT2701_NUM_CONTROLLER 1
> +
> /* The calibration coefficient of sensor */
> #define MT2701_CALIBRATION 165
>
> @@ -168,6 +174,9 @@ enum {
> /* The number of sensing points per bank */
> #define MT2712_NUM_SENSORS_PER_ZONE 4
>
> +/* The number of controller in the MT2712 */
> +#define MT2712_NUM_CONTROLLER 1
> +
> /* The calibration coefficient of sensor */
> #define MT2712_CALIBRATION 165
>
> @@ -176,6 +185,7 @@ enum {
> #define MT7622_NUM_ZONES 1
> #define MT7622_NUM_SENSORS_PER_ZONE 1
> #define MT7622_TS1 0
> +#define MT7622_NUM_CONTROLLER 1
>
> /* The calibration coefficient of sensor */
> #define MT7622_CALIBRATION 165
> @@ -201,6 +211,8 @@ struct mtk_thermal_data {
> const int *msr;
> const int *adcpnp;
> const int cali_val;
> + const int num_controller;
> + const int *controller_offset;
> struct thermal_bank_cfg bank_data[];
> };
>
> @@ -240,6 +252,7 @@ struct mtk_thermal {
> };
>
> static const int mt8173_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
> +static const int mt8173_tc_offset[MT8173_NUM_CONTROLLER] = { 0x0, };
>
> static const int mt8173_vts_index[MT8173_NUM_SENSORS] = {
> VTS1, VTS2, VTS3, VTS4, VTSABB
> @@ -259,6 +272,7 @@ struct mtk_thermal {
> };
>
> static const int mt2701_mux_values[MT2701_NUM_SENSORS] = { 0, 1, 16 };
> +static const int mt2701_tc_offset[MT2701_NUM_CONTROLLER] = { 0x0, };
>
> static const int mt2701_vts_index[MT2701_NUM_SENSORS] = {
> VTS1, VTS2, VTS3
> @@ -278,6 +292,7 @@ struct mtk_thermal {
> };
>
> static const int mt2712_mux_values[MT2712_NUM_SENSORS] = { 0, 1, 2, 3 };
> +static const int mt2712_tc_offset[MT2712_NUM_CONTROLLER] = { 0x0, };
>
> static const int mt2712_vts_index[MT2712_NUM_SENSORS] = {
> VTS1, VTS2, VTS3, VTS4
> @@ -289,6 +304,7 @@ struct mtk_thermal {
> static const int mt7622_adcpnp[MT7622_NUM_SENSORS_PER_ZONE] = { TEMP_ADCPNP0, };
> static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, };
> static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 };
> +static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, };
>
> /**
> * The MT8173 thermal controller has four banks. Each bank can read up to
> @@ -309,6 +325,8 @@ struct mtk_thermal {
> .num_sensors = MT8173_NUM_SENSORS,
> .vts_index = mt8173_vts_index,
> .cali_val = MT8173_CALIBRATION,
> + .num_controller = MT8173_NUM_CONTROLLER,
> + .controller_offset = mt8173_tc_offset,
> .bank_data = {
> {
> .num_sensors = 2,
> @@ -345,6 +363,8 @@ struct mtk_thermal {
> .num_sensors = MT2701_NUM_SENSORS,
> .vts_index = mt2701_vts_index,
> .cali_val = MT2701_CALIBRATION,
> + .num_controller = MT2701_NUM_CONTROLLER,
> + .controller_offset = mt2701_tc_offset,
> .bank_data = {
> {
> .num_sensors = 3,
> @@ -372,6 +392,8 @@ struct mtk_thermal {
> .num_sensors = MT2712_NUM_SENSORS,
> .vts_index = mt2712_vts_index,
> .cali_val = MT2712_CALIBRATION,
> + .num_controller = MT2712_NUM_CONTROLLER,
> + .controller_offset = mt2712_tc_offset,
> .bank_data = {
> {
> .num_sensors = 4,
> @@ -393,6 +415,8 @@ struct mtk_thermal {
> .num_sensors = MT7622_NUM_SENSORS,
> .vts_index = mt7622_vts_index,
> .cali_val = MT7622_CALIBRATION,
> + .num_controller = MT7622_NUM_CONTROLLER,
> + .controller_offset = mt7622_tc_offset,
> .bank_data = {
> {
> .num_sensors = 1,
> @@ -523,19 +547,23 @@ static int mtk_read_temp(void *data, int *temperature)
> };
>
> static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> - u32 apmixed_phys_base, u32 auxadc_phys_base)
> + u32 apmixed_phys_base, u32 auxadc_phys_base,
> + int ctrl_id)
> {
> struct mtk_thermal_bank *bank = &mt->banks[num];
> const struct mtk_thermal_data *conf = mt->conf;
> int i;
>
> + int offset = mt->conf->controller_offset[ctrl_id];
> + void *controller_base = mt->thermal_base + offset;
This void * has to be at least __iomem, right?
See the report of kbuild bot, fix it and send it back.
> +
> bank->id = num;
> bank->mt = mt;
>
> mtk_thermal_get_bank(bank);
>
> /* bus clock 66M counting unit is 12 * 15.15ns * 256 = 46.540us */
> - writel(TEMP_MONCTL1_PERIOD_UNIT(12), mt->thermal_base + TEMP_MONCTL1);
> + writel(TEMP_MONCTL1_PERIOD_UNIT(12), controller_base + TEMP_MONCTL1);
>
> /*
> * filt interval is 1 * 46.540us = 46.54us,
> @@ -543,21 +571,21 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> */
> writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
> TEMP_MONCTL2_SENSOR_INTERVAL(429),
> - mt->thermal_base + TEMP_MONCTL2);
> + controller_base + TEMP_MONCTL2);
>
> /* poll is set to 10u */
> writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
> - mt->thermal_base + TEMP_AHBPOLL);
> + controller_base + TEMP_AHBPOLL);
>
> /* temperature sampling control, 1 sample */
> - writel(0x0, mt->thermal_base + TEMP_MSRCTL0);
> + writel(0x0, controller_base + TEMP_MSRCTL0);
>
> /* exceed this polling time, IRQ would be inserted */
> - writel(0xffffffff, mt->thermal_base + TEMP_AHBTO);
> + writel(0xffffffff, controller_base + TEMP_AHBTO);
>
> /* number of interrupts per event, 1 is enough */
> - writel(0x0, mt->thermal_base + TEMP_MONIDET0);
> - writel(0x0, mt->thermal_base + TEMP_MONIDET1);
> + writel(0x0, controller_base + TEMP_MONIDET0);
> + writel(0x0, controller_base + TEMP_MONIDET1);
>
> /*
> * The MT8173 thermal controller does not have its own ADC. Instead it
> @@ -572,44 +600,44 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> * this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
> * automatically by hw
> */
> - writel(BIT(conf->auxadc_channel), mt->thermal_base + TEMP_ADCMUX);
> + writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCMUX);
>
> /* AHB address for auxadc mux selection */
> writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
> - mt->thermal_base + TEMP_ADCMUXADDR);
> + controller_base + TEMP_ADCMUXADDR);
>
> /* AHB address for pnp sensor mux selection */
> writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
> - mt->thermal_base + TEMP_PNPMUXADDR);
> + controller_base + TEMP_PNPMUXADDR);
>
> /* AHB value for auxadc enable */
> - writel(BIT(conf->auxadc_channel), mt->thermal_base + TEMP_ADCEN);
> + writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCEN);
>
> /* AHB address for auxadc enable (channel 0 immediate mode selected) */
> writel(auxadc_phys_base + AUXADC_CON1_SET_V,
> - mt->thermal_base + TEMP_ADCENADDR);
> + controller_base + TEMP_ADCENADDR);
>
> /* AHB address for auxadc valid bit */
> writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
> - mt->thermal_base + TEMP_ADCVALIDADDR);
> + controller_base + TEMP_ADCVALIDADDR);
>
> /* AHB address for auxadc voltage output */
> writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
> - mt->thermal_base + TEMP_ADCVOLTADDR);
> + controller_base + TEMP_ADCVOLTADDR);
>
> /* read valid & voltage are at the same register */
> - writel(0x0, mt->thermal_base + TEMP_RDCTRL);
> + writel(0x0, controller_base + TEMP_RDCTRL);
>
> /* indicate where the valid bit is */
> writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
> - mt->thermal_base + TEMP_ADCVALIDMASK);
> + controller_base + TEMP_ADCVALIDMASK);
>
> /* no shift */
> - writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT);
> + writel(0x0, controller_base + TEMP_ADCVOLTAGESHIFT);
>
> /* enable auxadc mux write transaction */
> writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> - mt->thermal_base + TEMP_ADCWRITECTRL);
> + controller_base + TEMP_ADCWRITECTRL);
>
> for (i = 0; i < conf->bank_data[num].num_sensors; i++)
> writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]],
> @@ -617,11 +645,11 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> conf->adcpnp[conf->bank_data[num].sensors[i]]);
>
> writel((1 << conf->bank_data[num].num_sensors) - 1,
> - mt->thermal_base + TEMP_MONCTL0);
> + controller_base + TEMP_MONCTL0);
>
> writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE |
> TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> - mt->thermal_base + TEMP_ADCWRITECTRL);
> + controller_base + TEMP_ADCWRITECTRL);
>
> mtk_thermal_put_bank(bank);
> }
> @@ -737,7 +765,7 @@ static int mtk_thermal_get_calibration_data(struct device *dev,
>
> static int mtk_thermal_probe(struct platform_device *pdev)
> {
> - int ret, i;
> + int ret, i, ctrl_id;
> struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node;
> struct mtk_thermal *mt;
> struct resource *res;
> @@ -817,9 +845,10 @@ static int mtk_thermal_probe(struct platform_device *pdev)
> goto err_disable_clk_auxadc;
> }
>
> - for (i = 0; i < mt->conf->num_banks; i++)
> - mtk_thermal_init_bank(mt, i, apmixed_phys_base,
> - auxadc_phys_base);
> + for (ctrl_id = 0; ctrl_id < mt->conf->num_controller ; ctrl_id++)
> + for (i = 0; i < mt->conf->num_banks; i++)
> + mtk_thermal_init_bank(mt, i, apmixed_phys_base,
> + auxadc_phys_base, ctrl_id);
>
> platform_set_drvdata(pdev, mt);
>
> --
> 1.9.1
>
On Mon, 2019-02-04 at 18:24 +0100, Matthias Brugger wrote:
>
> On 01/02/2019 08:38, [email protected] wrote:
> > From: Michael Kao <[email protected]>
> >
> > The index of msr and adcpnp should match the sensor
> > which belongs to the selected bank in the for loop.
> >
>
> If I get that right, this fixes
> b7cf0053738c ("thermal: Add Mediatek thermal driver for mt2701.")
>
> So please add a fixes tag to the commit.
It is true that the patch is fix b7cf0053738c.
I will add
Fixes: b7cf0053738c ("thermal: Add Mediatek thermal driver for mt2701.")
to the commit message of next version.
> Thanks,
> Matthias
>
> > Signed-off-by: Michael Kao <[email protected]>
> > ---
> > drivers/thermal/mtk_thermal.c | 6 ++++--
> > 1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> > index 0691f26..f646436 100644
> > --- a/drivers/thermal/mtk_thermal.c
> > +++ b/drivers/thermal/mtk_thermal.c
> > @@ -431,7 +431,8 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
> > u32 raw;
> >
> > for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) {
> > - raw = readl(mt->thermal_base + conf->msr[i]);
> > + raw = readl(mt->thermal_base +
> > + conf->msr[conf->bank_data[bank->id].sensors[i]]);
> >
> > temp = raw_to_mcelsius(mt,
> > conf->bank_data[bank->id].sensors[i],
> > @@ -568,7 +569,8 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> >
> > for (i = 0; i < conf->bank_data[num].num_sensors; i++)
> > writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]],
> > - mt->thermal_base + conf->adcpnp[i]);
> > + mt->thermal_base +
> > + conf->adcpnp[conf->bank_data[num].sensors[i]]);
> >
> > writel((1 << conf->bank_data[num].num_sensors) - 1,
> > mt->thermal_base + TEMP_MONCTL0);
> >
On Tue, 2019-02-05 at 16:53 -0800, Eduardo Valentin wrote:
> On Fri, Feb 01, 2019 at 03:38:10PM +0800, [email protected] wrote:
> > From: Michael Kao <[email protected]>
> >
> > One thermal controller can read four sensors at most,
> > so we need to add controller_offset for the project with
> > more than four sensors to reuse the same register settings.
> >
> > Signed-off-by: Michael Kao <[email protected]>
> > ---
> > drivers/thermal/mtk_thermal.c | 79 +++++++++++++++++++++++++++++--------------
> > 1 file changed, 54 insertions(+), 25 deletions(-)
> >
> > diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
> > index 45c6587..e5cf3f4 100644
> > --- a/drivers/thermal/mtk_thermal.c
> > +++ b/drivers/thermal/mtk_thermal.c
> > @@ -105,6 +105,9 @@
> > /* The number of sensing points per bank */
> > #define MT8173_NUM_SENSORS_PER_ZONE 4
> >
> > +/* The number of controller in the MT8173 */
> > +#define MT8173_NUM_CONTROLLER 1
> > +
> > /* The calibration coefficient of sensor */
> > #define MT8173_CALIBRATION 165
> >
> > @@ -150,6 +153,9 @@ enum {
> > /* The number of sensing points per bank */
> > #define MT2701_NUM_SENSORS_PER_ZONE 3
> >
> > +/* The number of controller in the MT2701 */
> > +#define MT2701_NUM_CONTROLLER 1
> > +
> > /* The calibration coefficient of sensor */
> > #define MT2701_CALIBRATION 165
> >
> > @@ -168,6 +174,9 @@ enum {
> > /* The number of sensing points per bank */
> > #define MT2712_NUM_SENSORS_PER_ZONE 4
> >
> > +/* The number of controller in the MT2712 */
> > +#define MT2712_NUM_CONTROLLER 1
> > +
> > /* The calibration coefficient of sensor */
> > #define MT2712_CALIBRATION 165
> >
> > @@ -176,6 +185,7 @@ enum {
> > #define MT7622_NUM_ZONES 1
> > #define MT7622_NUM_SENSORS_PER_ZONE 1
> > #define MT7622_TS1 0
> > +#define MT7622_NUM_CONTROLLER 1
> >
> > /* The calibration coefficient of sensor */
> > #define MT7622_CALIBRATION 165
> > @@ -201,6 +211,8 @@ struct mtk_thermal_data {
> > const int *msr;
> > const int *adcpnp;
> > const int cali_val;
> > + const int num_controller;
> > + const int *controller_offset;
> > struct thermal_bank_cfg bank_data[];
> > };
> >
> > @@ -240,6 +252,7 @@ struct mtk_thermal {
> > };
> >
> > static const int mt8173_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
> > +static const int mt8173_tc_offset[MT8173_NUM_CONTROLLER] = { 0x0, };
> >
> > static const int mt8173_vts_index[MT8173_NUM_SENSORS] = {
> > VTS1, VTS2, VTS3, VTS4, VTSABB
> > @@ -259,6 +272,7 @@ struct mtk_thermal {
> > };
> >
> > static const int mt2701_mux_values[MT2701_NUM_SENSORS] = { 0, 1, 16 };
> > +static const int mt2701_tc_offset[MT2701_NUM_CONTROLLER] = { 0x0, };
> >
> > static const int mt2701_vts_index[MT2701_NUM_SENSORS] = {
> > VTS1, VTS2, VTS3
> > @@ -278,6 +292,7 @@ struct mtk_thermal {
> > };
> >
> > static const int mt2712_mux_values[MT2712_NUM_SENSORS] = { 0, 1, 2, 3 };
> > +static const int mt2712_tc_offset[MT2712_NUM_CONTROLLER] = { 0x0, };
> >
> > static const int mt2712_vts_index[MT2712_NUM_SENSORS] = {
> > VTS1, VTS2, VTS3, VTS4
> > @@ -289,6 +304,7 @@ struct mtk_thermal {
> > static const int mt7622_adcpnp[MT7622_NUM_SENSORS_PER_ZONE] = { TEMP_ADCPNP0, };
> > static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, };
> > static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 };
> > +static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, };
> >
> > /**
> > * The MT8173 thermal controller has four banks. Each bank can read up to
> > @@ -309,6 +325,8 @@ struct mtk_thermal {
> > .num_sensors = MT8173_NUM_SENSORS,
> > .vts_index = mt8173_vts_index,
> > .cali_val = MT8173_CALIBRATION,
> > + .num_controller = MT8173_NUM_CONTROLLER,
> > + .controller_offset = mt8173_tc_offset,
> > .bank_data = {
> > {
> > .num_sensors = 2,
> > @@ -345,6 +363,8 @@ struct mtk_thermal {
> > .num_sensors = MT2701_NUM_SENSORS,
> > .vts_index = mt2701_vts_index,
> > .cali_val = MT2701_CALIBRATION,
> > + .num_controller = MT2701_NUM_CONTROLLER,
> > + .controller_offset = mt2701_tc_offset,
> > .bank_data = {
> > {
> > .num_sensors = 3,
> > @@ -372,6 +392,8 @@ struct mtk_thermal {
> > .num_sensors = MT2712_NUM_SENSORS,
> > .vts_index = mt2712_vts_index,
> > .cali_val = MT2712_CALIBRATION,
> > + .num_controller = MT2712_NUM_CONTROLLER,
> > + .controller_offset = mt2712_tc_offset,
> > .bank_data = {
> > {
> > .num_sensors = 4,
> > @@ -393,6 +415,8 @@ struct mtk_thermal {
> > .num_sensors = MT7622_NUM_SENSORS,
> > .vts_index = mt7622_vts_index,
> > .cali_val = MT7622_CALIBRATION,
> > + .num_controller = MT7622_NUM_CONTROLLER,
> > + .controller_offset = mt7622_tc_offset,
> > .bank_data = {
> > {
> > .num_sensors = 1,
> > @@ -523,19 +547,23 @@ static int mtk_read_temp(void *data, int *temperature)
> > };
> >
> > static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> > - u32 apmixed_phys_base, u32 auxadc_phys_base)
> > + u32 apmixed_phys_base, u32 auxadc_phys_base,
> > + int ctrl_id)
> > {
> > struct mtk_thermal_bank *bank = &mt->banks[num];
> > const struct mtk_thermal_data *conf = mt->conf;
> > int i;
> >
> > + int offset = mt->conf->controller_offset[ctrl_id];
> > + void *controller_base = mt->thermal_base + offset;
>
> This void * has to be at least __iomem, right?
>
> See the report of kbuild bot, fix it and send it back.
>
OK, I will fix the declaration and send it again.
Thanks!
> > +
> > bank->id = num;
> > bank->mt = mt;
> >
> > mtk_thermal_get_bank(bank);
> >
> > /* bus clock 66M counting unit is 12 * 15.15ns * 256 = 46.540us */
> > - writel(TEMP_MONCTL1_PERIOD_UNIT(12), mt->thermal_base + TEMP_MONCTL1);
> > + writel(TEMP_MONCTL1_PERIOD_UNIT(12), controller_base + TEMP_MONCTL1);
> >
> > /*
> > * filt interval is 1 * 46.540us = 46.54us,
> > @@ -543,21 +571,21 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> > */
> > writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
> > TEMP_MONCTL2_SENSOR_INTERVAL(429),
> > - mt->thermal_base + TEMP_MONCTL2);
> > + controller_base + TEMP_MONCTL2);
> >
> > /* poll is set to 10u */
> > writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
> > - mt->thermal_base + TEMP_AHBPOLL);
> > + controller_base + TEMP_AHBPOLL);
> >
> > /* temperature sampling control, 1 sample */
> > - writel(0x0, mt->thermal_base + TEMP_MSRCTL0);
> > + writel(0x0, controller_base + TEMP_MSRCTL0);
> >
> > /* exceed this polling time, IRQ would be inserted */
> > - writel(0xffffffff, mt->thermal_base + TEMP_AHBTO);
> > + writel(0xffffffff, controller_base + TEMP_AHBTO);
> >
> > /* number of interrupts per event, 1 is enough */
> > - writel(0x0, mt->thermal_base + TEMP_MONIDET0);
> > - writel(0x0, mt->thermal_base + TEMP_MONIDET1);
> > + writel(0x0, controller_base + TEMP_MONIDET0);
> > + writel(0x0, controller_base + TEMP_MONIDET1);
> >
> > /*
> > * The MT8173 thermal controller does not have its own ADC. Instead it
> > @@ -572,44 +600,44 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> > * this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
> > * automatically by hw
> > */
> > - writel(BIT(conf->auxadc_channel), mt->thermal_base + TEMP_ADCMUX);
> > + writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCMUX);
> >
> > /* AHB address for auxadc mux selection */
> > writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
> > - mt->thermal_base + TEMP_ADCMUXADDR);
> > + controller_base + TEMP_ADCMUXADDR);
> >
> > /* AHB address for pnp sensor mux selection */
> > writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
> > - mt->thermal_base + TEMP_PNPMUXADDR);
> > + controller_base + TEMP_PNPMUXADDR);
> >
> > /* AHB value for auxadc enable */
> > - writel(BIT(conf->auxadc_channel), mt->thermal_base + TEMP_ADCEN);
> > + writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCEN);
> >
> > /* AHB address for auxadc enable (channel 0 immediate mode selected) */
> > writel(auxadc_phys_base + AUXADC_CON1_SET_V,
> > - mt->thermal_base + TEMP_ADCENADDR);
> > + controller_base + TEMP_ADCENADDR);
> >
> > /* AHB address for auxadc valid bit */
> > writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
> > - mt->thermal_base + TEMP_ADCVALIDADDR);
> > + controller_base + TEMP_ADCVALIDADDR);
> >
> > /* AHB address for auxadc voltage output */
> > writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
> > - mt->thermal_base + TEMP_ADCVOLTADDR);
> > + controller_base + TEMP_ADCVOLTADDR);
> >
> > /* read valid & voltage are at the same register */
> > - writel(0x0, mt->thermal_base + TEMP_RDCTRL);
> > + writel(0x0, controller_base + TEMP_RDCTRL);
> >
> > /* indicate where the valid bit is */
> > writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
> > - mt->thermal_base + TEMP_ADCVALIDMASK);
> > + controller_base + TEMP_ADCVALIDMASK);
> >
> > /* no shift */
> > - writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT);
> > + writel(0x0, controller_base + TEMP_ADCVOLTAGESHIFT);
> >
> > /* enable auxadc mux write transaction */
> > writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> > - mt->thermal_base + TEMP_ADCWRITECTRL);
> > + controller_base + TEMP_ADCWRITECTRL);
> >
> > for (i = 0; i < conf->bank_data[num].num_sensors; i++)
> > writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]],
> > @@ -617,11 +645,11 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
> > conf->adcpnp[conf->bank_data[num].sensors[i]]);
> >
> > writel((1 << conf->bank_data[num].num_sensors) - 1,
> > - mt->thermal_base + TEMP_MONCTL0);
> > + controller_base + TEMP_MONCTL0);
> >
> > writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE |
> > TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
> > - mt->thermal_base + TEMP_ADCWRITECTRL);
> > + controller_base + TEMP_ADCWRITECTRL);
> >
> > mtk_thermal_put_bank(bank);
> > }
> > @@ -737,7 +765,7 @@ static int mtk_thermal_get_calibration_data(struct device *dev,
> >
> > static int mtk_thermal_probe(struct platform_device *pdev)
> > {
> > - int ret, i;
> > + int ret, i, ctrl_id;
> > struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node;
> > struct mtk_thermal *mt;
> > struct resource *res;
> > @@ -817,9 +845,10 @@ static int mtk_thermal_probe(struct platform_device *pdev)
> > goto err_disable_clk_auxadc;
> > }
> >
> > - for (i = 0; i < mt->conf->num_banks; i++)
> > - mtk_thermal_init_bank(mt, i, apmixed_phys_base,
> > - auxadc_phys_base);
> > + for (ctrl_id = 0; ctrl_id < mt->conf->num_controller ; ctrl_id++)
> > + for (i = 0; i < mt->conf->num_banks; i++)
> > + mtk_thermal_init_bank(mt, i, apmixed_phys_base,
> > + auxadc_phys_base, ctrl_id);
> >
> > platform_set_drvdata(pdev, mt);
> >
> > --
> > 1.9.1
> >