Add macro for the SNVS clock of the i.MX8MM.
Signed-off-by: Anson Huang <[email protected]>
---
This patch is based on patch: https://patchwork.kernel.org/patch/10939997/
---
include/dt-bindings/clock/imx8mm-clock.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/imx8mm-clock.h b/include/dt-bindings/clock/imx8mm-clock.h
index fe47798..83f6673 100644
--- a/include/dt-bindings/clock/imx8mm-clock.h
+++ b/include/dt-bindings/clock/imx8mm-clock.h
@@ -245,6 +245,8 @@
#define IMX8MM_CLK_GPIO4_ROOT 226
#define IMX8MM_CLK_GPIO5_ROOT 227
-#define IMX8MM_CLK_END 228
+#define IMX8MM_CLK_SNVS_ROOT 228
+
+#define IMX8MM_CLK_END 229
#endif
--
2.7.4
i.MX8MM has clock gate for SNVS module, add it into clock tree
for SNVS RTC driver to manage.
Signed-off-by: Anson Huang <[email protected]>
---
drivers/clk/imx/clk-imx8mm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 733ca20..7ffbd6e3 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -622,6 +622,7 @@ static int __init imx8mm_clocks_init(struct device_node *ccm_node)
clks[IMX8MM_CLK_SAI5_IPG] = imx_clk_gate2_shared2("sai5_ipg_clk", "ipg_audio_root", base + 0x4370, 0, &share_count_sai5);
clks[IMX8MM_CLK_SAI6_ROOT] = imx_clk_gate2_shared2("sai6_root_clk", "sai6", base + 0x4380, 0, &share_count_sai6);
clks[IMX8MM_CLK_SAI6_IPG] = imx_clk_gate2_shared2("sai6_ipg_clk", "ipg_audio_root", base + 0x4380, 0, &share_count_sai6);
+ clks[IMX8MM_CLK_SNVS_ROOT] = imx_clk_gate4("snvs_root_clk", "ipg_root", base + 0x4470, 0);
clks[IMX8MM_CLK_UART1_ROOT] = imx_clk_gate4("uart1_root_clk", "uart1", base + 0x4490, 0);
clks[IMX8MM_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0);
clks[IMX8MM_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0);
--
2.7.4
i.MX8MM has clock gate for SNVS module, add clock info to SNVS
RTC node for clock management.
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index f32d4e9..a357d82 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -341,6 +341,8 @@
offset = <0x34>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SNVS_ROOT>;
+ clock-names = "snvs-rtc";
};
snvs_pwrkey: snvs-powerkey {
--
2.7.4
On 15.05.2019 04:29, Anson Huang wrote:
> Add macro for the SNVS clock of the i.MX8MM.
>
> Signed-off-by: Anson Huang <[email protected]>
> ---
> This patch is based on patch: https://patchwork.kernel.org/patch/10939997/
Numbering also conflicts with one of my patches:
https://patchwork.kernel.org/patch/10940303/
The conflict is easy to resolve but I don't mind resending if your
patches get accepted first. If should probably resend anyway to also add
gic clk to 8mq.
For series:
Reviewed-by: Leonard Crestez <[email protected]>
Hi, Leonard
> -----Original Message-----
> From: Leonard Crestez
> Sent: Wednesday, May 15, 2019 6:18 PM
> To: Anson Huang <[email protected]>; [email protected];
> [email protected]; Jacky Bai <[email protected]>
> Cc: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; linux-
> [email protected]; [email protected]; dl-linux-imx <linux-
> [email protected]>; Abel Vesa <[email protected]>
> Subject: Re: [PATCH 1/3] dt-bindings: clock: imx8mm: Add SNVS clock
>
> On 15.05.2019 04:29, Anson Huang wrote:
> > Add macro for the SNVS clock of the i.MX8MM.
> >
> > Signed-off-by: Anson Huang <[email protected]>
> > ---
> > This patch is based on patch:
> > https://patchwork.kernel.org/patch/10939997/
>
> Numbering also conflicts with one of my patches:
>
> https://patchwork.kernel.org/patch/10940303/
>
> The conflict is easy to resolve but I don't mind resending if your patches get
> accepted first. If should probably resend anyway to also add gic clk to 8mq.
Thanks, I did NOT notice this, feel free if want me to resend the patch set, both
the GPIO clock and SNVS clock patch series.
Thanks,
Anson.
>
> For series:
>
> Reviewed-by: Leonard Crestez <[email protected]>
On Wed, May 15, 2019 at 01:29:53AM +0000, Anson Huang wrote:
> Add macro for the SNVS clock of the i.MX8MM.
>
> Signed-off-by: Anson Huang <[email protected]>
Applied, thanks.
On Wed, May 15, 2019 at 01:29:57AM +0000, Anson Huang wrote:
> i.MX8MM has clock gate for SNVS module, add it into clock tree
> for SNVS RTC driver to manage.
>
> Signed-off-by: Anson Huang <[email protected]>
Applied, thanks.
On Wed, May 15, 2019 at 01:30:02AM +0000, Anson Huang wrote:
> i.MX8MM has clock gate for SNVS module, add clock info to SNVS
> RTC node for clock management.
>
> Signed-off-by: Anson Huang <[email protected]>
Applied, thanks.