2019-07-31 17:46:23

by Guido Günther

Subject: [PATCH 2/2] reset: imx7: Fix IMX8MQ_RESET_MIPI_DSI_ defines

Some of the mipi dsi resets were called

IMX8MQ_RESET_MIPI_DIS_

instead of

IMX8MQ_RESET_MIPI_DSI_

Since they're DSI related this looks like a typo.

I wasn't sure if this should be a single patch since it otherwise breaks
bisectability. I couldn't find any device trees using this yet.

Signed-off-by: Guido Günther <[email protected]>
---
drivers/reset/reset-imx7.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index 3ecd770f910b..1443a55a0c29 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -169,9 +169,9 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
[IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
[IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) },
[IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) },
- [IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
- [IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
- [IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
+ [IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
+ [IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
+ [IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
[IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR,
BIT(2) | BIT(1) },
[IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) },
@@ -220,9 +220,9 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev,

case IMX8MQ_RESET_PCIE_CTRL_APPS_EN:
case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */
- case IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N: /* fallthrough */
- case IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N: /* fallthrough */
- case IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */
value = assert ? 0 : bit;
--
2.20.1

2019-07-31 18:57:45

by Lucas Stach

Subject: Re: [PATCH 2/2] reset: imx7: Fix IMX8MQ_RESET_MIPI_DSI_ defines

Am Mittwoch, den 31.07.2019, 18:43 +0200 schrieb Guido Günther:
> Some of the mipi dsi resets were called
>
>   IMX8MQ_RESET_MIPI_DIS_
>
> instead of
>
>   IMX8MQ_RESET_MIPI_DSI_
>
> Since they're DSI related this looks like a typo.
>
> I wasn't sure if this should be a single patch since it otherwise breaks
> bisectability. I couldn't find any device trees using this yet.

Yes, I think this should be squashed into a single commit. Other than
that, the change looks correct.

Regards,
Lucas

> Signed-off-by: Guido Günther <[email protected]>
> ---
>  drivers/reset/reset-imx7.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
> index 3ecd770f910b..1443a55a0c29 100644
> --- a/drivers/reset/reset-imx7.c
> +++ b/drivers/reset/reset-imx7.c
> @@ -169,9 +169,9 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
> > >   [IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
> > >   [IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) },
> > >   [IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) },
> > > - [IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
> > > - [IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
> > > - [IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
> > > + [IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
> > > + [IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
> > > + [IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
> > >   [IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR,
> >       BIT(2) | BIT(1) },
> > >   [IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) },
> @@ -220,9 +220,9 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev,
>  
> >   case IMX8MQ_RESET_PCIE_CTRL_APPS_EN:
> > >   case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */
> > > - case IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N: /* fallthrough */
> > > - case IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N: /* fallthrough */
> > > - case IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N: /* fallthrough */
> > > + case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */
> > > + case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */
> > > + case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
> > >   case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
> > >   case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */
> >   value = assert ? 0 : bit;

2019-08-01 09:36:08

by Guido Günther

Subject: Re: [PATCH 2/2] reset: imx7: Fix IMX8MQ_RESET_MIPI_DSI_ defines

Hi Lucas,
On Wed, Jul 31, 2019 at 06:46:25PM +0200, Lucas Stach wrote:
> Am Mittwoch, den 31.07.2019, 18:43 +0200 schrieb Guido G?nther:
> > Some of the mipi dsi resets were called
> >
> > ? IMX8MQ_RESET_MIPI_DIS_
> >
> > instead of
> >
> > ? IMX8MQ_RESET_MIPI_DSI_
> >
> > Since they're DSI related this looks like a typo.
> >
> > I wasn't sure if this should be a single patch since it otherwise breaks
> > bisectability. I couldn't find any device trees using this yet.
>
> Yes, I think this should be squashed into a single commit. Other than
> that, the change looks correct.

Thanks for having a look. Sent out v2 as a single patch.
Cheers,
-- Guido

>
> Regards,
> Lucas
>
> > Signed-off-by: Guido G?nther <[email protected]>
> > ---
> > ?drivers/reset/reset-imx7.c | 12 ++++++------
> > ?1 file changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
> > index 3ecd770f910b..1443a55a0c29 100644
> > --- a/drivers/reset/reset-imx7.c
> > +++ b/drivers/reset/reset-imx7.c
> > @@ -169,9 +169,9 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
> > > > ? [IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
> > > > ? [IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) },
> > > > ? [IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) },
> > > > - [IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
> > > > - [IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
> > > > - [IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
> > > > + [IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
> > > > + [IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
> > > > + [IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
> > > > ? [IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR,
> > > ? ????BIT(2) | BIT(1) },
> > > > ? [IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) },
> > @@ -220,9 +220,9 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev,
> > ?
> > > ? case IMX8MQ_RESET_PCIE_CTRL_APPS_EN:
> > > > ? case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */
> > > > - case IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N: /* fallthrough */
> > > > - case IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N: /* fallthrough */
> > > > - case IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N: /* fallthrough */
> > > > + case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */
> > > > + case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */
> > > > + case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
> > > > ? case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
> > > > ? case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */
> > > ? value = assert ? 0 : bit;
>