Patches 1-4 are phy driver changes to add support for device
mode.
Patches 5-10 are changes related to XUSB device mode
controller driver.
Patch 11 is to enable drivers for XUDC support in defconfig
Test Steps(USB 2.0):
- Enable "USB Gadget precomposed configurations" in defconfig
- Build, flash and boot Jetson TX1
- Connect Jetson TX1 and Ubuntu device using USB A to Micro B
cable
- After boot on Jetson TX1 terminal usb0 network device should be
enumerated
- Assign static ip to usb0 on Jetson TX1 and corresponding net
device on ubuntu
- Run ping test and transfer test(used scp) to check data transfer
communication
SS mode is verified by enabling Type A port as peripheral
---
v11:
* Patches 1,2,3 - No changes.
* Patch 4 is new patch in the series to add support for Tegra186.
* Patch 5(previously patch 4) - added Tegra186 compatible.
* Patches 6,7(previously patches 5,6) - No changes.
* Patch 8,9 are new patches to add support for Jetson-TX2 platform.
* Patch 10(previously Patch 7) - added Tegra186 soc data.
* Patch 11(previously Patch 8) - No changes.
---
v10:
* Patches 1,2,4,5,7,8 - No changes.
* Patch 3 has braces added to one single line else condition.
* Patch 6 has update on compatible string as per suggestion from Chunfeng.
---
v9:
* Patches 1,2,3,4,5 - No changes.
* Patch 6 has update on compatible string as per suggestion from Chunfeng.
* Patch 7 has comment fixes as suggested by Chunfeng.
* Patch 8 has CONFIG_USB_GPIO enabled as module additionally.
---
v8:
* Patches 1,2,3,4,5,8 - No changes.
* Patch 6 has update on compatible string as per change done in [1].
* Patch 7 has issue fix, where device mode didnot got enabled after resume
from suspend.
---
v7:
* Patches 1,2,3,4,5,6,8 - No changes.
* Patch 7 - Comments from Balbi and Chunfun adrresed.
Added COMPILE_TEST in Kconfig and updated dependencies.
---
v6:
* Patches 1,2,3,7,8 - No changes.
* Patch 4,5,6 - Comments from Rob addressed, updated usb connector driver
compatibility string.
---
v5:
* Patches 1-3 - Commit subject updated as per inputs from Thierry.
* Patch 4 - Added reg-names used on Tegra210 in the bindings doc
* Enabled xudc driver as module instead of part of kernel in patch 8.
* Patched 5-8 - No changes.
---
v4:
* patch 1 - no changes.
* corrected companion device search based on inputs from Thierry in patch 2.
* removed unneeded dev variable and corrected value read in
tegra210_utmi_port_reset function in patch 3.
* dt binding doc and dtb files are corrected for alignments.
Replaced extcon-usb-gpio with usb role switch.
* Added support for USB role switch instead of extcon-usb-gpio and other minor
comments as suggested by Chunfeng.
* Enabled xudc driver as module instead of part of kernel in patch 8.
---
V3:
* Rebased patch 1 to top of tree.
* Fixed bug in patch 2, where xudc interrupts dont get generated if USB host
mode fails to probe. Moved fake port detection logic to generic xusb.c. fake
usb port data is updated based on soc flag need_fake_usb3_port.
* Added extra lines whereever necessary to make code more readable in patch 3
and 7.
* dt binding doc is corrected for typos and extcon references. Also added
details for clocks and removed xusb_ references to clock and power-domain
names and accordingly patch 5 is updated.
* removed avdd-pll-utmip-supply in patch 6, as its now part of padctl driver.
* Patch 8 has no changes.
---
V2:
* Patches 1-3 are new patches in this series, which splits unified features
patch to speprated features and removes need of port-fake entry in DT.
* Patch 4 is re-arragend dt-bindings patch which incorporates previous
patch comments to sort DT entries alphabetically, addresses name changes
and PM domain details added.
* Patch 5-6 are re-arranged DT patches with major changes - sort entries
alphabetically, and adds clock names.
* Patch 7 is UDC driver tegra XUSB device mode controller with major
changes - remove un-used module params, lockinng for device_mode flag,
moving un-needed info logs to debug level, making changes feature flag
dependent rather than SOC based macros and other error handling in probe.
* Patch 8 has no changes.
Nagarjuna Kristam (8):
phy: tegra: xusb: Add XUSB dual mode support on Tegra210
phy: tegra: xusb: Add usb3 port fake support on Tegra210
phy: tegra: xusb: Add vbus override support on Tegra210
phy: tegra: xusb: Add vbus override support on Tegra186
dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
arm64: tegra: Add xudc node for Tegra210
arm64: tegra: Enable xudc on Jetson TX1
arm64: tegra: Add xudc node for Tegra186
arm64: tegra: Enable xudc on Jetson TX2
usb: gadget: Add UDC driver for tegra XUSB device mode controller
arm64: defconfig: Enable tegra XUDC support
.../devicetree/bindings/usb/nvidia,tegra-xudc.txt | 112 +
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 29 +-
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 19 +
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 31 +-
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 19 +
arch/arm64/configs/defconfig | 2 +
drivers/phy/tegra/xusb-tegra186.c | 23 +
drivers/phy/tegra/xusb-tegra210.c | 134 +-
drivers/phy/tegra/xusb.c | 87 +
drivers/phy/tegra/xusb.h | 4 +
drivers/usb/gadget/udc/Kconfig | 11 +
drivers/usb/gadget/udc/Makefile | 1 +
drivers/usb/gadget/udc/tegra-xudc.c | 3810 ++++++++++++++++++++
include/linux/phy/tegra/xusb.h | 4 +-
14 files changed, 4281 insertions(+), 5 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt
create mode 100644 drivers/usb/gadget/udc/tegra-xudc.c
--
2.7.4
Add device-tree binding documentation for the XUSB device mode controller
present on Tegra210 SoC. This controller supports the USB 3.0
specification.
Signed-off-by: Nagarjuna Kristam <[email protected]>
Reviewed-by: JC Kuo <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Acked-by: Thierry Reding <[email protected]>
---
.../devicetree/bindings/usb/nvidia,tegra-xudc.txt | 112 +++++++++++++++++++++
1 file changed, 112 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt
new file mode 100644
index 0000000..b497491
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt
@@ -0,0 +1,112 @@
+Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC)
+=======================================================================
+
+The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and
+USB 3.0 SuperSpeed protocols.
+
+Required properties:
+--------------------
+- compatible: Must be:
+ - Tegra210: "nvidia,tegra210-xudc"
+ - Tegra186: "nvidia,tegra186-xudc"
+- reg: Must contain the base and length of all registers used.
+- interrupts: Must contain the XUSB device interrupt.
+- clocks: Must contain an entry for all clocks used.
+ See ../clock/clock-bindings.txt for details.
+- clock-names: Must include the following entries:
+ - dev: Clock to enable core XUSB dev clock.
+ - ss: Clock to enable XUSB super speed clock.
+ - ss_src: Clock to enable XUSB super speed dev clock.
+ - hs_src: Clock to enable XUSB high speed dev clock.
+ - fs_src: Clock to enable XUSB full speed dev clock.
+- power-domains: A list of PM domain specifiers that reference each power-domain
+ used by the XUSB device mode controller. This list must comprise of a specifier
+ for the XUSBA and XUSBB power-domains. See ../power/power_domain.txt and
+ ../arm/tegra/nvidia,tegra20-pmc.txt for details.
+- power-domain-names: A list of names that represent each of the specifiers in
+ the 'power-domains' property. Must include 'ss' and 'dev'.
+- nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to
+ configure the USB pads used by the XUDC controller.
+- phys: Must contain an entry for each entry in phy-names.
+ See ../phy/phy-bindings.txt for details.
+- phy-names: Should include an entry for each PHY used by the controller.
+ Names must be "usb2", and "usb3" if support SuperSpeed device mode.
+ - "usb3" phy, SuperSpeed (SSTX+/SSTX-/SSRX+/SSRX-) data lines.
+ - "usb2" phy, USB 2.0 (D+/D-) data lines.
+
+For Tegra210:
+- reg-names: Must include the following entries:
+ - base: XUSB device controller registers.
+ - fpci: XUSB device PCI Config registers.
+ - ipfs: XUSB device registers.
+- avddio-usb-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
+- hvdd-usb-supply: USB controller power supply. Must supply 3.3 V.
+
+
+Optional properties:
+--------------------
+- usb-role-switch: boolean property to indicate use of USB Role Switch driver.
+
+Sub-nodes:
+----------
+- The port would be added as subnode if use "usb-role-switch" property.
+ see graph.txt.
+
+Example:
+--------
+ pmc: pmc@7000e400 {
+ compatible = "nvidia,tegra210-pmc";
+ reg = <0x0 0x7000e400 0x0 0x400>;
+ clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
+ clock-names = "pclk", "clk32k_in";
+
+ powergates {
+ pd_xusbss: xusba {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>;
+ resets = <&tegra_car 156>;
+ #power-domain-cells = <0>;
+ };
+
+ pd_xusbdev: xusbb {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>;
+ resets = <&tegra_car 95>;
+ #power-domain-cells = <0>;
+ };
+ };
+ };
+
+ usb@700d0000 {
+ compatible = "nvidia,tegra210-xudc";
+ reg = <0x0 0x700d0000 0x0 0x8000>,
+ <0x0 0x700d8000 0x0 0x1000>,
+ <0x0 0x700d9000 0x0 0x1000>;
+ reg-names = "base", "fpci", "ipfs";
+
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
+ <&tegra_car TEGRA210_CLK_XUSB_SS>,
+ <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
+ <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
+ <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>;
+ clock-names = "dev", "ss", "ss_src", "hs_src", "fs_src";
+
+ power-domains = <&pd_xusbdev>, <&pd_xusbss>;
+ power-domain-names = "dev", "ss";
+
+ nvidia,xusb-padctl = <&padctl>;
+
+ phys = <µ_b>;
+ phy-names = "usb2";
+
+ avddio-usb-supply = <&vdd_pex_1v05>;
+ hvdd-usb-supply = <&vdd_3v3_sys>;
+
+ usb-role-switch;
+ port {
+ usb_role_switch: endpoint {
+ remote-endpoint = <&bconn_ep>;
+ };
+ };
+
+ };
--
2.7.4
Tegra210 has one XUSB device mode controller, which can be operated
HS and SS modes. Add DT support for XUSB device mode controller.
Signed-off-by: Nagarjuna Kristam <[email protected]>
Reviewed-by: JC Kuo <[email protected]>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index d21cf27..2e094ec 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1203,6 +1203,25 @@
status = "disabled";
};
+ usb@700d0000 {
+ compatible = "nvidia,tegra210-xudc";
+ reg = <0x0 0x700d0000 0x0 0x8000>,
+ <0x0 0x700d8000 0x0 0x1000>,
+ <0x0 0x700d9000 0x0 0x1000>;
+ reg-names = "base", "fpci", "ipfs";
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
+ <&tegra_car TEGRA210_CLK_XUSB_SS>,
+ <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
+ <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
+ <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>;
+ clock-names = "dev", "ss", "ss_src", "hs_src", "fs_src";
+ power-domains = <&pd_xusbdev>, <&pd_xusbss>;
+ power-domain-names = "dev", "ss";
+ nvidia,xusb-padctl = <&padctl>;
+ status = "disabled";
+ };
+
mipi: mipi@700e3000 {
compatible = "nvidia,tegra210-mipi";
reg = <0x0 0x700e3000 0x0 0x100>;
--
2.7.4
Configure the port capabilities based on usb_dr_mode settings.
Based on work by JC Kuo <[email protected]>.
Signed-off-by: Nagarjuna Kristam <[email protected]>
Reviewed-by: JC Kuo <[email protected]>
Acked-by: Thierry Reding <[email protected]>
---
drivers/phy/tegra/xusb-tegra210.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/tegra/xusb-tegra210.c b/drivers/phy/tegra/xusb-tegra210.c
index 0c0df68..0351c4a 100644
--- a/drivers/phy/tegra/xusb-tegra210.c
+++ b/drivers/phy/tegra/xusb-tegra210.c
@@ -39,7 +39,10 @@
#define XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_XUSB 0x1
#define XUSB_PADCTL_USB2_PORT_CAP 0x008
+#define XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_DISABLED(x) (0x0 << ((x) * 4))
#define XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_HOST(x) (0x1 << ((x) * 4))
+#define XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_DEVICE(x) (0x2 << ((x) * 4))
+#define XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_OTG(x) (0x3 << ((x) * 4))
#define XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_MASK(x) (0x3 << ((x) * 4))
#define XUSB_PADCTL_SS_PORT_MAP 0x014
@@ -64,6 +67,7 @@
#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL1(x) (0x084 + (x) * 0x40)
#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_SHIFT 7
#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_MASK 0x3
+#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_VAL 0x1
#define XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_FIX18 (1 << 6)
#define XUSB_PADCTL_USB2_OTG_PADX_CTL0(x) (0x088 + (x) * 0x40)
@@ -957,7 +961,14 @@ static int tegra210_usb2_phy_power_on(struct phy *phy)
value = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP);
value &= ~XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_MASK(index);
- value |= XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_HOST(index);
+ if (port->mode == USB_DR_MODE_UNKNOWN)
+ value |= XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_DISABLED(index);
+ else if (port->mode == USB_DR_MODE_PERIPHERAL)
+ value |= XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_DEVICE(index);
+ else if (port->mode == USB_DR_MODE_HOST)
+ value |= XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_HOST(index);
+ else if (port->mode == USB_DR_MODE_OTG)
+ value |= XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_OTG(index);
padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP);
value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
@@ -989,7 +1000,12 @@ static int tegra210_usb2_phy_power_on(struct phy *phy)
XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL1(index));
value &= ~(XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_MASK <<
XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_SHIFT);
- value |= XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_FIX18;
+ if (port->mode == USB_DR_MODE_HOST)
+ value |= XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_FIX18;
+ else
+ value |=
+ XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_VAL <<
+ XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_SHIFT;
padctl_writel(padctl, value,
XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPADX_CTL1(index));
--
2.7.4