i.MX6/7 SoCs have 64-bit unique ID stored in OCOTP bank 0, word 1/2,
read them out as SoC serial number which can be used from userspace:
root@imx7dsabresd:~# cat /sys/devices/soc0/serial_number
0000028FF618B953
Add support for i.MX6Q/6DL/6SL/6SX/6SLL/6UL/6ULL/6ULZ/7D, as they have
same unique ID layout in OCOTP.
Anson Huang (9):
ARM: imx: Add serial number support for i.MX6Q
ARM: imx: Add serial number support for i.MX6DL
ARM: imx: Add serial number support for i.MX6SLL
ARM: imx: Add serial number support for i.MX6ULL
ARM: imx: Add serial number support for i.MX6UL
ARM: imx: Add serial number support for i.MX6ULZ
ARM: imx: Add serial number support for i.MX6SL
ARM: imx: Add serial number support for i.MX6SX
ARM: imx: Add serial number support for i.MX7D
arch/arm/mach-imx/cpu.c | 38 +++++++++++++++++++++++++++++++++++++-
1 file changed, 37 insertions(+), 1 deletion(-)
--
2.7.4
i.MX6SLL has a 64-bit SoC unique ID stored in OCOTP, it can be used
as SoC serial number, see below example:
root@imx6sll:~# cat /sys/devices/soc0/serial_number
E766F1D25EC2D286
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm/mach-imx/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 54e5ab3..f41ad93 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -151,6 +151,7 @@ struct device * __init imx_soc_device_init(void)
soc_id = "i.MX6ULZ";
break;
case MXC_CPU_IMX6SLL:
+ ocotp_compat = "fsl,imx6sll-ocotp";
soc_id = "i.MX6SLL";
break;
case MXC_CPU_IMX7D:
--
2.7.4
i.MX6ULL has a 64-bit SoC unique ID stored in OCOTP, it can be used
as SoC serial number, see below example:
root@imx6ul7d:~# cat /sys/devices/soc0/serial_number
39323198138A8620
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm/mach-imx/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index f41ad93..cdb9d6d 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -145,6 +145,7 @@ struct device * __init imx_soc_device_init(void)
soc_id = "i.MX6UL";
break;
case MXC_CPU_IMX6ULL:
+ ocotp_compat = "fsl,imx6ul-ocotp";
soc_id = "i.MX6ULL";
break;
case MXC_CPU_IMX6ULZ:
--
2.7.4
i.MX7D has a 64-bit SoC unique ID stored in OCOTP, it can be used
as SoC serial number, see below example:
root@imx7dsabresd:~# cat /sys/devices/soc0/serial_number
0000028FF618B953
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm/mach-imx/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 17cfa86..d811803 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -160,6 +160,7 @@ struct device * __init imx_soc_device_init(void)
soc_id = "i.MX6SLL";
break;
case MXC_CPU_IMX7D:
+ ocotp_compat = "fsl,imx7d-ocotp";
soc_id = "i.MX7D";
break;
case MXC_CPU_IMX7ULP:
--
2.7.4
i.MX6ULZ has a 64-bit SoC unique ID stored in OCOTP, it can be used
as SoC serial number, see below example:
root@imx6ul7d:~# cat /sys/devices/soc0/serial_number
8797AEF098CAB901
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm/mach-imx/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 1e8150e..1274b52 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -150,6 +150,7 @@ struct device * __init imx_soc_device_init(void)
soc_id = "i.MX6ULL";
break;
case MXC_CPU_IMX6ULZ:
+ ocotp_compat = "fsl,imx6ul-ocotp";
soc_id = "i.MX6ULZ";
break;
case MXC_CPU_IMX6SLL:
--
2.7.4
i.MX6SL has a 64-bit SoC unique ID stored in OCOTP, it can be used
as SoC serial number, see below example:
root@imx6sl:~# cat /sys/devices/soc0/serial_number
897BC6578FEAB980
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm/mach-imx/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 1274b52..eb65eff 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -128,6 +128,7 @@ struct device * __init imx_soc_device_init(void)
soc_id = "i.MX53";
break;
case MXC_CPU_IMX6SL:
+ ocotp_compat = "fsl,imx6sl-ocotp";
soc_id = "i.MX6SL";
break;
case MXC_CPU_IMX6DL:
--
2.7.4
i.MX6UL has a 64-bit SoC unique ID stored in OCOTP, it can be used
as SoC serial number, see below example:
root@imx6ul7d:~# cat /sys/devices/soc0/serial_number
6738495762ACE932
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm/mach-imx/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index cdb9d6d..1e8150e 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -142,6 +142,7 @@ struct device * __init imx_soc_device_init(void)
soc_id = "i.MX6Q";
break;
case MXC_CPU_IMX6UL:
+ ocotp_compat = "fsl,imx6ul-ocotp";
soc_id = "i.MX6UL";
break;
case MXC_CPU_IMX6ULL:
--
2.7.4
Hi, Shawn
> On Mon, Oct 28, 2019 at 11:12:41AM +0800, Anson Huang wrote:
> > i.MX6/7 SoCs have 64-bit unique ID stored in OCOTP bank 0, word 1/2,
> > read them out as SoC serial number which can be used from userspace:
> >
> > root@imx7dsabresd:~# cat /sys/devices/soc0/serial_number
> > 0000028FF618B953
> >
> > Add support for i.MX6Q/6DL/6SL/6SX/6SLL/6UL/6ULL/6ULZ/7D, as they
> have
> > same unique ID layout in OCOTP.
> >
> > Anson Huang (9):
> > ARM: imx: Add serial number support for i.MX6Q
> > ARM: imx: Add serial number support for i.MX6DL
> > ARM: imx: Add serial number support for i.MX6SLL
> > ARM: imx: Add serial number support for i.MX6ULL
> > ARM: imx: Add serial number support for i.MX6UL
> > ARM: imx: Add serial number support for i.MX6ULZ
> > ARM: imx: Add serial number support for i.MX6SL
> > ARM: imx: Add serial number support for i.MX6SX
> > ARM: imx: Add serial number support for i.MX7D
>
> For this particular case, I think one single patch is even better than a series.
> So please squash them.
Done in V2.
Thanks,
Anson
On Mon, Oct 28, 2019 at 11:12:41AM +0800, Anson Huang wrote:
> i.MX6/7 SoCs have 64-bit unique ID stored in OCOTP bank 0, word 1/2,
> read them out as SoC serial number which can be used from userspace:
>
> root@imx7dsabresd:~# cat /sys/devices/soc0/serial_number
> 0000028FF618B953
>
> Add support for i.MX6Q/6DL/6SL/6SX/6SLL/6UL/6ULL/6ULZ/7D, as they have
> same unique ID layout in OCOTP.
>
> Anson Huang (9):
> ARM: imx: Add serial number support for i.MX6Q
> ARM: imx: Add serial number support for i.MX6DL
> ARM: imx: Add serial number support for i.MX6SLL
> ARM: imx: Add serial number support for i.MX6ULL
> ARM: imx: Add serial number support for i.MX6UL
> ARM: imx: Add serial number support for i.MX6ULZ
> ARM: imx: Add serial number support for i.MX6SL
> ARM: imx: Add serial number support for i.MX6SX
> ARM: imx: Add serial number support for i.MX7D
For this particular case, I think one single patch is even better than
a series. So please squash them.
Shawn
>
> arch/arm/mach-imx/cpu.c | 38 +++++++++++++++++++++++++++++++++++++-
> 1 file changed, 37 insertions(+), 1 deletion(-)
>
> --
> 2.7.4
>