From: Shubhrajyoti Datta <[email protected]>
Add the devicetree binding for xilinx APM.
Signed-off-by: Shubhrajyoti Datta <[email protected]>
---
v2:
patch added
.../devicetree/bindings/perf/xilinx_apm.txt | 44 ++++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/xilinx_apm.txt
diff --git a/Documentation/devicetree/bindings/perf/xilinx_apm.txt b/Documentation/devicetree/bindings/perf/xilinx_apm.txt
new file mode 100644
index 0000000..a11c82e
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/xilinx_apm.txt
@@ -0,0 +1,44 @@
+* Xilinx AXI Performance monitor IP
+
+Required properties:
+- compatible: "xlnx,axi-perf-monitor"
+- interrupts: Should contain APM interrupts.
+- interrupt-parent: Must be core interrupt controller.
+- reg: Should contain APM registers location and length.
+- xlnx,enable-profile: Enables the profile mode.
+- xlnx,enable-trace: Enables trace mode.
+- xlnx,num-monitor-slots: Maximum number of slots in APM.
+- xlnx,enable-event-count: Enable event count.
+- xlnx,enable-event-log: Enable event logging.
+- xlnx,have-sampled-metric-cnt:Sampled metric counters enabled in APM.
+- xlnx,num-of-counters: Number of counters in APM
+- xlnx,metric-count-width: Metric Counter width (32/64)
+- xlnx,metrics-sample-count-width: Sampled metric counter width
+- xlnx,global-count-width: Global Clock counter width
+- clocks: Input clock specifier.
+
+Optional properties:
+- xlnx,id-filter-32bit: APM is in 32-bit mode
+
+Example:
+++++++++
+
+apm: apm@44a00000 {
+ compatible = "xlnx,axi-perf-monitor";
+ interrupt-parent = <&axi_intc_1>;
+ interrupts = <1 2>;
+ reg = <0x44a00000 0x1000>;
+ clocks = <&clkc 15>;
+ xlnx,enable-profile = <0>;
+ xlnx,enable-trace = <0>;
+ xlnx,num-monitor-slots = <4>;
+ xlnx,enable-event-count = <1>;
+ xlnx,enable-event-log = <1>;
+ xlnx,have-sampled-metric-cnt = <1>;
+ xlnx,num-of-counters = <8>;
+ xlnx,metric-count-width = <32>;
+ xlnx,metrics-sample-count-width = <32>;
+ xlnx,global-count-width = <32>;
+ xlnx,metric-count-scale = <1>;
+ xlnx,id-filter-32bit;
+};
--
2.1.1
On 09. 12. 19 15:23, [email protected] wrote:
> From: Shubhrajyoti Datta <[email protected]>
>
> Add the devicetree binding for xilinx APM.
>
> Signed-off-by: Shubhrajyoti Datta <[email protected]>
> ---
> v2:
> patch added
>
> .../devicetree/bindings/perf/xilinx_apm.txt | 44 ++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/perf/xilinx_apm.txt
>
> diff --git a/Documentation/devicetree/bindings/perf/xilinx_apm.txt b/Documentation/devicetree/bindings/perf/xilinx_apm.txt
> new file mode 100644
> index 0000000..a11c82e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/perf/xilinx_apm.txt
> @@ -0,0 +1,44 @@
> +* Xilinx AXI Performance monitor IP
> +
> +Required properties:
> +- compatible: "xlnx,axi-perf-monitor"
> +- interrupts: Should contain APM interrupts.
> +- interrupt-parent: Must be core interrupt controller.
> +- reg: Should contain APM registers location and length.
> +- xlnx,enable-profile: Enables the profile mode.
> +- xlnx,enable-trace: Enables trace mode.
> +- xlnx,num-monitor-slots: Maximum number of slots in APM.
> +- xlnx,enable-event-count: Enable event count.
> +- xlnx,enable-event-log: Enable event logging.
> +- xlnx,have-sampled-metric-cnt:Sampled metric counters enabled in APM.
> +- xlnx,num-of-counters: Number of counters in APM
> +- xlnx,metric-count-width: Metric Counter width (32/64)
> +- xlnx,metrics-sample-count-width: Sampled metric counter width
> +- xlnx,global-count-width: Global Clock counter width
> +- clocks: Input clock specifier.
> +
> +Optional properties:
> +- xlnx,id-filter-32bit: APM is in 32-bit mode
> +
> +Example:
> +++++++++
> +
> +apm: apm@44a00000 {
> + compatible = "xlnx,axi-perf-monitor";
> + interrupt-parent = <&axi_intc_1>;
> + interrupts = <1 2>;
> + reg = <0x44a00000 0x1000>;
> + clocks = <&clkc 15>;
> + xlnx,enable-profile = <0>;
> + xlnx,enable-trace = <0>;
> + xlnx,num-monitor-slots = <4>;
> + xlnx,enable-event-count = <1>;
> + xlnx,enable-event-log = <1>;
> + xlnx,have-sampled-metric-cnt = <1>;
> + xlnx,num-of-counters = <8>;
> + xlnx,metric-count-width = <32>;
> + xlnx,metrics-sample-count-width = <32>;
> + xlnx,global-count-width = <32>;
> + xlnx,metric-count-scale = <1>;
> + xlnx,id-filter-32bit;
> +};
>
If you look at all latest bindings everybody are ask to convert them to
yaml. That's why please do it too.
Thanks,
Michal
On Mon, Dec 09, 2019 at 07:53:25PM +0530, [email protected] wrote:
> From: Shubhrajyoti Datta <[email protected]>
>
> Add the devicetree binding for xilinx APM.
>
> Signed-off-by: Shubhrajyoti Datta <[email protected]>
> ---
> v2:
> patch added
>
> .../devicetree/bindings/perf/xilinx_apm.txt | 44 ++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/perf/xilinx_apm.txt
As Michal said, DT schema please.
>
> diff --git a/Documentation/devicetree/bindings/perf/xilinx_apm.txt b/Documentation/devicetree/bindings/perf/xilinx_apm.txt
> new file mode 100644
> index 0000000..a11c82e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/perf/xilinx_apm.txt
> @@ -0,0 +1,44 @@
> +* Xilinx AXI Performance monitor IP
> +
> +Required properties:
> +- compatible: "xlnx,axi-perf-monitor"
Version?
> +- interrupts: Should contain APM interrupts.
> +- interrupt-parent: Must be core interrupt controller.
Drop this.
> +- reg: Should contain APM registers location and length.
> +- xlnx,enable-profile: Enables the profile mode.
> +- xlnx,enable-trace: Enables trace mode.
> +- xlnx,num-monitor-slots: Maximum number of slots in APM.
> +- xlnx,enable-event-count: Enable event count.
> +- xlnx,enable-event-log: Enable event logging.
> +- xlnx,have-sampled-metric-cnt:Sampled metric counters enabled in APM.
> +- xlnx,num-of-counters: Number of counters in APM
> +- xlnx,metric-count-width: Metric Counter width (32/64)
> +- xlnx,metrics-sample-count-width: Sampled metric counter width
> +- xlnx,global-count-width: Global Clock counter width
All these synthesis time config and not discoverable?
Tell h/w designers to add feature registers so all this is
discoverable. </rant>
> +- clocks: Input clock specifier.
> +
> +Optional properties:
> +- xlnx,id-filter-32bit: APM is in 32-bit mode
> +
> +Example:
> +++++++++
> +
> +apm: apm@44a00000 {
> + compatible = "xlnx,axi-perf-monitor";
> + interrupt-parent = <&axi_intc_1>;
> + interrupts = <1 2>;
> + reg = <0x44a00000 0x1000>;
> + clocks = <&clkc 15>;
> + xlnx,enable-profile = <0>;
> + xlnx,enable-trace = <0>;
> + xlnx,num-monitor-slots = <4>;
> + xlnx,enable-event-count = <1>;
> + xlnx,enable-event-log = <1>;
> + xlnx,have-sampled-metric-cnt = <1>;
> + xlnx,num-of-counters = <8>;
> + xlnx,metric-count-width = <32>;
> + xlnx,metrics-sample-count-width = <32>;
> + xlnx,global-count-width = <32>;
> + xlnx,metric-count-scale = <1>;
> + xlnx,id-filter-32bit;
> +};
> --
> 2.1.1
>