This patch series moves Tegra PMC clocks from clock driver to pmc driver
along with the device trees changes and audio driver which uses one of
the pmc clock for audio mclk.
Tegra PMC has clk_out_1, clk_out_2, clk_out_3 and blink controls which
are currently registered by Tegra clock driver using clk_regiser_mux and
clk_register_gate which performs direct Tegra PMC register access.
When Tegra PMC is in secure mode, any access from non-secure world will
not go through.
This patch series adds these Tegra PMC clocks and blink controls to Tegra
PMC driver with PMC as clock provider and removes them from Tegra clock
driver.
PMC clock clk_out_1 is dedicated for audio mclk from Tegra30 thru Tegra210
and clock driver does inital parent configuration for it and enables them.
But this clock should be taken care by audio driver as there is no need
to have this clock pre enabled.
So, this series also includes patch that updates ASoC driver to take
care of parent configuration for mclk if device tree don't specify
initial parent configuration using assigned-clock-parents.
DTs are also updated to use clk_out_1 as audio mclk rather than extern1.
This series also includes a patch for mclk fallback to extern1 when
retrieving mclk fails to have this backward compatible of new DT with
old kernels.
[v5]: Changes between v4 and v5 are
- v4 feedback
- updated dt-binding pmc YAML schema with more description on power
gate nodes and pad configuration state nodes.
- update tegra_asoc_utils_set_rate to disable audio mclk only if
its in enable state.
[v4]: Changes between v3 and v4 are
- v3 Feedback
- Updated clocks clk_m_div2 and clk_m_div4 as osc_div2 and osc_div4.
Tegra don't have clk_m_div2, clk_m_div4 and they should actually
be osc_div2 and osc_div4 clocks from osc pads.
- Fixed PMC clock parents to use osc, osc_div2, osc_div4.
- Register each PMC clock as single clock rather than separate
mux and gate clocks.
- Update ASoC utils to use resource managed APIs rather than
using clk_get and clk_put.
- Updated device tree and ASoC driver to use clk_out_1 instead of
clk_out_1_mux as PMC clocks are registered as single clock.
- Update clock driver init_table to not enable audio related clocks
as ASoC utils will do audio clock enables.
[v3]: Changes between v2 and v3 are
- Removes set parent of clk_out_1_mux to extern1 and enabling
extern1 from the clock driver.
- Doesn't enable clk_out_1 and blink by default in pmc driver
- Updates ASoC driver to take care of audio mclk parent
configuration incase if device tree don't specify assigned
clock parent properties and enables mclk using both clk_out_1
and extern1.
- updates all device trees using extern1 as mclk in sound node
to use clk_out_1 from pmc.
- patch for YAML format pmc dt-binding
- Includes v2 feedback
[v2]: Changes between v1 and v2 are
- v2 includes patches for adding clk_out_1, clk_out_2, clk_out_3,
blink controls to Tegra PMC driver and removing clk-tegra-pmc.
- feedback related to pmc clocks in Tegra PMC driver from v1
- Removed patches for WB0 PLLM overrides and PLLE IDDQ PMC programming
by the clock driver using helper functions from Tegra PMC.
Note:
To use helper functions from PMC driver, PMC early init need to
happen prior to using helper functions and these helper functions are
for PLLM Override and PLLE IDDQ programming in PMC during PLLM/PLLE
clock registration which happen in clock_init prior to Tegra PMC
probe.
Moving PLLM/PLLE clocks registration to happen after Tegra PMC
impacts other clocks EMC, MC and corresponding tegra_emc_init and
tegra_mc_init.
This implementation of configuring PMC registers thru helper
functions in clock driver needs proper changes across PMC, Clock,
EMC and MC inits to have it work across all Tegra platforms.
Currently PLLM Override is not enabled in the bootloader so proper
patches for this fix will be taken care separately.
[v1]: v1 includes patches for below fixes.
- adding clk_out_1, clk_out_2, clk_out_3, blink controls to Tegra PMC
driver and removing clk-tegra-pmc.
- updated clock provider from tegra_car to pmc in the device tree
tegra210-smaug.dts that uses clk_out_2.
- Added helper functions in PMC driver for WB0 PLLM overrides and PLLE
IDDQ programming to use by clock driver and updated clock driver to
use these helper functions and removed direct PMC access from clock
driver and all pmc base address references in clock driver.
Sowjanya Komatineni (19):
dt-bindings: clock: tegra: Change CLK_M_DIV to OSC_DIV clocks
clk: tegra: Change CLK_M_DIV clocks to OSC_DIV clocks
clk: tegra: Fix Tegra PMC clock out parents
dt-bindings: tegra: Convert Tegra PMC bindings to YAML
dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
soc: tegra: Add Tegra PMC clocks registration into PMC driver
dt-bindings: soc: tegra-pmc: Add id for Tegra PMC 32KHz blink clock
soc: tegra: Add support for 32KHz blink clock
clk: tegra: Remove tegra_pmc_clk_init along with clk ids
dt-bindings: clock: tegra: Remove pmc clock ids from clock dt-bindings
ASoC: tegra: Use device managed resource APIs to get the clock
ASoC: tegra: Add initial parent configuration for audio mclk
ASoC: tegra: Add fallback implementation for audio mclk
clk: tegra: Remove audio related clock enables from init_table
ARM: dts: tegra: Add clock-cells property to pmc
arm64: tegra: Add clock-cells property to Tegra PMC node
ARM: tegra: Update sound node clocks in device tree
arm64: tegra: smaug: Change clk_out_2 provider to pmc
ASoC: nau8825: change Tegra clk_out_2 provider from tegra_car to pmc
.../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 300 -----------------
.../bindings/arm/tegra/nvidia,tegra20-pmc.yaml | 357 +++++++++++++++++++++
.../devicetree/bindings/sound/nau8825.txt | 2 +-
arch/arm/boot/dts/tegra114-dalmore.dts | 8 +-
arch/arm/boot/dts/tegra114.dtsi | 4 +-
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 8 +-
arch/arm/boot/dts/tegra124-apalis.dtsi | 8 +-
arch/arm/boot/dts/tegra124-jetson-tk1.dts | 8 +-
arch/arm/boot/dts/tegra124-nyan.dtsi | 8 +-
arch/arm/boot/dts/tegra124-venice2.dts | 8 +-
arch/arm/boot/dts/tegra124.dtsi | 4 +-
arch/arm/boot/dts/tegra20.dtsi | 4 +-
arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi | 8 +-
arch/arm/boot/dts/tegra30-apalis.dtsi | 8 +-
arch/arm/boot/dts/tegra30-beaver.dts | 8 +-
arch/arm/boot/dts/tegra30-cardhu.dtsi | 8 +-
arch/arm/boot/dts/tegra30-colibri.dtsi | 8 +-
arch/arm/boot/dts/tegra30.dtsi | 4 +-
arch/arm64/boot/dts/nvidia/tegra132.dtsi | 4 +-
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 6 +-
drivers/clk/tegra/Makefile | 1 -
drivers/clk/tegra/clk-id.h | 11 +-
drivers/clk/tegra/clk-tegra-fixed.c | 32 +-
drivers/clk/tegra/clk-tegra-pmc.c | 122 -------
drivers/clk/tegra/clk-tegra114.c | 41 +--
drivers/clk/tegra/clk-tegra124.c | 46 +--
drivers/clk/tegra/clk-tegra20.c | 9 +-
drivers/clk/tegra/clk-tegra210.c | 30 +-
drivers/clk/tegra/clk-tegra30.c | 31 +-
drivers/clk/tegra/clk.h | 1 -
drivers/soc/tegra/pmc.c | 352 ++++++++++++++++++++
include/dt-bindings/clock/tegra114-car.h | 18 +-
include/dt-bindings/clock/tegra124-car-common.h | 18 +-
include/dt-bindings/clock/tegra20-car.h | 2 +-
include/dt-bindings/clock/tegra210-car.h | 18 +-
include/dt-bindings/clock/tegra30-car.h | 18 +-
include/dt-bindings/soc/tegra-pmc.h | 16 +
sound/soc/tegra/tegra_alc5632.c | 7 +-
sound/soc/tegra/tegra_asoc_utils.c | 114 ++++---
sound/soc/tegra/tegra_asoc_utils.h | 1 -
sound/soc/tegra/tegra_max98090.c | 22 +-
sound/soc/tegra/tegra_rt5640.c | 22 +-
sound/soc/tegra/tegra_rt5677.c | 7 +-
sound/soc/tegra/tegra_sgtl5000.c | 7 +-
sound/soc/tegra/tegra_wm8753.c | 22 +-
sound/soc/tegra/tegra_wm8903.c | 22 +-
sound/soc/tegra/tegra_wm9712.c | 8 +-
sound/soc/tegra/trimslice.c | 18 +-
49 files changed, 1012 insertions(+), 779 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml
delete mode 100644 drivers/clk/tegra/clk-tegra-pmc.c
create mode 100644 include/dt-bindings/soc/tegra-pmc.h
--
2.7.4
Tegra has no CLK_M_DIV2 and CLK_M_DIV4 clocks and instead it has
OSC_DIV2 and OSC_DIV4 clocks from OSC pads.
This patch changes CLK_M_DIV2 and CLK_M_DIV4 clock ids to OSC_DIV2
and OSC_DIV4 clock ids for Tegra30 through Tegra210.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Sowjanya Komatineni <[email protected]>
---
include/dt-bindings/clock/tegra114-car.h | 4 ++--
include/dt-bindings/clock/tegra124-car-common.h | 4 ++--
include/dt-bindings/clock/tegra210-car.h | 4 ++--
include/dt-bindings/clock/tegra30-car.h | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/dt-bindings/clock/tegra114-car.h b/include/dt-bindings/clock/tegra114-car.h
index bb5c2c999c05..f4880959b094 100644
--- a/include/dt-bindings/clock/tegra114-car.h
+++ b/include/dt-bindings/clock/tegra114-car.h
@@ -226,8 +226,8 @@
#define TEGRA114_CLK_FUSE_BURN 199
#define TEGRA114_CLK_CLK_32K 200
#define TEGRA114_CLK_CLK_M 201
-#define TEGRA114_CLK_CLK_M_DIV2 202
-#define TEGRA114_CLK_CLK_M_DIV4 203
+#define TEGRA114_CLK_OSC_DIV2 202
+#define TEGRA114_CLK_OSC_DIV4 203
#define TEGRA114_CLK_PLL_REF 204
#define TEGRA114_CLK_PLL_C 205
#define TEGRA114_CLK_PLL_C_OUT1 206
diff --git a/include/dt-bindings/clock/tegra124-car-common.h b/include/dt-bindings/clock/tegra124-car-common.h
index 0c4f5be0a742..e7e601a88d3d 100644
--- a/include/dt-bindings/clock/tegra124-car-common.h
+++ b/include/dt-bindings/clock/tegra124-car-common.h
@@ -225,8 +225,8 @@
#define TEGRA124_CLK_FUSE_BURN 199
#define TEGRA124_CLK_CLK_32K 200
#define TEGRA124_CLK_CLK_M 201
-#define TEGRA124_CLK_CLK_M_DIV2 202
-#define TEGRA124_CLK_CLK_M_DIV4 203
+#define TEGRA124_CLK_OSC_DIV2 202
+#define TEGRA124_CLK_OSC_DIV4 203
#define TEGRA124_CLK_PLL_REF 204
#define TEGRA124_CLK_PLL_C 205
#define TEGRA124_CLK_PLL_C_OUT1 206
diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h
index 44f60623f99b..6f65c14bf013 100644
--- a/include/dt-bindings/clock/tegra210-car.h
+++ b/include/dt-bindings/clock/tegra210-car.h
@@ -260,8 +260,8 @@
#define TEGRA210_CLK_FUSE_BURN 231
#define TEGRA210_CLK_CLK_32K 232
#define TEGRA210_CLK_CLK_M 233
-#define TEGRA210_CLK_CLK_M_DIV2 234
-#define TEGRA210_CLK_CLK_M_DIV4 235
+#define TEGRA210_CLK_OSC_DIV2 234
+#define TEGRA210_CLK_OSC_DIV4 235
#define TEGRA210_CLK_PLL_REF 236
#define TEGRA210_CLK_PLL_C 237
#define TEGRA210_CLK_PLL_C_OUT1 238
diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h
index 3c90f1535551..907a8a04c280 100644
--- a/include/dt-bindings/clock/tegra30-car.h
+++ b/include/dt-bindings/clock/tegra30-car.h
@@ -194,8 +194,8 @@
#define TEGRA30_CLK_TVO 169
#define TEGRA30_CLK_CLK_32K 170
#define TEGRA30_CLK_CLK_M 171
-#define TEGRA30_CLK_CLK_M_DIV2 172
-#define TEGRA30_CLK_CLK_M_DIV4 173
+#define TEGRA30_CLK_OSC_DIV2 172
+#define TEGRA30_CLK_OSC_DIV4 173
#define TEGRA30_CLK_PLL_REF 174
#define TEGRA30_CLK_PLL_C 175
#define TEGRA30_CLK_PLL_C_OUT1 176
--
2.7.4