2020-03-16 09:04:22

by Peng Fan

[permalink] [raw]
Subject: [PATCH V3 0/4] ARM: imx7ulp: support HSRUN mode

From: Peng Fan <[email protected]>

This is a splitted part from V2:
ARM: imx7ulp: add cpufreq using cpufreq-dt
https://patchwork.kernel.org/cover/11390589/
Nothing changed


The original V2 patchset is to support i.MX7ULP cpufreq,
still waiting the virtual clk being accepted. so to decouple,
this patchset only takes the run mode part.


Peng Fan (4):
dt-bindings: fsl: add i.MX7ULP PMC binding doc
ARM: dts: imx7ulp: add pmc node
ARM: imx: imx7ulp: support HSRUN mode
ARM: imx: cpuidle-imx7ulp: Stop mode disallowed when HSRUN

.../bindings/arm/freescale/imx7ulp_pmc.yaml | 32 ++++++++++++++++++++++
arch/arm/boot/dts/imx7ulp.dtsi | 10 +++++++
arch/arm/mach-imx/common.h | 1 +
arch/arm/mach-imx/cpuidle-imx7ulp.c | 14 ++++++++--
arch/arm/mach-imx/pm-imx7ulp.c | 25 +++++++++++++++++
5 files changed, 79 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/freescale/imx7ulp_pmc.yaml

--
2.16.4


2020-03-16 09:05:26

by Peng Fan

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Subject: [PATCH V3 4/4] ARM: imx: cpuidle-imx7ulp: Stop mode disallowed when HSRUN

From: Peng Fan <[email protected]>

When cpu runs in HSRUN mode, cpuidle is not allowed to run into
Stop mode. So add imx7ulp_get_mode to get thr cpu run mode,
and use WAIT mode instead, when cpu in HSRUN mode.

Signed-off-by: Peng Fan <[email protected]>
---
arch/arm/mach-imx/common.h | 1 +
arch/arm/mach-imx/cpuidle-imx7ulp.c | 14 +++++++++++---
arch/arm/mach-imx/pm-imx7ulp.c | 10 ++++++++++
3 files changed, 22 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 72c3fcc32910..707ac650f1c2 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -103,6 +103,7 @@ void imx6_set_int_mem_clk_lpm(bool enable);
void imx6sl_set_wait_clk(bool enter);
int imx_mmdc_get_ddr_type(void);
int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode);
+u32 imx7ulp_get_mode(void);

void imx_cpu_die(unsigned int cpu);
int imx_cpu_kill(unsigned int cpu);
diff --git a/arch/arm/mach-imx/cpuidle-imx7ulp.c b/arch/arm/mach-imx/cpuidle-imx7ulp.c
index ca86c967d19e..e7009d10b331 100644
--- a/arch/arm/mach-imx/cpuidle-imx7ulp.c
+++ b/arch/arm/mach-imx/cpuidle-imx7ulp.c
@@ -15,10 +15,18 @@
static int imx7ulp_enter_wait(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index)
{
- if (index == 1)
+ u32 mode;
+
+ if (index == 1) {
imx7ulp_set_lpm(ULP_PM_WAIT);
- else
- imx7ulp_set_lpm(ULP_PM_STOP);
+ } else {
+ mode = imx7ulp_get_mode();
+
+ if (mode == 3)
+ imx7ulp_set_lpm(ULP_PM_WAIT);
+ else
+ imx7ulp_set_lpm(ULP_PM_STOP);
+ }

cpu_do_idle();

diff --git a/arch/arm/mach-imx/pm-imx7ulp.c b/arch/arm/mach-imx/pm-imx7ulp.c
index 393faf1e8382..1410ccfc71bd 100644
--- a/arch/arm/mach-imx/pm-imx7ulp.c
+++ b/arch/arm/mach-imx/pm-imx7ulp.c
@@ -63,6 +63,16 @@ int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode)
return 0;
}

+u32 imx7ulp_get_mode(void)
+{
+ u32 mode;
+
+ mode = readl_relaxed(smc1_base + SMC_PMCTRL) & BM_PMCTRL_RUNM;
+ mode >>= BP_PMCTRL_RUNM;
+
+ return mode;
+}
+
void __init imx7ulp_pm_init(void)
{
struct device_node *np;
--
2.16.4