This series provides MediaTek cqhci implementations as below:
- Extend mmc_of_parse() to parse CQE bindings
- Remove redundant host CQE bindings
- Refine msdc timeout api to reduce redundant code
- MediaTek command queue support
- dt-bindings for mt6779
v1 -> v2:
- Add more patch details in commit message
- Separate msdc timeout api refine to individual patch
v2 -> v3:
- Remove CR-Id, Change-Id and Feature in patches
- Add Signed-off-by in patches
v3 -> v4:
- Refine CQE bindings in mmc_of_parse (Ulf Hansson)
- Remove redundant host CQE bindings (Linux Walleij)
Chun-Hung Wu (5):
[1/5] mmc: core: Extend mmc_of_parse() to parse CQE bindings
[2/5] mmc: host: Remove redundant CQE bindings
[3/5] mmc: mediatek: refine msdc timeout api
[4/5] mmc: mediatek: command queue support
[5/5] dt-bindings: mmc: mediatek: Add document for mt6779
Documentation/devicetree/bindings/mmc/mtk-sd.txt | 1 +
drivers/mmc/core/host.c | 5 +
drivers/mmc/host/mtk-sd.c | 151 +++++++++++++++++++++--
drivers/mmc/host/sdhci-brcmstb.c | 11 +-
drivers/mmc/host/sdhci-msm.c | 3 +-
drivers/mmc/host/sdhci-of-arasan.c | 3 -
drivers/mmc/host/sdhci-tegra.c | 2 +-
7 files changed, 155 insertions(+), 21 deletions(-)
--
1.9.1
Add compatible node for mt6779 mmc
Signed-off-by: Chun-Hung Wu <[email protected]>
---
Documentation/devicetree/bindings/mmc/mtk-sd.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
index 8a532f4..0c9cf6a 100644
--- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt
+++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
@@ -12,6 +12,7 @@ Required properties:
"mediatek,mt8173-mmc": for mmc host ip compatible with mt8173
"mediatek,mt8183-mmc": for mmc host ip compatible with mt8183
"mediatek,mt8516-mmc": for mmc host ip compatible with mt8516
+ "mediatek,mt6779-mmc": for mmc host ip compatible with mt6779
"mediatek,mt2701-mmc": for mmc host ip compatible with mt2701
"mediatek,mt2712-mmc": for mmc host ip compatible with mt2712
"mediatek,mt7622-mmc": for MT7622 SoC
--
1.9.1
Parse CQE bindings "supports-cqe" and "disable-cqe-dcmd"
in mmc_of_parse().
Signed-off-by: Chun-Hung Wu <[email protected]>
---
drivers/mmc/core/host.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index c876872..47521c6 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -302,6 +302,11 @@ int mmc_of_parse(struct mmc_host *host)
host->caps2 |= MMC_CAP2_NO_SD;
if (device_property_read_bool(dev, "no-mmc"))
host->caps2 |= MMC_CAP2_NO_MMC;
+ if (device_property_read_bool(dev, "supports-cqe"))
+ host->caps2 |= MMC_CAP2_CQE;
+ if (!device_property_read_bool(dev, "disable-cqe-dcmd")) {
+ host->caps2 |= MMC_CAP2_CQE_DCMD;
+ }
/* Must be after "non-removable" check */
if (device_property_read_u32(dev, "fixed-emmc-driver-type", &drv_type) == 0) {
--
1.9.1
Extract msdc timeout api common part to have
better code architecture and avoid redundent
code.
Signed-off-by: Chun-Hung Wu <[email protected]>
---
drivers/mmc/host/mtk-sd.c | 32 ++++++++++++++++++++++----------
1 file changed, 22 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
index 7726dcf..a2328fb 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -699,21 +699,21 @@ static void msdc_unprepare_data(struct msdc_host *host, struct mmc_request *mrq)
}
}
-/* clock control primitives */
-static void msdc_set_timeout(struct msdc_host *host, u32 ns, u32 clks)
+static u64 msdc_timeout_cal(struct msdc_host *host, u64 ns, u64 clks)
{
- u32 timeout, clk_ns;
+ u64 timeout, clk_ns;
u32 mode = 0;
- host->timeout_ns = ns;
- host->timeout_clks = clks;
if (host->mmc->actual_clock == 0) {
timeout = 0;
} else {
- clk_ns = 1000000000UL / host->mmc->actual_clock;
- timeout = (ns + clk_ns - 1) / clk_ns + clks;
+ clk_ns = 1000000000ULL;
+ do_div(clk_ns, host->mmc->actual_clock);
+ timeout = ns + clk_ns - 1;
+ do_div(timeout, clk_ns);
+ timeout += clks;
/* in 1048576 sclk cycle unit */
- timeout = (timeout + (0x1 << 20) - 1) >> 20;
+ timeout = DIV_ROUND_UP(timeout, (0x1 << 20));
if (host->dev_comp->clk_div_bits == 8)
sdr_get_field(host->base + MSDC_CFG,
MSDC_CFG_CKMOD, &mode);
@@ -723,9 +723,21 @@ static void msdc_set_timeout(struct msdc_host *host, u32 ns, u32 clks)
/*DDR mode will double the clk cycles for data timeout */
timeout = mode >= 2 ? timeout * 2 : timeout;
timeout = timeout > 1 ? timeout - 1 : 0;
- timeout = timeout > 255 ? 255 : timeout;
}
- sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, timeout);
+ return timeout;
+}
+
+/* clock control primitives */
+static void msdc_set_timeout(struct msdc_host *host, u64 ns, u64 clks)
+{
+ u64 timeout;
+
+ host->timeout_ns = ns;
+ host->timeout_clks = clks;
+
+ timeout = msdc_timeout_cal(host, ns, clks);
+ sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC,
+ (u32)(timeout > 255 ? 255 : timeout));
}
static void msdc_gate_clock(struct msdc_host *host)
--
1.9.1
CQE bindings "supports-cqe" and "disable-cqe-dcmd" is parsed
in mmc_of_parse(). Remove vendor code which parses CQE bindings,
and use mmc_host->caps2 to decide support CQE or not.
Signed-off-by: Chun-Hung Wu <[email protected]>
---
drivers/mmc/host/sdhci-brcmstb.c | 11 ++++++-----
drivers/mmc/host/sdhci-msm.c | 3 +--
drivers/mmc/host/sdhci-of-arasan.c | 3 ---
drivers/mmc/host/sdhci-tegra.c | 2 +-
4 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
index ad01f64..07c90c6 100644
--- a/drivers/mmc/host/sdhci-brcmstb.c
+++ b/drivers/mmc/host/sdhci-brcmstb.c
@@ -247,10 +247,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
return res;
memset(&brcmstb_pdata, 0, sizeof(brcmstb_pdata));
- if (device_property_read_bool(&pdev->dev, "supports-cqe")) {
- has_cqe = true;
- match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
- }
brcmstb_pdata.ops = match_priv->ops;
host = sdhci_pltfm_init(pdev, &brcmstb_pdata,
sizeof(struct sdhci_brcmstb_priv));
@@ -261,7 +257,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
pltfm_host = sdhci_priv(host);
priv = sdhci_pltfm_priv(pltfm_host);
- priv->has_cqe = has_cqe;
/* Map in the non-standard CFG registers */
iomem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
@@ -276,6 +271,12 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
if (res)
goto err;
+ if (host->mmc->caps2 & MMC_CAP2_CQE) {
+ has_cqe = true;
+ match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
+ }
+ priv->has_cqe = has_cqe;
+
/*
* If the chip has enhanced strobe and it's enabled, add
* callback
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index c3a160c..fbb2f57 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -1880,7 +1880,6 @@ static int sdhci_msm_probe(struct platform_device *pdev)
u8 core_major;
const struct sdhci_msm_offset *msm_offset;
const struct sdhci_msm_variant_info *var_info;
- struct device_node *node = pdev->dev.of_node;
host = sdhci_pltfm_init(pdev, &sdhci_msm_pdata, sizeof(*msm_host));
if (IS_ERR(host))
@@ -2076,7 +2075,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)
pm_runtime_use_autosuspend(&pdev->dev);
host->mmc_host_ops.execute_tuning = sdhci_msm_execute_tuning;
- if (of_property_read_bool(node, "supports-cqe"))
+ if (host->mmc->caps2 & MMC_CAP2_CQE)
ret = sdhci_msm_cqe_add_host(host, pdev);
else
ret = sdhci_add_host(host);
diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index e49b44b..359eff6 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -1281,9 +1281,6 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
sdhci_arasan_voltage_switch;
sdhci_arasan->has_cqe = true;
host->mmc->caps2 |= MMC_CAP2_CQE;
-
- if (!of_property_read_bool(np, "disable-cqe-dcmd"))
- host->mmc->caps2 |= MMC_CAP2_CQE_DCMD;
}
ret = sdhci_arasan_add_host(sdhci_arasan);
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 403ac44..d09abdd 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -715,7 +715,7 @@ static void tegra_sdhci_parse_dt(struct sdhci_host *host)
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
- if (device_property_read_bool(host->mmc->parent, "supports-cqe"))
+ if (host->mmc->caps2 & MMC_CAP2_CQE)
tegra_host->enable_hwcq = true;
else
tegra_host->enable_hwcq = false;
--
1.9.1
Support command queue for mt6779 platform.
a. Add msdc_set_busy_timeout() to calculate emmc write timeout
b. Connect mtk msdc driver to cqhci driver through
host->cq_host->ops = &msdc_cmdq_ops;
c. msdc_cmdq_irq() will link up with cqchi_irq(). Besides, it provides
more irq error messages like RSPCRCERR/CMDTO/DATACRCERR/DATTMO.
d. Use the options below to separate support for CQHCI or not, because
some of our platform does not support CQHCI hence no kernel option:
CONFIG_MMC_CQHCI.
#if IS_ENABLED(CONFIG_MMC_CQHCI)
XXX //Support CQHCI
#else
XXX //Not support CQHCI
#endif
Signed-off-by: Chun-Hung Wu <[email protected]>
---
drivers/mmc/host/mtk-sd.c | 119 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 119 insertions(+)
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
index a2328fb..8516888 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -31,6 +31,8 @@
#include <linux/mmc/sdio.h>
#include <linux/mmc/slot-gpio.h>
+#include "cqhci.h"
+
#define MAX_BD_NUM 1024
/*--------------------------------------------------------------------------*/
@@ -151,6 +153,7 @@
#define MSDC_INT_DMA_BDCSERR (0x1 << 17) /* W1C */
#define MSDC_INT_DMA_GPDCSERR (0x1 << 18) /* W1C */
#define MSDC_INT_DMA_PROTECT (0x1 << 19) /* W1C */
+#define MSDC_INT_CMDQ (0x1 << 28) /* W1C */
/* MSDC_INTEN mask */
#define MSDC_INTEN_MMCIRQ (0x1 << 0) /* RW */
@@ -181,6 +184,7 @@
/* SDC_CFG mask */
#define SDC_CFG_SDIOINTWKUP (0x1 << 0) /* RW */
#define SDC_CFG_INSWKUP (0x1 << 1) /* RW */
+#define SDC_CFG_WRDTOC (0x1fff << 2) /* RW */
#define SDC_CFG_BUSWIDTH (0x3 << 16) /* RW */
#define SDC_CFG_SDIO (0x1 << 19) /* RW */
#define SDC_CFG_SDIOIDE (0x1 << 20) /* RW */
@@ -229,6 +233,7 @@
#define MSDC_PATCH_BIT_DECRCTMO (0x1 << 30) /* RW */
#define MSDC_PATCH_BIT1_CMDTA (0x7 << 3) /* RW */
+#define MSDC_PB1_BUSY_CHECK_SEL (0x1 << 7) /* RW */
#define MSDC_PATCH_BIT1_STOP_DLY (0xf << 8) /* RW */
#define MSDC_PATCH_BIT2_CFGRESP (0x1 << 15) /* RW */
@@ -432,6 +437,7 @@ struct msdc_host {
struct msdc_save_para save_para; /* used when gate HCLK */
struct msdc_tune_para def_tune_para; /* default tune setting */
struct msdc_tune_para saved_tune_para; /* tune result of CMD21/CMD19 */
+ struct cqhci_host *cq_host;
};
static const struct mtk_mmc_compatible mt8135_compat = {
@@ -528,6 +534,18 @@ struct msdc_host {
.use_internal_cd = true,
};
+static const struct mtk_mmc_compatible mt6779_compat = {
+ .clk_div_bits = 12,
+ .hs400_tune = false,
+ .pad_tune_reg = MSDC_PAD_TUNE0,
+ .async_fifo = true,
+ .data_tune = true,
+ .busy_check = true,
+ .stop_clk_fix = true,
+ .enhance_rx = true,
+ .support_64g = true,
+};
+
static const struct of_device_id msdc_of_ids[] = {
{ .compatible = "mediatek,mt8135-mmc", .data = &mt8135_compat},
{ .compatible = "mediatek,mt8173-mmc", .data = &mt8173_compat},
@@ -537,6 +555,7 @@ struct msdc_host {
{ .compatible = "mediatek,mt7622-mmc", .data = &mt7622_compat},
{ .compatible = "mediatek,mt8516-mmc", .data = &mt8516_compat},
{ .compatible = "mediatek,mt7620-mmc", .data = &mt7620_compat},
+ { .compatible = "mediatek,mt6779-mmc", .data = &mt6779_compat},
{}
};
MODULE_DEVICE_TABLE(of, msdc_of_ids);
@@ -740,6 +759,15 @@ static void msdc_set_timeout(struct msdc_host *host, u64 ns, u64 clks)
(u32)(timeout > 255 ? 255 : timeout));
}
+static void msdc_set_busy_timeout(struct msdc_host *host, u64 ns, u64 clks)
+{
+ u64 timeout;
+
+ timeout = msdc_timeout_cal(host, ns, clks);
+ sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC,
+ (u32)(timeout > 8191 ? 8191 : timeout));
+}
+
static void msdc_gate_clock(struct msdc_host *host)
{
clk_disable_unprepare(host->src_clk_cg);
@@ -1426,6 +1454,36 @@ static void msdc_enable_sdio_irq(struct mmc_host *mmc, int enb)
pm_runtime_put_noidle(host->dev);
}
+#if IS_ENABLED(CONFIG_MMC_CQHCI)
+static irqreturn_t msdc_cmdq_irq(struct msdc_host *host, u32 intsts)
+{
+ int cmd_err = 0, dat_err = 0;
+
+ if (intsts & MSDC_INT_RSPCRCERR) {
+ cmd_err = (unsigned int)-EILSEQ;
+ dev_err(host->dev, "%s: CMD CRC ERR", __func__);
+ } else if (intsts & MSDC_INT_CMDTMO) {
+ cmd_err = (unsigned int)-ETIMEDOUT;
+ dev_err(host->dev, "%s: CMD TIMEOUT ERR", __func__);
+ }
+
+ if (intsts & MSDC_INT_DATCRCERR) {
+ dat_err = (unsigned int)-EILSEQ;
+ dev_err(host->dev, "%s: DATA CRC ERR", __func__);
+ } else if (intsts & MSDC_INT_DATTMO) {
+ dat_err = (unsigned int)-ETIMEDOUT;
+ dev_err(host->dev, "%s: DATA TIMEOUT ERR", __func__);
+ }
+
+ if (cmd_err || dat_err) {
+ dev_err(host->dev, "cmd_err = %d, dat_err =%d, intsts = 0x%x",
+ cmd_err, dat_err, intsts);
+ }
+
+ return cqhci_irq(host->mmc, 0, cmd_err, dat_err);
+}
+#endif
+
static irqreturn_t msdc_irq(int irq, void *dev_id)
{
struct msdc_host *host = (struct msdc_host *) dev_id;
@@ -1462,6 +1520,16 @@ static irqreturn_t msdc_irq(int irq, void *dev_id)
if (!(events & (event_mask & ~MSDC_INT_SDIOIRQ)))
break;
+#if IS_ENABLED(CONFIG_MMC_CQHCI)
+ if ((host->mmc->caps2 & MMC_CAP2_CQE) &&
+ (events & MSDC_INT_CMDQ)) {
+ msdc_cmdq_irq(host, events);
+ /* clear interrupts */
+ writel(events, host->base + MSDC_INT);
+ return IRQ_HANDLED;
+ }
+#endif
+
if (!mrq) {
dev_err(host->dev,
"%s: MRQ=NULL; events=%08X; event_mask=%08X\n",
@@ -2146,6 +2214,36 @@ static int msdc_get_cd(struct mmc_host *mmc)
return !val;
}
+static void msdc_cqe_enable(struct mmc_host *mmc)
+{
+ struct msdc_host *host = mmc_priv(mmc);
+
+ /* enable cmdq irq */
+ writel(MSDC_INT_CMDQ, host->base + MSDC_INTEN);
+ /* enable busy check */
+ sdr_set_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL);
+ /* default write data / busy timeout 20s */
+ msdc_set_busy_timeout(host, 20 * 1000000000ULL, 0);
+ /* default read data timeout 1s */
+ msdc_set_timeout(host, 1000000000ULL, 0);
+}
+
+void msdc_cqe_disable(struct mmc_host *mmc, bool recovery)
+{
+ struct msdc_host *host = mmc_priv(mmc);
+
+ /* disable cmdq irq */
+ sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INT_CMDQ);
+ /* disable busy check */
+ sdr_clr_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL);
+
+ if (recovery) {
+ sdr_set_field(host->base + MSDC_DMA_CTRL,
+ MSDC_DMA_CTRL_STOP, 1);
+ msdc_reset_hw(host);
+ }
+}
+
static const struct mmc_host_ops mt_msdc_ops = {
.post_req = msdc_post_req,
.pre_req = msdc_pre_req,
@@ -2162,6 +2260,11 @@ static int msdc_get_cd(struct mmc_host *mmc)
.hw_reset = msdc_hw_reset,
};
+static const struct cqhci_host_ops msdc_cmdq_ops = {
+ .enable = msdc_cqe_enable,
+ .disable = msdc_cqe_disable,
+};
+
static void msdc_of_property_parse(struct platform_device *pdev,
struct msdc_host *host)
{
@@ -2312,6 +2415,22 @@ static int msdc_drv_probe(struct platform_device *pdev)
host->dma_mask = DMA_BIT_MASK(32);
mmc_dev(mmc)->dma_mask = &host->dma_mask;
+#if IS_ENABLED(CONFIG_MMC_CQHCI)
+ if (mmc->caps2 & MMC_CAP2_CQE) {
+ host->cq_host = devm_kzalloc(host->mmc->parent,
+ sizeof(*host->cq_host),
+ GFP_KERNEL);
+ host->cq_host->caps |= CQHCI_TASK_DESC_SZ_128;
+ host->cq_host->mmio = host->base + 0x800;
+ host->cq_host->ops = &msdc_cmdq_ops;
+ cqhci_init(host->cq_host, mmc, true);
+ mmc->max_segs = 128;
+ /* cqhci 16bit length */
+ /* 0 size, means 65536 so we don't have to -1 here */
+ mmc->max_seg_size = 64 * 1024;
+ }
+#endif
+
host->timeout_clks = 3 * 1048576;
host->dma.gpd = dma_alloc_coherent(&pdev->dev,
2 * sizeof(struct mt_gpdma_desc),
--
1.9.1
On Mon, Apr 6, 2020 at 5:28 AM Chun-Hung Wu <[email protected]> wrote:
>
> CQE bindings "supports-cqe" and "disable-cqe-dcmd" is parsed
> in mmc_of_parse(). Remove vendor code which parses CQE bindings,
> and use mmc_host->caps2 to decide support CQE or not.
>
> Signed-off-by: Chun-Hung Wu <[email protected]>
> ---
> drivers/mmc/host/sdhci-brcmstb.c | 11 ++++++-----
> drivers/mmc/host/sdhci-msm.c | 3 +--
> drivers/mmc/host/sdhci-of-arasan.c | 3 ---
> drivers/mmc/host/sdhci-tegra.c | 2 +-
> 4 files changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
> index ad01f64..07c90c6 100644
> --- a/drivers/mmc/host/sdhci-brcmstb.c
> +++ b/drivers/mmc/host/sdhci-brcmstb.c
> @@ -247,10 +247,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
> return res;
>
> memset(&brcmstb_pdata, 0, sizeof(brcmstb_pdata));
> - if (device_property_read_bool(&pdev->dev, "supports-cqe")) {
> - has_cqe = true;
> - match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
The above line that sets the irq was moved to later in the function,
but needs to come before sdhci_pltfm_init()
Al
> - }
> brcmstb_pdata.ops = match_priv->ops;
> host = sdhci_pltfm_init(pdev, &brcmstb_pdata,
> sizeof(struct sdhci_brcmstb_priv));
> @@ -261,7 +257,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
>
> pltfm_host = sdhci_priv(host);
> priv = sdhci_pltfm_priv(pltfm_host);
> - priv->has_cqe = has_cqe;
>
> /* Map in the non-standard CFG registers */
> iomem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> @@ -276,6 +271,12 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
> if (res)
> goto err;
>
> + if (host->mmc->caps2 & MMC_CAP2_CQE) {
> + has_cqe = true;
> + match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
> + }
> + priv->has_cqe = has_cqe;
> +
> /*
> * If the chip has enhanced strobe and it's enabled, add
> * callback
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index c3a160c..fbb2f57 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -1880,7 +1880,6 @@ static int sdhci_msm_probe(struct platform_device *pdev)
> u8 core_major;
> const struct sdhci_msm_offset *msm_offset;
> const struct sdhci_msm_variant_info *var_info;
> - struct device_node *node = pdev->dev.of_node;
>
> host = sdhci_pltfm_init(pdev, &sdhci_msm_pdata, sizeof(*msm_host));
> if (IS_ERR(host))
> @@ -2076,7 +2075,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)
> pm_runtime_use_autosuspend(&pdev->dev);
>
> host->mmc_host_ops.execute_tuning = sdhci_msm_execute_tuning;
> - if (of_property_read_bool(node, "supports-cqe"))
> + if (host->mmc->caps2 & MMC_CAP2_CQE)
> ret = sdhci_msm_cqe_add_host(host, pdev);
> else
> ret = sdhci_add_host(host);
> diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
> index e49b44b..359eff6 100644
> --- a/drivers/mmc/host/sdhci-of-arasan.c
> +++ b/drivers/mmc/host/sdhci-of-arasan.c
> @@ -1281,9 +1281,6 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
> sdhci_arasan_voltage_switch;
> sdhci_arasan->has_cqe = true;
> host->mmc->caps2 |= MMC_CAP2_CQE;
> -
> - if (!of_property_read_bool(np, "disable-cqe-dcmd"))
> - host->mmc->caps2 |= MMC_CAP2_CQE_DCMD;
> }
>
> ret = sdhci_arasan_add_host(sdhci_arasan);
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> index 403ac44..d09abdd 100644
> --- a/drivers/mmc/host/sdhci-tegra.c
> +++ b/drivers/mmc/host/sdhci-tegra.c
> @@ -715,7 +715,7 @@ static void tegra_sdhci_parse_dt(struct sdhci_host *host)
> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
>
> - if (device_property_read_bool(host->mmc->parent, "supports-cqe"))
> + if (host->mmc->caps2 & MMC_CAP2_CQE)
> tegra_host->enable_hwcq = true;
> else
> tegra_host->enable_hwcq = false;
> --
> 1.9.1
On Mon, 2020-04-06 at 09:59 -0400, Alan Cooper wrote:
> On Mon, Apr 6, 2020 at 5:28 AM Chun-Hung Wu <[email protected]> wrote:
> >
> > CQE bindings "supports-cqe" and "disable-cqe-dcmd" is parsed
> > in mmc_of_parse(). Remove vendor code which parses CQE bindings,
> > and use mmc_host->caps2 to decide support CQE or not.
> >
> > Signed-off-by: Chun-Hung Wu <[email protected]>
> > ---
> > drivers/mmc/host/sdhci-brcmstb.c | 11 ++++++-----
> > drivers/mmc/host/sdhci-msm.c | 3 +--
> > drivers/mmc/host/sdhci-of-arasan.c | 3 ---
> > drivers/mmc/host/sdhci-tegra.c | 2 +-
> > 4 files changed, 8 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
> > index ad01f64..07c90c6 100644
> > --- a/drivers/mmc/host/sdhci-brcmstb.c
> > +++ b/drivers/mmc/host/sdhci-brcmstb.c
> > @@ -247,10 +247,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
> > return res;
> >
> > memset(&brcmstb_pdata, 0, sizeof(brcmstb_pdata));
> > - if (device_property_read_bool(&pdev->dev, "supports-cqe")) {
> > - has_cqe = true;
> > - match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
>
> The above line that sets the irq was moved to later in the function,
> but needs to come before sdhci_pltfm_init()
>
> Al
After check the code in sdhci_pltfm_init(), I don't see where
match_priv->ops->irq being used in code section.
Only "host->ops = pdata->ops;" is assigned, may I know why should
we put match_priv->ops->irq = sdhci_brcmstb_cqhci_irq; before
sdhci_pltfm_init()?
By the way, host only added to kernel after sdhci_brcmstb_add_host(),
So, I suppose isr assignment is ok before anywhere of it.
>
> > - }
> > brcmstb_pdata.ops = match_priv->ops;
> > host = sdhci_pltfm_init(pdev, &brcmstb_pdata,
> > sizeof(struct sdhci_brcmstb_priv));
> > @@ -261,7 +257,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
> >
> > pltfm_host = sdhci_priv(host);
> > priv = sdhci_pltfm_priv(pltfm_host);
> > - priv->has_cqe = has_cqe;
> >
> > /* Map in the non-standard CFG registers */
> > iomem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> > @@ -276,6 +271,12 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
> > if (res)
> > goto err;
> >
> > + if (host->mmc->caps2 & MMC_CAP2_CQE) {
> > + has_cqe = true;
> > + match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
> > + }
> > + priv->has_cqe = has_cqe;
> > +
> > /*
> > * If the chip has enhanced strobe and it's enabled, add
> > * callback
> > diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> > index c3a160c..fbb2f57 100644
> > --- a/drivers/mmc/host/sdhci-msm.c
> > +++ b/drivers/mmc/host/sdhci-msm.c
> > @@ -1880,7 +1880,6 @@ static int sdhci_msm_probe(struct platform_device *pdev)
> > u8 core_major;
> > const struct sdhci_msm_offset *msm_offset;
> > const struct sdhci_msm_variant_info *var_info;
> > - struct device_node *node = pdev->dev.of_node;
> >
> > host = sdhci_pltfm_init(pdev, &sdhci_msm_pdata, sizeof(*msm_host));
> > if (IS_ERR(host))
> > @@ -2076,7 +2075,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)
> > pm_runtime_use_autosuspend(&pdev->dev);
> >
> > host->mmc_host_ops.execute_tuning = sdhci_msm_execute_tuning;
> > - if (of_property_read_bool(node, "supports-cqe"))
> > + if (host->mmc->caps2 & MMC_CAP2_CQE)
> > ret = sdhci_msm_cqe_add_host(host, pdev);
> > else
> > ret = sdhci_add_host(host);
> > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
> > index e49b44b..359eff6 100644
> > --- a/drivers/mmc/host/sdhci-of-arasan.c
> > +++ b/drivers/mmc/host/sdhci-of-arasan.c
> > @@ -1281,9 +1281,6 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
> > sdhci_arasan_voltage_switch;
> > sdhci_arasan->has_cqe = true;
> > host->mmc->caps2 |= MMC_CAP2_CQE;
> > -
> > - if (!of_property_read_bool(np, "disable-cqe-dcmd"))
> > - host->mmc->caps2 |= MMC_CAP2_CQE_DCMD;
> > }
> >
> > ret = sdhci_arasan_add_host(sdhci_arasan);
> > diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> > index 403ac44..d09abdd 100644
> > --- a/drivers/mmc/host/sdhci-tegra.c
> > +++ b/drivers/mmc/host/sdhci-tegra.c
> > @@ -715,7 +715,7 @@ static void tegra_sdhci_parse_dt(struct sdhci_host *host)
> > struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> > struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
> >
> > - if (device_property_read_bool(host->mmc->parent, "supports-cqe"))
> > + if (host->mmc->caps2 & MMC_CAP2_CQE)
> > tegra_host->enable_hwcq = true;
> > else
> > tegra_host->enable_hwcq = false;
> > --
> > 1.9.1
On Mon, 6 Apr 2020 17:28:01 +0800, Chun-Hung Wu wrote:
> Add compatible node for mt6779 mmc
>
> Signed-off-by: Chun-Hung Wu <[email protected]>
> ---
> Documentation/devicetree/bindings/mmc/mtk-sd.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.
If a tag was not added on purpose, please state why and what changed.
On Mon, Apr 13, 2020 at 8:22 PM Chun-Hung Wu <[email protected]> wrote:
>
> On Mon, 2020-04-06 at 09:59 -0400, Alan Cooper wrote:
> > On Mon, Apr 6, 2020 at 5:28 AM Chun-Hung Wu <[email protected]> wrote:
> > >
> > > CQE bindings "supports-cqe" and "disable-cqe-dcmd" is parsed
> > > in mmc_of_parse(). Remove vendor code which parses CQE bindings,
> > > and use mmc_host->caps2 to decide support CQE or not.
> > >
> > > Signed-off-by: Chun-Hung Wu <[email protected]>
> > > ---
> > > drivers/mmc/host/sdhci-brcmstb.c | 11 ++++++-----
> > > drivers/mmc/host/sdhci-msm.c | 3 +--
> > > drivers/mmc/host/sdhci-of-arasan.c | 3 ---
> > > drivers/mmc/host/sdhci-tegra.c | 2 +-
> > > 4 files changed, 8 insertions(+), 11 deletions(-)
> > >
> > > diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c
> > > index ad01f64..07c90c6 100644
> > > --- a/drivers/mmc/host/sdhci-brcmstb.c
> > > +++ b/drivers/mmc/host/sdhci-brcmstb.c
> > > @@ -247,10 +247,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
> > > return res;
> > >
> > > memset(&brcmstb_pdata, 0, sizeof(brcmstb_pdata));
> > > - if (device_property_read_bool(&pdev->dev, "supports-cqe")) {
> > > - has_cqe = true;
> > > - match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
> >
> > The above line that sets the irq was moved to later in the function,
> > but needs to come before sdhci_pltfm_init()
> >
> > Al
> After check the code in sdhci_pltfm_init(), I don't see where
> match_priv->ops->irq being used in code section.
> Only "host->ops = pdata->ops;" is assigned, may I know why should
> we put match_priv->ops->irq = sdhci_brcmstb_cqhci_irq; before
> sdhci_pltfm_init()?
> By the way, host only added to kernel after sdhci_brcmstb_add_host(),
> So, I suppose isr assignment is ok before anywhere of it.
I thought I remembered having to move the "set irq" to before
sdhci_pltfm_init() when I first added the functionality, but it looks
like it isn't necessary
I tested your changes and they worked correctly.
Acked-by: Al Cooper <[email protected]>
> >
> > > - }
> > > brcmstb_pdata.ops = match_priv->ops;
> > > host = sdhci_pltfm_init(pdev, &brcmstb_pdata,
> > > sizeof(struct sdhci_brcmstb_priv));
> > > @@ -261,7 +257,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
> > >
> > > pltfm_host = sdhci_priv(host);
> > > priv = sdhci_pltfm_priv(pltfm_host);
> > > - priv->has_cqe = has_cqe;
> > >
> > > /* Map in the non-standard CFG registers */
> > > iomem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> > > @@ -276,6 +271,12 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
> > > if (res)
> > > goto err;
> > >
> > > + if (host->mmc->caps2 & MMC_CAP2_CQE) {
> > > + has_cqe = true;
> > > + match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
> > > + }
> > > + priv->has_cqe = has_cqe;
> > > +
> > > /*
> > > * If the chip has enhanced strobe and it's enabled, add
> > > * callback
> > > diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> > > index c3a160c..fbb2f57 100644
> > > --- a/drivers/mmc/host/sdhci-msm.c
> > > +++ b/drivers/mmc/host/sdhci-msm.c
> > > @@ -1880,7 +1880,6 @@ static int sdhci_msm_probe(struct platform_device *pdev)
> > > u8 core_major;
> > > const struct sdhci_msm_offset *msm_offset;
> > > const struct sdhci_msm_variant_info *var_info;
> > > - struct device_node *node = pdev->dev.of_node;
> > >
> > > host = sdhci_pltfm_init(pdev, &sdhci_msm_pdata, sizeof(*msm_host));
> > > if (IS_ERR(host))
> > > @@ -2076,7 +2075,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)
> > > pm_runtime_use_autosuspend(&pdev->dev);
> > >
> > > host->mmc_host_ops.execute_tuning = sdhci_msm_execute_tuning;
> > > - if (of_property_read_bool(node, "supports-cqe"))
> > > + if (host->mmc->caps2 & MMC_CAP2_CQE)
> > > ret = sdhci_msm_cqe_add_host(host, pdev);
> > > else
> > > ret = sdhci_add_host(host);
> > > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
> > > index e49b44b..359eff6 100644
> > > --- a/drivers/mmc/host/sdhci-of-arasan.c
> > > +++ b/drivers/mmc/host/sdhci-of-arasan.c
> > > @@ -1281,9 +1281,6 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
> > > sdhci_arasan_voltage_switch;
> > > sdhci_arasan->has_cqe = true;
> > > host->mmc->caps2 |= MMC_CAP2_CQE;
> > > -
> > > - if (!of_property_read_bool(np, "disable-cqe-dcmd"))
> > > - host->mmc->caps2 |= MMC_CAP2_CQE_DCMD;
> > > }
> > >
> > > ret = sdhci_arasan_add_host(sdhci_arasan);
> > > diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> > > index 403ac44..d09abdd 100644
> > > --- a/drivers/mmc/host/sdhci-tegra.c
> > > +++ b/drivers/mmc/host/sdhci-tegra.c
> > > @@ -715,7 +715,7 @@ static void tegra_sdhci_parse_dt(struct sdhci_host *host)
> > > struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> > > struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
> > >
> > > - if (device_property_read_bool(host->mmc->parent, "supports-cqe"))
> > > + if (host->mmc->caps2 & MMC_CAP2_CQE)
> > > tegra_host->enable_hwcq = true;
> > > else
> > > tegra_host->enable_hwcq = false;
> > > --
> > > 1.9.1
>