The i.MX8MP has some new IPs called mixes. They are formed usually by some
GPRs that can be split into different functionalities. The first example
here is the audiomix which has dedicated registers that can be registered
as a clock controller and some other registers that can be registered as
a reset controller, plus some dedicated ones that will be registered as
syscon and used by each dedicated audio IP.
More mixes to be following the same structure are to come, like hdmimix,
dispmix and mediamix. They will all be populated and registered by the MFD
imx-mix generic driver.
Changes since v2:
* removed the runtime PM for now
* changed the new SPDX identifiers to GPL-2.0-only
* took care of the DT schema comment
Abel Vesa (13):
mfd: Add i.MX generic mix support
Documentation: mfd: Add DT bindings for i.MX Mix
arm64: dts: imx8mp: Add AIPS 4 and 5
arm64: dts: imx8mp: Add audiomix node
clk: imx: gate2: Allow single bit gating clock
clk: imx: pll14xx: Add the device as argument when registering
clk: imx: Add helpers for passing the device as argument
dt-bindings: clocks: imx8mp: Add ids for audiomix clocks
clk: imx: Add audiomix clock controller support
arm64: dts: imx8mp: Add audiomix clock controller node
dt-bindings: reset: imx8mp: Add ids for audiomix reset
reset: imx: Add audiomix reset controller support
arm64: dts: imx8mp: Add audiomix reset controller node
.../devicetree/bindings/mfd/fsl,imx-mix.yaml | 34 ++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 41 ++++-
drivers/clk/imx/Makefile | 2 +-
drivers/clk/imx/clk-audiomix.c | 175 +++++++++++++++++++++
drivers/clk/imx/clk-gate2.c | 31 +++-
drivers/clk/imx/clk-pll14xx.c | 8 +-
drivers/clk/imx/clk.h | 55 ++++++-
drivers/mfd/Kconfig | 11 ++
drivers/mfd/Makefile | 1 +
drivers/mfd/imx-mix.c | 48 ++++++
drivers/reset/Kconfig | 7 +
drivers/reset/Makefile | 1 +
drivers/reset/reset-imx-audiomix.c | 117 ++++++++++++++
include/dt-bindings/clock/imx8mp-clock.h | 62 ++++++++
include/dt-bindings/reset/imx-audiomix-reset.h | 15 ++
15 files changed, 590 insertions(+), 18 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx-mix.yaml
create mode 100644 drivers/clk/imx/clk-audiomix.c
create mode 100644 drivers/mfd/imx-mix.c
create mode 100644 drivers/reset/reset-imx-audiomix.c
create mode 100644 include/dt-bindings/reset/imx-audiomix-reset.h
--
2.7.4
Add all the reset ids for the audiomix reset.
Signed-off-by: Abel Vesa <[email protected]>
---
include/dt-bindings/reset/imx-audiomix-reset.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
create mode 100644 include/dt-bindings/reset/imx-audiomix-reset.h
diff --git a/include/dt-bindings/reset/imx-audiomix-reset.h b/include/dt-bindings/reset/imx-audiomix-reset.h
new file mode 100644
index 00000000..67392c3
--- /dev/null
+++ b/include/dt-bindings/reset/imx-audiomix-reset.h
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2019 NXP.
+ */
+
+#ifndef DT_BINDING_RESET_IMX_AUDIOMIX_H
+#define DT_BINDING_RESET_IMX_AUDIOMIX_H
+
+#define IMX_AUDIOMIX_EARC_RESET 0x0
+#define IMX_AUDIOMIX_EARC_PHY_RESET 0x1
+
+#define IMX_AUDIOMIX_RESET_NUM 2
+
+#endif
+
--
2.7.4
Audiomix on i.MX8MP registers two gates that share the same enable count
but use the same bit to control the gate instead of two bits. By adding
the flag IMX_CLK_GATE2_SINGLE_BIT we allow the gate2 to use the generic
gate ops for enable, disable and is_enabled.
For the disable_unused, nothing happens if this flag is specified.
Signed-off-by: Abel Vesa <[email protected]>
---
drivers/clk/imx/clk-gate2.c | 31 +++++++++++++++++++++++--------
drivers/clk/imx/clk.h | 13 +++++++++++++
2 files changed, 36 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index ce0060e..b87ab3c 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/imx/clk-gate2.c
@@ -41,21 +41,26 @@ static int clk_gate2_enable(struct clk_hw *hw)
struct clk_gate2 *gate = to_clk_gate2(hw);
u32 reg;
unsigned long flags;
+ int ret = 0;
spin_lock_irqsave(gate->lock, flags);
if (gate->share_count && (*gate->share_count)++ > 0)
goto out;
- reg = readl(gate->reg);
- reg &= ~(3 << gate->bit_idx);
- reg |= gate->cgr_val << gate->bit_idx;
- writel(reg, gate->reg);
+ if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {
+ ret = clk_gate_ops.enable(hw);
+ } else {
+ reg = readl(gate->reg);
+ reg &= ~(3 << gate->bit_idx);
+ reg |= gate->cgr_val << gate->bit_idx;
+ writel(reg, gate->reg);
+ }
out:
spin_unlock_irqrestore(gate->lock, flags);
- return 0;
+ return ret;
}
static void clk_gate2_disable(struct clk_hw *hw)
@@ -73,9 +78,13 @@ static void clk_gate2_disable(struct clk_hw *hw)
goto out;
}
- reg = readl(gate->reg);
- reg &= ~(3 << gate->bit_idx);
- writel(reg, gate->reg);
+ if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) {
+ clk_gate_ops.disable(hw);
+ } else {
+ reg = readl(gate->reg);
+ reg &= ~(3 << gate->bit_idx);
+ writel(reg, gate->reg);
+ }
out:
spin_unlock_irqrestore(gate->lock, flags);
@@ -95,6 +104,9 @@ static int clk_gate2_is_enabled(struct clk_hw *hw)
{
struct clk_gate2 *gate = to_clk_gate2(hw);
+ if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)
+ return clk_gate_ops.is_enabled(hw);
+
return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);
}
@@ -104,6 +116,9 @@ static void clk_gate2_disable_unused(struct clk_hw *hw)
unsigned long flags;
u32 reg;
+ if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT)
+ return;
+
spin_lock_irqsave(gate->lock, flags);
if (!gate->share_count || *gate->share_count == 0) {
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index f074dd8..01ff1db 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -5,6 +5,8 @@
#include <linux/spinlock.h>
#include <linux/clk-provider.h>
+#define IMX_CLK_GATE2_SINGLE_BIT 1
+
extern spinlock_t imx_ccm_lock;
void imx_check_clocks(struct clk *clks[], unsigned int count);
@@ -355,6 +357,17 @@ static inline struct clk_hw *imx_clk_hw_gate2_shared2(const char *name,
&imx_ccm_lock, share_count);
}
+static inline struct clk_hw *imx_dev_clk_hw_gate_shared(struct device *dev,
+ const char *name, const char *parent,
+ void __iomem *reg, u8 shift,
+ unsigned int *share_count)
+{
+ return clk_hw_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT |
+ CLK_OPS_PARENT_ENABLE, reg, shift, 0x3,
+ IMX_CLK_GATE2_SINGLE_BIT,
+ &imx_ccm_lock, share_count);
+}
+
static inline struct clk *imx_clk_gate2_cgr(const char *name,
const char *parent, void __iomem *reg, u8 shift, u8 cgr_val)
{
--
2.7.4
Some of the i.MX SoCs have a IP for interfacing the dedicated IPs with
clocks, resets and interrupts, plus some other specific control registers.
To allow the functionality to be split between drivers, this MFD driver is
added that has only two purposes: register the devices and map the entire
register addresses. Everything else is left to the dedicated drivers that
will bind to the registered devices.
Signed-off-by: Abel Vesa <[email protected]>
---
drivers/mfd/Kconfig | 11 +++++++++++
drivers/mfd/Makefile | 1 +
drivers/mfd/imx-mix.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 60 insertions(+)
create mode 100644 drivers/mfd/imx-mix.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 0a59249..7eeb17f 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -460,6 +460,17 @@ config MFD_MX25_TSADC
i.MX25 processors. They consist of a conversion queue for general
purpose ADC and a queue for Touchscreens.
+config MFD_IMX_MIX
+ tristate "NXP i.MX Generic Mix Control Driver"
+ depends on OF || COMPILE_TEST
+ help
+ Enable generic mixes support. On some i.MX platforms, there are
+ devices that are a mix of multiple functionalities like reset
+ controllers, clock controllers and some others. In order to split
+ those functionalities between the right drivers, this MFD populates
+ with virtual devices based on what's found in the devicetree node,
+ leaving the rest of the behavior control to the dedicated driver.
+
config MFD_HI6421_PMIC
tristate "HiSilicon Hi6421 PMU/Codec IC"
depends on OF
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index f935d10..5b2ae5d 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -113,6 +113,7 @@ obj-$(CONFIG_MFD_TWL4030_AUDIO) += twl4030-audio.o
obj-$(CONFIG_TWL6040_CORE) += twl6040.o
obj-$(CONFIG_MFD_MX25_TSADC) += fsl-imx25-tsadc.o
+obj-$(CONFIG_MFD_IMX_MIX) += imx-mix.o
obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o
obj-$(CONFIG_MFD_MC13XXX_SPI) += mc13xxx-spi.o
diff --git a/drivers/mfd/imx-mix.c b/drivers/mfd/imx-mix.c
new file mode 100644
index 00000000..4ea456f
--- /dev/null
+++ b/drivers/mfd/imx-mix.c
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2019 NXP.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+
+#include <linux/mfd/core.h>
+
+static int imx_mix_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ void __iomem *base;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ dev_set_drvdata(dev, base);
+
+ return devm_of_platform_populate(dev);
+}
+
+static const struct of_device_id imx_mix_of_match[] = {
+ { .compatible = "fsl,imx8mp-mix" },
+ { /* Sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, imx_mix_of_match);
+
+static struct platform_driver imx_mix_driver = {
+ .probe = imx_mix_probe,
+ .driver = {
+ .name = "imx-mix",
+ .of_match_table = of_match_ptr(imx_mix_of_match),
+ },
+};
+module_platform_driver(imx_mix_driver);
--
2.7.4
In order to allow runtime PM, the device needs to be passed on
to the register function. Audiomix clock controller, used on
i.MX8MP and future platforms, registers a pll14xx and has runtime
PM support.
Signed-off-by: Abel Vesa <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
---
drivers/clk/imx/clk-pll14xx.c | 8 ++++----
drivers/clk/imx/clk.h | 13 ++++++++++---
2 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index a83bbbe..f9eb189 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -378,9 +378,9 @@ static const struct clk_ops clk_pll1443x_ops = {
.set_rate = clk_pll1443x_set_rate,
};
-struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
- void __iomem *base,
- const struct imx_pll14xx_clk *pll_clk)
+struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
+ const char *parent_name, void __iomem *base,
+ const struct imx_pll14xx_clk *pll_clk)
{
struct clk_pll14xx *pll;
struct clk_hw *hw;
@@ -426,7 +426,7 @@ struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
hw = &pll->hw;
- ret = clk_hw_register(NULL, hw);
+ ret = clk_hw_register(dev, hw);
if (ret) {
pr_err("%s: failed to register pll %s %d\n",
__func__, name, ret);
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 01ff1db..fcd9952a 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -133,9 +133,9 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
#define imx_clk_pll14xx(name, parent_name, base, pll_clk) \
to_clk(imx_clk_hw_pll14xx(name, parent_name, base, pll_clk))
-struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
- void __iomem *base,
- const struct imx_pll14xx_clk *pll_clk);
+struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
+ const char *parent_name, void __iomem *base,
+ const struct imx_pll14xx_clk *pll_clk);
struct clk_hw *imx_clk_hw_pllv1(enum imx_pllv1_type type, const char *name,
const char *parent, void __iomem *base);
@@ -242,6 +242,13 @@ static inline struct clk *to_clk(struct clk_hw *hw)
return hw->clk;
}
+static inline struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
+ void __iomem *base,
+ const struct imx_pll14xx_clk *pll_clk)
+{
+ return imx_dev_clk_hw_pll14xx(NULL, name, parent_name, base, pll_clk);
+}
+
static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate)
{
return clk_hw_register_fixed_rate(NULL, name, NULL, 0, rate);
--
2.7.4
There are 5 AIPS maps in total, according to the RM. Add the missing
ones here.
Signed-off-by: Abel Vesa <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9b1616e..c08156f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -318,7 +318,7 @@
aips2: bus@30400000 {
compatible = "fsl,aips-bus", "simple-bus";
- reg = <0x305f0000 0x400000>;
+ reg = <0x305f0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -378,7 +378,7 @@
aips3: bus@30800000 {
compatible = "fsl,aips-bus", "simple-bus";
- reg = <0x309f0000 0x400000>;
+ reg = <0x309f0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -641,6 +641,22 @@
};
};
+ aips4: bus@32c00000 {
+ compatible = "fsl,aips-bus", "simple-bus";
+ reg = <0x32c00000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+
+ aips5: bus@30c00000 {
+ compatible = "fsl,aips-bus", "simple-bus";
+ reg = <0x30c00000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>,
--
2.7.4
On Wed, Apr 15, 2020 at 10:04 AM Abel Vesa <[email protected]> wrote:
>
> Add all the reset ids for the audiomix reset.
>
> Signed-off-by: Abel Vesa <[email protected]>
> ---
> include/dt-bindings/reset/imx-audiomix-reset.h | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
> create mode 100644 include/dt-bindings/reset/imx-audiomix-reset.h
>
> diff --git a/include/dt-bindings/reset/imx-audiomix-reset.h b/include/dt-bindings/reset/imx-audiomix-reset.h
> new file mode 100644
> index 00000000..67392c3
> --- /dev/null
> +++ b/include/dt-bindings/reset/imx-audiomix-reset.h
> @@ -0,0 +1,15 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright 2019 NXP.
> + */
> +
> +#ifndef DT_BINDING_RESET_IMX_AUDIOMIX_H
> +#define DT_BINDING_RESET_IMX_AUDIOMIX_H
> +
> +#define IMX_AUDIOMIX_EARC_RESET 0x0
> +#define IMX_AUDIOMIX_EARC_PHY_RESET 0x1
> +
> +#define IMX_AUDIOMIX_RESET_NUM 2
> +
This list doesn't seem necessary, as the number you pass ends up
simply being the bit index in a single register.
In a case like this you should better not have macros at all, those
are only needed when there is no easy way to the numbers in
the DT into something the driver can make sense of.
Arnd
On Wed, 15 Apr 2020, Abel Vesa wrote:
> Some of the i.MX SoCs have a IP for interfacing the dedicated IPs with
> clocks, resets and interrupts, plus some other specific control registers.
> To allow the functionality to be split between drivers, this MFD driver is
> added that has only two purposes: register the devices and map the entire
> register addresses. Everything else is left to the dedicated drivers that
> will bind to the registered devices.
>
> Signed-off-by: Abel Vesa <[email protected]>
> ---
> drivers/mfd/Kconfig | 11 +++++++++++
> drivers/mfd/Makefile | 1 +
> drivers/mfd/imx-mix.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 60 insertions(+)
> create mode 100644 drivers/mfd/imx-mix.c
For completeness - Arnd's reply to this patch:
https://www.spinics.net/lists/linux-clk/msg47703.html
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
On 20-04-17 09:07:47, Lee Jones wrote:
> On Wed, 15 Apr 2020, Abel Vesa wrote:
>
> > Some of the i.MX SoCs have a IP for interfacing the dedicated IPs with
> > clocks, resets and interrupts, plus some other specific control registers.
> > To allow the functionality to be split between drivers, this MFD driver is
> > added that has only two purposes: register the devices and map the entire
> > register addresses. Everything else is left to the dedicated drivers that
> > will bind to the registered devices.
> >
> > Signed-off-by: Abel Vesa <[email protected]>
> > ---
> > drivers/mfd/Kconfig | 11 +++++++++++
> > drivers/mfd/Makefile | 1 +
> > drivers/mfd/imx-mix.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
> > 3 files changed, 60 insertions(+)
> > create mode 100644 drivers/mfd/imx-mix.c
>
> For completeness - Arnd's reply to this patch:
>
> https://www.spinics.net/lists/linux-clk/msg47703.html
I'm replying here to Arnd's reply.
I'm trying to give here a whole picture of the entire problem while the
documentation for i.MX8MP is _not yet_ public.
Historically, each IP would have its own enclosure for all the related GPRs.
Starting with i.MX8MP some GPRs (and some subparts) from the IP were placed
inside these mixes.
Audiomix for example, has multiple SAIs, a PLL, and some reset bits for EARC and
some GPRs for AudioDSP. This means that i.MX8MP has 7 SAIs, 1 EARC and 1 AudioDSP.
Future platforms might have different numbers of SAIs, EARCs or AudioDSPs. The PLL
can't be placed in one of those SAIs and it was placed in audiomix.
The i.MX8MP has at least 4 of these mixes.
Now, the commonalities between all mixes are:
- have their own power domains
- driven by dedicated clock slice
- contain clocks and resets
- some very subsystem specific GPRs
Knowing that each mix has its own power domain, AFAICT, it needs to be registered
as a single device. Considering that it can have clocks (audiomix has gates,
muxes and plls), I believe that needs a clock driver, even more so since the
muxes need their parents from the platform clock driver. Same principle applies
to reset bits. The subsystem specific GPRs can be registered as syscon devices
and taken care of by its counterpart IP (e.g. the AudioDSP specific regs would
be taken care of by the DSP driver, if there is one).
Now based on all of the above, by using MFD we take care of the power domain
control for the entire mix, plus, the MFD doesn't have any kind of
functionality by its own, relying on its children devices that are populated
based on what is in the mix MFD devicetree node.
> --
> Lee Jones [李琼斯]
> Linaro Services Technical Lead
> Linaro.org │ Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog
Quoting Abel Vesa (2020-04-15 01:02:45)
> Audiomix on i.MX8MP registers two gates that share the same enable count
> but use the same bit to control the gate instead of two bits. By adding
> the flag IMX_CLK_GATE2_SINGLE_BIT we allow the gate2 to use the generic
> gate ops for enable, disable and is_enabled.
> For the disable_unused, nothing happens if this flag is specified.
>
> Signed-off-by: Abel Vesa <[email protected]>
> ---
Reviewed-by: Stephen Boyd <[email protected]>
> From: Abel Vesa <[email protected]>
> Sent: Wednesday, April 22, 2020 5:19 PM
> On 20-04-17 09:07:47, Lee Jones wrote:
> > On Wed, 15 Apr 2020, Abel Vesa wrote:
> >
> > > Some of the i.MX SoCs have a IP for interfacing the dedicated IPs
> > > with clocks, resets and interrupts, plus some other specific control registers.
> > > To allow the functionality to be split between drivers, this MFD
> > > driver is added that has only two purposes: register the devices and
> > > map the entire register addresses. Everything else is left to the
> > > dedicated drivers that will bind to the registered devices.
> > >
> > > Signed-off-by: Abel Vesa <[email protected]>
> > > ---
> > > drivers/mfd/Kconfig | 11 +++++++++++
> > > drivers/mfd/Makefile | 1 +
> > > drivers/mfd/imx-mix.c | 48
> > > ++++++++++++++++++++++++++++++++++++++++++++++++
> > > 3 files changed, 60 insertions(+)
> > > create mode 100644 drivers/mfd/imx-mix.c
> >
> > For completeness - Arnd's reply to this patch:
> >
>
> I'm replying here to Arnd's reply.
>
> I'm trying to give here a whole picture of the entire problem while the
> documentation for i.MX8MP is _not yet_ public.
>
> Historically, each IP would have its own enclosure for all the related GPRs.
> Starting with i.MX8MP some GPRs (and some subparts) from the IP were placed
> inside these mixes.
>
> Audiomix for example, has multiple SAIs, a PLL, and some reset bits for EARC
> and some GPRs for AudioDSP. This means that i.MX8MP has 7 SAIs, 1 EARC and
> 1 AudioDSP.
> Future platforms might have different numbers of SAIs, EARCs or AudioDSPs.
> The PLL can't be placed in one of those SAIs and it was placed in audiomix.
> The i.MX8MP has at least 4 of these mixes.
>
> Now, the commonalities between all mixes are:
> - have their own power domains
> - driven by dedicated clock slice
> - contain clocks and resets
> - some very subsystem specific GPRs
>
> Knowing that each mix has its own power domain, AFAICT, it needs to be
> registered as a single device. Considering that it can have clocks (audiomix has
> gates, muxes and plls), I believe that needs a clock driver, even more so since the
> muxes need their parents from the platform clock driver. Same principle applies
> to reset bits. The subsystem specific GPRs can be registered as syscon devices
> and taken care of by its counterpart IP (e.g. the AudioDSP specific regs would be
> taken care of by the DSP driver, if there is one).
>
> Now based on all of the above, by using MFD we take care of the power domain
> control for the entire mix, plus, the MFD doesn't have any kind of functionality
> by its own, relying on its children devices that are populated based on what is in
> the mix MFD devicetree node.
>
How about doing like this which maybe can address Arnd's concerns?
audiomix: audiomix@30e20000 {
compatible = "fsl,imx8mp-audiomix", "syscon";
reg = <0x30e20000 xxx>,
<0x30e20xxx xxx>;
reg-names = "audio", "reset", "...";
#clock-cells = <1>;
#reset-cells = <1>;
power-domains = <&audiomix_pd>;
}
That means we have one combo driver registering two controllers (clk/reset), both use
the same power domain as audiomix.
And it can be easily extended to support more services provided by audiomix over syscon
if needed.
Then the 'dummy' MDF driver is not needed anymore.
Jones & Arnd,
How do you think?
Regards
Aisheng
> > --
> > Lee Jones [李琼斯]
> > Linaro Services Technical Lead
> > Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook
> > | Twitter | Blog
On Thu, 23 Apr 2020, Aisheng Dong wrote:
> > From: Abel Vesa <[email protected]>
> > Sent: Wednesday, April 22, 2020 5:19 PM
> > On 20-04-17 09:07:47, Lee Jones wrote:
> > > On Wed, 15 Apr 2020, Abel Vesa wrote:
> > >
> > > > Some of the i.MX SoCs have a IP for interfacing the dedicated IPs
> > > > with clocks, resets and interrupts, plus some other specific control registers.
> > > > To allow the functionality to be split between drivers, this MFD
> > > > driver is added that has only two purposes: register the devices and
> > > > map the entire register addresses. Everything else is left to the
> > > > dedicated drivers that will bind to the registered devices.
> > > >
> > > > Signed-off-by: Abel Vesa <[email protected]>
> > > > ---
> > > > drivers/mfd/Kconfig | 11 +++++++++++
> > > > drivers/mfd/Makefile | 1 +
> > > > drivers/mfd/imx-mix.c | 48
> > > > ++++++++++++++++++++++++++++++++++++++++++++++++
> > > > 3 files changed, 60 insertions(+)
> > > > create mode 100644 drivers/mfd/imx-mix.c
> > >
> > > For completeness - Arnd's reply to this patch:
> > >
> >
> > I'm replying here to Arnd's reply.
> >
> > I'm trying to give here a whole picture of the entire problem while the
> > documentation for i.MX8MP is _not yet_ public.
> >
> > Historically, each IP would have its own enclosure for all the related GPRs.
> > Starting with i.MX8MP some GPRs (and some subparts) from the IP were placed
> > inside these mixes.
> >
> > Audiomix for example, has multiple SAIs, a PLL, and some reset bits for EARC
> > and some GPRs for AudioDSP. This means that i.MX8MP has 7 SAIs, 1 EARC and
> > 1 AudioDSP.
> > Future platforms might have different numbers of SAIs, EARCs or AudioDSPs.
> > The PLL can't be placed in one of those SAIs and it was placed in audiomix.
> > The i.MX8MP has at least 4 of these mixes.
> >
> > Now, the commonalities between all mixes are:
> > - have their own power domains
> > - driven by dedicated clock slice
> > - contain clocks and resets
> > - some very subsystem specific GPRs
> >
> > Knowing that each mix has its own power domain, AFAICT, it needs to be
> > registered as a single device. Considering that it can have clocks (audiomix has
> > gates, muxes and plls), I believe that needs a clock driver, even more so since the
> > muxes need their parents from the platform clock driver. Same principle applies
> > to reset bits. The subsystem specific GPRs can be registered as syscon devices
> > and taken care of by its counterpart IP (e.g. the AudioDSP specific regs would be
> > taken care of by the DSP driver, if there is one).
> >
> > Now based on all of the above, by using MFD we take care of the power domain
> > control for the entire mix, plus, the MFD doesn't have any kind of functionality
> > by its own, relying on its children devices that are populated based on what is in
> > the mix MFD devicetree node.
> >
>
> How about doing like this which maybe can address Arnd's concerns?
> audiomix: audiomix@30e20000 {
> compatible = "fsl,imx8mp-audiomix", "syscon";
> reg = <0x30e20000 xxx>,
> <0x30e20xxx xxx>;
> reg-names = "audio", "reset", "...";
> #clock-cells = <1>;
> #reset-cells = <1>;
> power-domains = <&audiomix_pd>;
> }
>
> That means we have one combo driver registering two controllers (clk/reset), both use
> the same power domain as audiomix.
> And it can be easily extended to support more services provided by audiomix over syscon
> if needed.
> Then the 'dummy' MDF driver is not needed anymore.
>
> Jones & Arnd,
> How do you think?
Sounds okay in principle. Anything that prevents the existence of a
dummy (a.k.a. pointless) MFD must be seen as a positive move.
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
On Wed, Apr 15, 2020 at 11:02:45AM +0300, Abel Vesa wrote:
> Audiomix on i.MX8MP registers two gates that share the same enable count
> but use the same bit to control the gate instead of two bits. By adding
> the flag IMX_CLK_GATE2_SINGLE_BIT we allow the gate2 to use the generic
> gate ops for enable, disable and is_enabled.
> For the disable_unused, nothing happens if this flag is specified.
>
> Signed-off-by: Abel Vesa <[email protected]>
Applied, thanks.
On Wed, Apr 15, 2020 at 11:02:46AM +0300, Abel Vesa wrote:
> In order to allow runtime PM, the device needs to be passed on
> to the register function. Audiomix clock controller, used on
> i.MX8MP and future platforms, registers a pll14xx and has runtime
> PM support.
>
> Signed-off-by: Abel Vesa <[email protected]>
> Reviewed-by: Stephen Boyd <[email protected]>
Applied, thanks.
On 20-04-24 07:27:27, Lee Jones wrote:
> On Thu, 23 Apr 2020, Aisheng Dong wrote:
>
> > > From: Abel Vesa <[email protected]>
> > > Sent: Wednesday, April 22, 2020 5:19 PM
> > > On 20-04-17 09:07:47, Lee Jones wrote:
> > > > On Wed, 15 Apr 2020, Abel Vesa wrote:
> > > >
> > > > > Some of the i.MX SoCs have a IP for interfacing the dedicated IPs
> > > > > with clocks, resets and interrupts, plus some other specific control registers.
> > > > > To allow the functionality to be split between drivers, this MFD
> > > > > driver is added that has only two purposes: register the devices and
> > > > > map the entire register addresses. Everything else is left to the
> > > > > dedicated drivers that will bind to the registered devices.
> > > > >
> > > > > Signed-off-by: Abel Vesa <[email protected]>
> > > > > ---
> > > > > drivers/mfd/Kconfig | 11 +++++++++++
> > > > > drivers/mfd/Makefile | 1 +
> > > > > drivers/mfd/imx-mix.c | 48
> > > > > ++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > 3 files changed, 60 insertions(+)
> > > > > create mode 100644 drivers/mfd/imx-mix.c
> > > >
> > > > For completeness - Arnd's reply to this patch:
> > > >
> > >
> > > I'm replying here to Arnd's reply.
> > >
> > > I'm trying to give here a whole picture of the entire problem while the
> > > documentation for i.MX8MP is _not yet_ public.
> > >
> > > Historically, each IP would have its own enclosure for all the related GPRs.
> > > Starting with i.MX8MP some GPRs (and some subparts) from the IP were placed
> > > inside these mixes.
> > >
> > > Audiomix for example, has multiple SAIs, a PLL, and some reset bits for EARC
> > > and some GPRs for AudioDSP. This means that i.MX8MP has 7 SAIs, 1 EARC and
> > > 1 AudioDSP.
> > > Future platforms might have different numbers of SAIs, EARCs or AudioDSPs.
> > > The PLL can't be placed in one of those SAIs and it was placed in audiomix.
> > > The i.MX8MP has at least 4 of these mixes.
> > >
> > > Now, the commonalities between all mixes are:
> > > - have their own power domains
> > > - driven by dedicated clock slice
> > > - contain clocks and resets
> > > - some very subsystem specific GPRs
> > >
> > > Knowing that each mix has its own power domain, AFAICT, it needs to be
> > > registered as a single device. Considering that it can have clocks (audiomix has
> > > gates, muxes and plls), I believe that needs a clock driver, even more so since the
> > > muxes need their parents from the platform clock driver. Same principle applies
> > > to reset bits. The subsystem specific GPRs can be registered as syscon devices
> > > and taken care of by its counterpart IP (e.g. the AudioDSP specific regs would be
> > > taken care of by the DSP driver, if there is one).
> > >
> > > Now based on all of the above, by using MFD we take care of the power domain
> > > control for the entire mix, plus, the MFD doesn't have any kind of functionality
> > > by its own, relying on its children devices that are populated based on what is in
> > > the mix MFD devicetree node.
> > >
> >
> > How about doing like this which maybe can address Arnd's concerns?
> > audiomix: audiomix@30e20000 {
> > compatible = "fsl,imx8mp-audiomix", "syscon";
> > reg = <0x30e20000 xxx>,
> > <0x30e20xxx xxx>;
> > reg-names = "audio", "reset", "...";
> > #clock-cells = <1>;
> > #reset-cells = <1>;
> > power-domains = <&audiomix_pd>;
> > }
> >
> > That means we have one combo driver registering two controllers (clk/reset), both use
> > the same power domain as audiomix.
> > And it can be easily extended to support more services provided by audiomix over syscon
> > if needed.
> > Then the 'dummy' MDF driver is not needed anymore.
> >
> > Jones & Arnd,
> > How do you think?
>
> Sounds okay in principle. Anything that prevents the existence of a
> dummy (a.k.a. pointless) MFD must be seen as a positive move.
>
OK, I'll do it in a single driver and single dts node.
But there might be an issue with the placement of this new driver.
drivers/clk/imx/ could be an option, but the driver will use a lot
of different APIs from different subsystems. Not the audiomix, but
the future mixes.
> --
> Lee Jones [李琼斯]
> Linaro Services Technical Lead
> Linaro.org │ Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog
> From: Abel Vesa <[email protected]>
> Sent: Thursday, April 30, 2020 6:04 PM
> To: Lee Jones <[email protected]>
> On 20-04-24 07:27:27, Lee Jones wrote:
> > On Thu, 23 Apr 2020, Aisheng Dong wrote:
> >
> > > > From: Abel Vesa <[email protected]>
> > > > Sent: Wednesday, April 22, 2020 5:19 PM On 20-04-17 09:07:47, Lee
> > > > Jones wrote:
> > > > > On Wed, 15 Apr 2020, Abel Vesa wrote:
> > > > >
> > > > > > Some of the i.MX SoCs have a IP for interfacing the dedicated
> > > > > > IPs with clocks, resets and interrupts, plus some other specific control
> registers.
> > > > > > To allow the functionality to be split between drivers, this
> > > > > > MFD driver is added that has only two purposes: register the
> > > > > > devices and map the entire register addresses. Everything else
> > > > > > is left to the dedicated drivers that will bind to the registered devices.
> > > > > >
> > > > > > Signed-off-by: Abel Vesa <[email protected]>
> > > > > > ---
> > > > > > drivers/mfd/Kconfig | 11 +++++++++++
> > > > > > drivers/mfd/Makefile | 1 +
> > > > > > drivers/mfd/imx-mix.c | 48
> > > > > > ++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > > 3 files changed, 60 insertions(+) create mode 100644
> > > > > > drivers/mfd/imx-mix.c
> > > > >
> > > > > For completeness - Arnd's reply to this patch:
> > > > >
> > > >
> > > > I'm replying here to Arnd's reply.
> > > >
> > > > I'm trying to give here a whole picture of the entire problem
> > > > while the documentation for i.MX8MP is _not yet_ public.
> > > >
> > > > Historically, each IP would have its own enclosure for all the related GPRs.
> > > > Starting with i.MX8MP some GPRs (and some subparts) from the IP
> > > > were placed inside these mixes.
> > > >
> > > > Audiomix for example, has multiple SAIs, a PLL, and some reset
> > > > bits for EARC and some GPRs for AudioDSP. This means that i.MX8MP
> > > > has 7 SAIs, 1 EARC and
> > > > 1 AudioDSP.
> > > > Future platforms might have different numbers of SAIs, EARCs or
> AudioDSPs.
> > > > The PLL can't be placed in one of those SAIs and it was placed in audiomix.
> > > > The i.MX8MP has at least 4 of these mixes.
> > > >
> > > > Now, the commonalities between all mixes are:
> > > > - have their own power domains
> > > > - driven by dedicated clock slice
> > > > - contain clocks and resets
> > > > - some very subsystem specific GPRs
> > > >
> > > > Knowing that each mix has its own power domain, AFAICT, it needs
> > > > to be registered as a single device. Considering that it can have
> > > > clocks (audiomix has gates, muxes and plls), I believe that needs
> > > > a clock driver, even more so since the muxes need their parents
> > > > from the platform clock driver. Same principle applies to reset
> > > > bits. The subsystem specific GPRs can be registered as syscon
> > > > devices and taken care of by its counterpart IP (e.g. the AudioDSP specific
> regs would be taken care of by the DSP driver, if there is one).
> > > >
> > > > Now based on all of the above, by using MFD we take care of the
> > > > power domain control for the entire mix, plus, the MFD doesn't
> > > > have any kind of functionality by its own, relying on its children
> > > > devices that are populated based on what is in the mix MFD devicetree
> node.
> > > >
> > >
> > > How about doing like this which maybe can address Arnd's concerns?
> > > audiomix: audiomix@30e20000 {
> > > compatible = "fsl,imx8mp-audiomix", "syscon";
> > > reg = <0x30e20000 xxx>,
> > > <0x30e20xxx xxx>;
> > > reg-names = "audio", "reset", "...";
> > > #clock-cells = <1>;
> > > #reset-cells = <1>;
> > > power-domains = <&audiomix_pd>; }
> > >
> > > That means we have one combo driver registering two controllers
> > > (clk/reset), both use the same power domain as audiomix.
> > > And it can be easily extended to support more services provided by
> > > audiomix over syscon if needed.
> > > Then the 'dummy' MDF driver is not needed anymore.
> > >
> > > Jones & Arnd,
> > > How do you think?
> >
> > Sounds okay in principle. Anything that prevents the existence of a
> > dummy (a.k.a. pointless) MFD must be seen as a positive move.
> >
>
> OK, I'll do it in a single driver and single dts node.
>
> But there might be an issue with the placement of this new driver.
>
> drivers/clk/imx/ could be an option, but the driver will use a lot of different APIs
> from different subsystems. Not the audiomix, but the future mixes.
Maybe Stephen could comment whether it's ok to push a combo driver
(e.g. clk&reset&syscon) In drivers/clk/imx.
From what we see, it seems already some similar combo drivers (clk&reset) there.
BTW, not sure if any technical block reasons to put in drivers/clk.
Maybe we can quickly try internally first.
Regards
Aisheng
>
> > --
> > Lee Jones [李琼斯]
> > Linaro Services Technical Lead
> > Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook
> > | Twitter | Blog
On 20-04-30 10:22:04, Aisheng Dong wrote:
> > From: Abel Vesa <[email protected]>
> > Sent: Thursday, April 30, 2020 6:04 PM
> > To: Lee Jones <[email protected]>
> > On 20-04-24 07:27:27, Lee Jones wrote:
> > > On Thu, 23 Apr 2020, Aisheng Dong wrote:
> > >
> > > > > From: Abel Vesa <[email protected]>
> > > > > Sent: Wednesday, April 22, 2020 5:19 PM On 20-04-17 09:07:47, Lee
> > > > > Jones wrote:
> > > > > > On Wed, 15 Apr 2020, Abel Vesa wrote:
> > > > > >
> > > > > > > Some of the i.MX SoCs have a IP for interfacing the dedicated
> > > > > > > IPs with clocks, resets and interrupts, plus some other specific control
> > registers.
> > > > > > > To allow the functionality to be split between drivers, this
> > > > > > > MFD driver is added that has only two purposes: register the
> > > > > > > devices and map the entire register addresses. Everything else
> > > > > > > is left to the dedicated drivers that will bind to the registered devices.
> > > > > > >
> > > > > > > Signed-off-by: Abel Vesa <[email protected]>
> > > > > > > ---
> > > > > > > drivers/mfd/Kconfig | 11 +++++++++++
> > > > > > > drivers/mfd/Makefile | 1 +
> > > > > > > drivers/mfd/imx-mix.c | 48
> > > > > > > ++++++++++++++++++++++++++++++++++++++++++++++++
> > > > > > > 3 files changed, 60 insertions(+) create mode 100644
> > > > > > > drivers/mfd/imx-mix.c
> > > > > >
> > > > > > For completeness - Arnd's reply to this patch:
> > > > > >
> > > > >
> > > > > I'm replying here to Arnd's reply.
> > > > >
> > > > > I'm trying to give here a whole picture of the entire problem
> > > > > while the documentation for i.MX8MP is _not yet_ public.
> > > > >
> > > > > Historically, each IP would have its own enclosure for all the related GPRs.
> > > > > Starting with i.MX8MP some GPRs (and some subparts) from the IP
> > > > > were placed inside these mixes.
> > > > >
> > > > > Audiomix for example, has multiple SAIs, a PLL, and some reset
> > > > > bits for EARC and some GPRs for AudioDSP. This means that i.MX8MP
> > > > > has 7 SAIs, 1 EARC and
> > > > > 1 AudioDSP.
> > > > > Future platforms might have different numbers of SAIs, EARCs or
> > AudioDSPs.
> > > > > The PLL can't be placed in one of those SAIs and it was placed in audiomix.
> > > > > The i.MX8MP has at least 4 of these mixes.
> > > > >
> > > > > Now, the commonalities between all mixes are:
> > > > > - have their own power domains
> > > > > - driven by dedicated clock slice
> > > > > - contain clocks and resets
> > > > > - some very subsystem specific GPRs
> > > > >
> > > > > Knowing that each mix has its own power domain, AFAICT, it needs
> > > > > to be registered as a single device. Considering that it can have
> > > > > clocks (audiomix has gates, muxes and plls), I believe that needs
> > > > > a clock driver, even more so since the muxes need their parents
> > > > > from the platform clock driver. Same principle applies to reset
> > > > > bits. The subsystem specific GPRs can be registered as syscon
> > > > > devices and taken care of by its counterpart IP (e.g. the AudioDSP specific
> > regs would be taken care of by the DSP driver, if there is one).
> > > > >
> > > > > Now based on all of the above, by using MFD we take care of the
> > > > > power domain control for the entire mix, plus, the MFD doesn't
> > > > > have any kind of functionality by its own, relying on its children
> > > > > devices that are populated based on what is in the mix MFD devicetree
> > node.
> > > > >
> > > >
> > > > How about doing like this which maybe can address Arnd's concerns?
> > > > audiomix: audiomix@30e20000 {
> > > > compatible = "fsl,imx8mp-audiomix", "syscon";
> > > > reg = <0x30e20000 xxx>,
> > > > <0x30e20xxx xxx>;
> > > > reg-names = "audio", "reset", "...";
> > > > #clock-cells = <1>;
> > > > #reset-cells = <1>;
> > > > power-domains = <&audiomix_pd>; }
> > > >
> > > > That means we have one combo driver registering two controllers
> > > > (clk/reset), both use the same power domain as audiomix.
> > > > And it can be easily extended to support more services provided by
> > > > audiomix over syscon if needed.
> > > > Then the 'dummy' MDF driver is not needed anymore.
> > > >
> > > > Jones & Arnd,
> > > > How do you think?
> > >
> > > Sounds okay in principle. Anything that prevents the existence of a
> > > dummy (a.k.a. pointless) MFD must be seen as a positive move.
> > >
> >
> > OK, I'll do it in a single driver and single dts node.
> >
> > But there might be an issue with the placement of this new driver.
> >
> > drivers/clk/imx/ could be an option, but the driver will use a lot of different APIs
> > from different subsystems. Not the audiomix, but the future mixes.
>
> Maybe Stephen could comment whether it's ok to push a combo driver
> (e.g. clk&reset&syscon) In drivers/clk/imx.
>
> From what we see, it seems already some similar combo drivers (clk&reset) there.
>
> BTW, not sure if any technical block reasons to put in drivers/clk.
> Maybe we can quickly try internally first.
>
Working on it already.
> Regards
> Aisheng
>
> >
> > > --
> > > Lee Jones [李琼斯]
> > > Linaro Services Technical Lead
> > > Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook
> > > | Twitter | Blog