Convert the i.MX reset binding to DT schema format using json-schema.
Signed-off-by: Anson Huang <[email protected]>
---
Changes since V1:
- add the compatible strings per SoC;
- use "reset-controller" as node name instead of src;
- add interrupt items description.
---
.../devicetree/bindings/reset/fsl,imx-src.txt | 49 -----------
.../devicetree/bindings/reset/fsl,imx-src.yaml | 98 ++++++++++++++++++++++
2 files changed, 98 insertions(+), 49 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/reset/fsl,imx-src.txt
create mode 100644 Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
diff --git a/Documentation/devicetree/bindings/reset/fsl,imx-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx-src.txt
deleted file mode 100644
index 6ed79e6..0000000
--- a/Documentation/devicetree/bindings/reset/fsl,imx-src.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-Freescale i.MX System Reset Controller
-======================================
-
-Please also refer to reset.txt in this directory for common reset
-controller binding usage.
-
-Required properties:
-- compatible: Should be "fsl,<chip>-src"
-- reg: should be register base and length as documented in the
- datasheet
-- interrupts: Should contain SRC interrupt and CPU WDOG interrupt,
- in this order.
-- #reset-cells: 1, see below
-
-example:
-
-src: src@20d8000 {
- compatible = "fsl,imx6q-src";
- reg = <0x020d8000 0x4000>;
- interrupts = <0 91 0x04 0 96 0x04>;
- #reset-cells = <1>;
-};
-
-Specifying reset lines connected to IP modules
-==============================================
-
-The system reset controller can be used to reset the GPU, VPU,
-IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
-nodes should specify the reset line on the SRC in their resets
-property, containing a phandle to the SRC device node and a
-RESET_INDEX specifying which module to reset, as described in
-reset.txt
-
-example:
-
- ipu1: ipu@2400000 {
- resets = <&src 2>;
- };
- ipu2: ipu@2800000 {
- resets = <&src 4>;
- };
-
-The following RESET_INDEX values are valid for i.MX5:
-GPU_RESET 0
-VPU_RESET 1
-IPU1_RESET 2
-OPEN_VG_RESET 3
-The following additional RESET_INDEX value is valid for i.MX6:
-IPU2_RESET 4
diff --git a/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml b/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
new file mode 100644
index 0000000..7cd6095
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
@@ -0,0 +1,98 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX System Reset Controller
+
+maintainers:
+ - Philipp Zabel <[email protected]>
+
+description: |
+ The system reset controller can be used to reset the GPU, VPU,
+ IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
+ nodes should specify the reset line on the SRC in their resets
+ property, containing a phandle to the SRC device node and a
+ RESET_INDEX specifying which module to reset, as described in
+ reset.txt
+
+ The following RESET_INDEX values are valid for i.MX5:
+ GPU_RESET 0
+ VPU_RESET 1
+ IPU1_RESET 2
+ OPEN_VG_RESET 3
+ The following additional RESET_INDEX value is valid for i.MX6:
+ IPU2_RESET 4
+
+properties:
+ compatible:
+ oneOf:
+ - description: on i.MX51 the following compatible must be specified
+ items:
+ - const: "fsl,imx51-src"
+
+ - description: on i.MX50 the following compatibles must be specified
+ items:
+ - const: "fsl,imx50-src"
+ - const: "fsl,imx51-src"
+
+ - description: on i.MX53 the following compatibles must be specified
+ items:
+ - const: "fsl,imx53-src"
+ - const: "fsl,imx51-src"
+
+ - description: on i.MX6Q the following compatibles must be specified
+ items:
+ - const: "fsl,imx6q-src"
+ - const: "fsl,imx51-src"
+
+ - description: on i.MX6SX the following compatibles must be specified
+ items:
+ - const: "fsl,imx6sx-src"
+ - const: "fsl,imx51-src"
+
+ - description: on i.MX6SL the following compatibles must be specified
+ items:
+ - const: "fsl,imx6sl-src"
+ - const: "fsl,imx51-src"
+
+ - description: on i.MX6UL the following compatibles must be specified
+ items:
+ - const: "fsl,imx6ul-src"
+ - const: "fsl,imx51-src"
+
+ - description: on i.MX6SLL the following compatibles must be specified
+ items:
+ - const: "fsl,imx6sll-src"
+ - const: "fsl,imx51-src"
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: SRC interrupt
+ - description: CPU WDOG interrupts out of SRC
+ minItems: 1
+ maxItems: 2
+
+ '#reset-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ reset-controller@73fd0000 {
+ compatible = "fsl,imx51-src";
+ reg = <0x73fd0000 0x4000>;
+ interrupts = <75>;
+ #reset-cells = <1>;
+ };
--
2.7.4
> From: Anson Huang <[email protected]>
> Sent: Monday, May 18, 2020 6:04 PM
>
> Convert the i.MX reset binding to DT schema format using json-schema.
>
> Signed-off-by: Anson Huang <[email protected]>
> ---
> Changes since V1:
> - add the compatible strings per SoC;
> - use "reset-controller" as node name instead of src;
> - add interrupt items description.
> ---
> .../devicetree/bindings/reset/fsl,imx-src.txt | 49 -----------
> .../devicetree/bindings/reset/fsl,imx-src.yaml | 98
> ++++++++++++++++++++++
> 2 files changed, 98 insertions(+), 49 deletions(-) delete mode 100644
> Documentation/devicetree/bindings/reset/fsl,imx-src.txt
> create mode 100644
> Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
>
> diff --git a/Documentation/devicetree/bindings/reset/fsl,imx-src.txt
> b/Documentation/devicetree/bindings/reset/fsl,imx-src.txt
> deleted file mode 100644
> index 6ed79e6..0000000
> --- a/Documentation/devicetree/bindings/reset/fsl,imx-src.txt
> +++ /dev/null
> @@ -1,49 +0,0 @@
> -Freescale i.MX System Reset Controller
> -======================================
> -
> -Please also refer to reset.txt in this directory for common reset -controller
> binding usage.
> -
> -Required properties:
> -- compatible: Should be "fsl,<chip>-src"
> -- reg: should be register base and length as documented in the
> - datasheet
> -- interrupts: Should contain SRC interrupt and CPU WDOG interrupt,
> - in this order.
> -- #reset-cells: 1, see below
> -
> -example:
> -
> -src: src@20d8000 {
> - compatible = "fsl,imx6q-src";
> - reg = <0x020d8000 0x4000>;
> - interrupts = <0 91 0x04 0 96 0x04>;
> - #reset-cells = <1>;
> -};
> -
> -Specifying reset lines connected to IP modules
> -==============================================
> -
> -The system reset controller can be used to reset the GPU, VPU, -IPU, and
> OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device -nodes should
> specify the reset line on the SRC in their resets -property, containing a phandle
> to the SRC device node and a -RESET_INDEX specifying which module to reset,
> as described in -reset.txt
> -
> -example:
> -
> - ipu1: ipu@2400000 {
> - resets = <&src 2>;
> - };
> - ipu2: ipu@2800000 {
> - resets = <&src 4>;
> - };
> -
> -The following RESET_INDEX values are valid for i.MX5:
> -GPU_RESET 0
> -VPU_RESET 1
> -IPU1_RESET 2
> -OPEN_VG_RESET 3
> -The following additional RESET_INDEX value is valid for i.MX6:
> -IPU2_RESET 4
> diff --git a/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
> b/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
> new file mode 100644
> index 0000000..7cd6095
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/fsl,imx-src.yaml
> @@ -0,0 +1,98 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> +---
[...]
> +title: Freescale i.MX System Reset Controller
> +
> +maintainers:
> + - Philipp Zabel <[email protected]>
> +
> +description: |
> + The system reset controller can be used to reset the GPU, VPU,
> + IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
> + nodes should specify the reset line on the SRC in their resets
> + property, containing a phandle to the SRC device node and a
> + RESET_INDEX specifying which module to reset, as described in
> + reset.txt
> +
> + The following RESET_INDEX values are valid for i.MX5:
> + GPU_RESET 0
> + VPU_RESET 1
> + IPU1_RESET 2
> + OPEN_VG_RESET 3
> + The following additional RESET_INDEX value is valid for i.MX6:
> + IPU2_RESET 4
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: on i.MX51 the following compatible must be specified
Unnecessary description
Otherwise:
Reviewed-by: Dong Aisheng <[email protected]>
Regards
Aisheng
> + items:
> + - const: "fsl,imx51-src"
> +
> + - description: on i.MX50 the following compatibles must be specified
> + items:
> + - const: "fsl,imx50-src"
> + - const: "fsl,imx51-src"
> +
> + - description: on i.MX53 the following compatibles must be specified
> + items:
> + - const: "fsl,imx53-src"
> + - const: "fsl,imx51-src"
> +
> + - description: on i.MX6Q the following compatibles must be specified
> + items:
> + - const: "fsl,imx6q-src"
> + - const: "fsl,imx51-src"
> +
> + - description: on i.MX6SX the following compatibles must be specified
> + items:
> + - const: "fsl,imx6sx-src"
> + - const: "fsl,imx51-src"
> +
> + - description: on i.MX6SL the following compatibles must be specified
> + items:
> + - const: "fsl,imx6sl-src"
> + - const: "fsl,imx51-src"
> +
> + - description: on i.MX6UL the following compatibles must be specified
> + items:
> + - const: "fsl,imx6ul-src"
> + - const: "fsl,imx51-src"
> +
> + - description: on i.MX6SLL the following compatibles must be specified
> + items:
> + - const: "fsl,imx6sll-src"
> + - const: "fsl,imx51-src"
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: SRC interrupt
> + - description: CPU WDOG interrupts out of SRC
> + minItems: 1
> + maxItems: 2
> +
> + '#reset-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - '#reset-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + reset-controller@73fd0000 {
> + compatible = "fsl,imx51-src";
> + reg = <0x73fd0000 0x4000>;
> + interrupts = <75>;
> + #reset-cells = <1>;
> + };
> --
> 2.7.4