From: Peng Fan <[email protected]>
patch 1,3 is to add mu node
Patch 2 is to add mu root clk for i.MX8MP
Patch 1,3 is not merged, since patch 3 depends on patch 2 to make mu work.
Peng Fan (3):
arm64: dts: imx8m: add mu node
clk: imx8mp: add mu root clk
arm64: dts: imx8mp: add mu node
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++++
drivers/clk/imx/clk-imx8mp.c | 1 +
5 files changed, 37 insertions(+)
--
2.16.4
From: Peng Fan <[email protected]>
Add mu root clk for mu mailbox usage.
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/imx/clk-imx8mp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 41469e2cc3de..95eeb9eef70c 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -677,6 +677,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2", ccm_base + 0x4180, 0);
hws[IMX8MP_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3", ccm_base + 0x4190, 0);
hws[IMX8MP_CLK_I2C4_ROOT] = imx_clk_hw_gate4("i2c4_root_clk", "i2c4", ccm_base + 0x41a0, 0);
+ hws[IMX8MP_CLK_MU_ROOT] = imx_clk_hw_gate4("mu_root_clk", "ipg_root", ccm_base + 0x4210, 0);
hws[IMX8MP_CLK_OCOTP_ROOT] = imx_clk_hw_gate4("ocotp_root_clk", "ipg_root", ccm_base + 0x4220, 0);
hws[IMX8MP_CLK_PCIE_ROOT] = imx_clk_hw_gate4("pcie_root_clk", "pcie_aux", ccm_base + 0x4250, 0);
hws[IMX8MP_CLK_PWM1_ROOT] = imx_clk_hw_gate4("pwm1_root_clk", "pwm1", ccm_base + 0x4280, 0);
--
2.16.4
> From: Peng Fan <[email protected]>
> Sent: Wednesday, May 20, 2020 10:05 AM
>
> Add mu root clk for mu mailbox usage.
>
> Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Dong Aisheng <[email protected]>
Regards
Aisheng