2020-07-16 05:33:56

by Sivaprakash Murugesan

Subject: [PATCH] clk: qcom: ipq8074: Add correct index for PCIe clocks

The PCIe clocks GCC_PCIE0_AXI_S_BRIDGE_CLK, GCC_PCIE0_RCHNG_CLK_SRC,
GCC_PCIE0_RCHNG_CLK are wrongly added to the gcc reset group.

Move them to the gcc clock group.

Reported-by: kernel test robot <[email protected]>
Signed-off-by: Sivaprakash Murugesan <[email protected]>
---
include/dt-bindings/clock/qcom,gcc-ipq8074.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/dt-bindings/clock/qcom,gcc-ipq8074.h b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
index e3e018565add..8e2bec1c91bf 100644
--- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
@@ -230,6 +230,9 @@
#define GCC_GP1_CLK 221
#define GCC_GP2_CLK 222
#define GCC_GP3_CLK 223
+#define GCC_PCIE0_AXI_S_BRIDGE_CLK 224
+#define GCC_PCIE0_RCHNG_CLK_SRC 225
+#define GCC_PCIE0_RCHNG_CLK 226

#define GCC_BLSP1_BCR 0
#define GCC_BLSP1_QUP1_BCR 1
@@ -363,8 +366,5 @@
#define GCC_PCIE1_AHB_ARES 129
#define GCC_PCIE1_AXI_MASTER_STICKY_ARES 130
#define GCC_PCIE0_AXI_SLAVE_STICKY_ARES 131
-#define GCC_PCIE0_AXI_S_BRIDGE_CLK 132
-#define GCC_PCIE0_RCHNG_CLK_SRC 133
-#define GCC_PCIE0_RCHNG_CLK 134

#endif
--
2.7.4

2020-07-21 00:39:45

by Stephen Boyd

Subject: Re: [PATCH] clk: qcom: ipq8074: Add correct index for PCIe clocks

Quoting Sivaprakash Murugesan (2020-07-15 22:32:50)
> The PCIe clocks GCC_PCIE0_AXI_S_BRIDGE_CLK, GCC_PCIE0_RCHNG_CLK_SRC,
> GCC_PCIE0_RCHNG_CLK are wrongly added to the gcc reset group.
>
> Move them to the gcc clock group.
>
> Reported-by: kernel test robot <[email protected]>
> Signed-off-by: Sivaprakash Murugesan <[email protected]>
> ---

Applied to clk-next