2020-07-21 10:47:54

by Shaik Sajida Bhanu

Subject: [PATCH V2] arm64: dts: qcom: sc7180: Include xo clock to sdhc clocks list

From: Veerabhadrarao Badiganti <[email protected]>

Include xo clock to sdhc clocks list which will be used
in calculating MCLK_FREQ field of DLL_CONFIG2 register.

Signed-off-by: Veerabhadrarao Badiganti <[email protected]>
Signed-off-by: Shaik Sajida Bhanu <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index d78a066..7ccb780 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -682,8 +682,9 @@
interrupt-names = "hc_irq", "pwr_irq";

clocks = <&gcc GCC_SDCC1_APPS_CLK>,
- <&gcc GCC_SDCC1_AHB_CLK>;
- clock-names = "core", "iface";
+ <&gcc GCC_SDCC1_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "core", "iface", "xo";
interconnects = <&aggre1_noc MASTER_EMMC &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_EMMC_CFG>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
@@ -2481,8 +2482,9 @@
interrupt-names = "hc_irq", "pwr_irq";

clocks = <&gcc GCC_SDCC2_APPS_CLK>,
- <&gcc GCC_SDCC2_AHB_CLK>;
- clock-names = "core", "iface";
+ <&gcc GCC_SDCC2_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "core", "iface", "xo";

interconnects = <&aggre1_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

2020-07-22 03:49:11

by Bjorn Andersson

Subject: Re: [PATCH V2] arm64: dts: qcom: sc7180: Include xo clock to sdhc clocks list

On Tue 21 Jul 03:44 PDT 2020, Shaik Sajida Bhanu wrote:

> From: Veerabhadrarao Badiganti <[email protected]>
>
> Include xo clock to sdhc clocks list which will be used
> in calculating MCLK_FREQ field of DLL_CONFIG2 register.
>

Can you please describe why this is useful, perhaps required? What
difference does this make and what problem does it resolve?

If required please include a Fixes: tag here to show that you're fixing
the previous commit.

Thanks,
Bjorn

> Signed-off-by: Veerabhadrarao Badiganti <[email protected]>
> Signed-off-by: Shaik Sajida Bhanu <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index d78a066..7ccb780 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -682,8 +682,9 @@
> interrupt-names = "hc_irq", "pwr_irq";
>
> clocks = <&gcc GCC_SDCC1_APPS_CLK>,
> - <&gcc GCC_SDCC1_AHB_CLK>;
> - clock-names = "core", "iface";
> + <&gcc GCC_SDCC1_AHB_CLK>,
> + <&xo_board>;
> + clock-names = "core", "iface", "xo";
> interconnects = <&aggre1_noc MASTER_EMMC &mc_virt SLAVE_EBI1>,
> <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_EMMC_CFG>;
> interconnect-names = "sdhc-ddr","cpu-sdhc";
> @@ -2481,8 +2482,9 @@
> interrupt-names = "hc_irq", "pwr_irq";
>
> clocks = <&gcc GCC_SDCC2_APPS_CLK>,
> - <&gcc GCC_SDCC2_AHB_CLK>;
> - clock-names = "core", "iface";
> + <&gcc GCC_SDCC2_AHB_CLK>,
> + <&xo_board>;
> + clock-names = "core", "iface", "xo";
>
> interconnects = <&aggre1_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
> <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
> --
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
>