2020-08-05 07:07:23

by Alain Volmat

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Subject: [PATCH 15/18] spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate

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From: Amelie Delaunay <[email protected]>

Fix spi->clk_rate when it is odd to the nearest lowest even value because
minimum SPI divider is 2.

Signed-off-by: Amelie Delaunay <[email protected]>
Signed-off-by: Alain Volmat <[email protected]>
---
drivers/spi/spi-stm32.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 0aec32538093..2665d8d7f318 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -436,7 +436,8 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz,
{
u32 div, mbrdiv;

- div = DIV_ROUND_UP(spi->clk_rate, speed_hz);
+ /* Ensure spi->clk_rate is even */
+ div = DIV_ROUND_UP(spi->clk_rate & ~0x1, speed_hz);

/*
* SPI framework set xfer->speed_hz to master->max_speed_hz if
--
2.7.4

2020-08-05 20:11:06

by Mark Brown

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Subject: Re: [PATCH 15/18] spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate

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On Wed, Aug 05, 2020 at 09:02:10AM +0200, Alain Volmat wrote:
> From: Amelie Delaunay <[email protected]>
>
> Fix spi->clk_rate when it is odd to the nearest lowest even value because
> minimum SPI divider is 2.

This is a fix too.

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