2020-08-25 00:55:34

by Zhang, Cathy

[permalink] [raw]
Subject: [PATCH v4 2/2] x86/kvm: Expose TSX Suspend Load Tracking feature

TSX suspend load tracking instruction is supported by
Intel processor, Sapphire Rapids. It aims to give a
way to choose which memory accesses do not need to be
tracked in the TSX read set. It's availability is indicated
as CPUID.(EAX=7,ECX=0):EDX[bit 16].

Expose TSX Suspend Load Address Tracking feature in KVM
CPUID, so KVM could pass this information to guests and
they can make use of this feature accordingly.

Signed-off-by: Cathy Zhang <[email protected]>
Reviewed-by: Tony Luck <[email protected]>
---
Changes since v3:
* Remove SERIALIZE part and refactor commit message..

Changes since v2:
* Merge two patches into a single one. (Luck, Tony)
* Add overview introduction for features. (Sean Christopherson)
* Refactor commit message to explain why expose feature bits. (Luck, Tony)
---
arch/x86/kvm/cpuid.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 3fd6eec..7456f9a 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -371,7 +371,7 @@ void kvm_set_cpu_caps(void)
F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) |
- F(SERIALIZE)
+ F(SERIALIZE) | F(TSXLDTRK)
);

/* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */
--
1.8.3.1


2020-08-30 19:41:13

by tip-bot2 for Jacob Pan

[permalink] [raw]
Subject: [tip: x86/cpu] x86/kvm: Expose TSX Suspend Load Tracking feature

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID: 61aa9a0a5eae2100c171698bffabde8d5e9f694d
Gitweb: https://git.kernel.org/tip/61aa9a0a5eae2100c171698bffabde8d5e9f694d
Author: Cathy Zhang <[email protected]>
AuthorDate: Tue, 25 Aug 2020 08:47:58 +08:00
Committer: Borislav Petkov <[email protected]>
CommitterDate: Sun, 30 Aug 2020 21:34:10 +02:00

x86/kvm: Expose TSX Suspend Load Tracking feature

TSX suspend load tracking instruction is supported by the Intel uarch
Sapphire Rapids. It aims to give a way to choose which memory accesses
do not need to be tracked in the TSX read set. It's availability is
indicated as CPUID.(EAX=7,ECX=0):EDX[bit 16].

Expose TSX Suspend Load Address Tracking feature in KVM CPUID, so KVM
could pass this information to guests and they can make use of this
feature accordingly.

Signed-off-by: Cathy Zhang <[email protected]>
Signed-off-by: Borislav Petkov <[email protected]>
Reviewed-by: Tony Luck <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
---
arch/x86/kvm/cpuid.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 3fd6eec..7456f9a 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -371,7 +371,7 @@ void kvm_set_cpu_caps(void)
F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) |
- F(SERIALIZE)
+ F(SERIALIZE) | F(TSXLDTRK)
);

/* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */