2020-10-23 08:28:39

by Hector Yuan

Subject: [PATCH v1 3/6] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW

From: "Hector.Yuan" <[email protected]>

Add devicetree bindings for MediaTek HW driver.

Signed-off-by: Hector.Yuan <[email protected]>
---
.../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 46 ++++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
new file mode 100644
index 0000000..a99f44f
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek's CPUFREQ Bindings
+
+maintainers:
+ - Hector Yuan <[email protected]>
+
+description:
+ CPUFREQ HW is a hardware engine used by MediaTek
+ SoCs to manage frequency in hardware. It is capable of controlling frequency
+ for multiple clusters.
+
+properties:
+ compatible:
+ const: mediatek,cpufreq-hw
+
+ reg:
+ minItems: 1
+ maxItems: 2
+ description: |
+ Addresses and sizes for the memory of the HW bases in each frequency domain.
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpufreq_hw: cpufreq@11bc00 {
+ compatible = "mediatek,cpufreq-hw";
+ reg = <0 0x11bc10 0 0x8c>,
+ <0 0x11bca0 0 0x8c>;
+ };
+ };
+
+
+
+
--
1.7.9.5

2020-10-23 08:39:38

by Viresh Kumar

Subject: Re: [PATCH v1 3/6] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW

On 23-10-20, 16:24, Hector Yuan wrote:
> From: "Hector.Yuan" <[email protected]>
>
> Add devicetree bindings for MediaTek HW driver.
>
> Signed-off-by: Hector.Yuan <[email protected]>
> ---
> .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 46 ++++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
>
> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> new file mode 100644
> index 0000000..a99f44f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek's CPUFREQ Bindings
> +
> +maintainers:
> + - Hector Yuan <[email protected]>
> +
> +description:
> + CPUFREQ HW is a hardware engine used by MediaTek
> + SoCs to manage frequency in hardware. It is capable of controlling frequency
> + for multiple clusters.
> +
> +properties:
> + compatible:
> + const: mediatek,cpufreq-hw
> +
> + reg:
> + minItems: 1
> + maxItems: 2
> + description: |
> + Addresses and sizes for the memory of the HW bases in each frequency domain.
> +
> +required:
> + - compatible
> + - reg
> +
> +examples:
> + - |
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpufreq_hw: cpufreq@11bc00 {
> + compatible = "mediatek,cpufreq-hw";
> + reg = <0 0x11bc10 0 0x8c>,
> + <0 0x11bca0 0 0x8c>;
> + };
> + };

You still need to keep the CPU specific part here and explain how this
block is going to get used using the other binding you added.

--
viresh

2020-10-23 16:37:02

by Rob Herring

Subject: Re: [PATCH v1 3/6] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW

On Fri, 23 Oct 2020 16:24:50 +0800, Hector Yuan wrote:
> From: "Hector.Yuan" <[email protected]>
>
> Add devicetree bindings for MediaTek HW driver.
>
> Signed-off-by: Hector.Yuan <[email protected]>
> ---
> .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 46 ++++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
>


My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:
./Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml:46:1: [warning] too many blank lines (4 > 1) (empty-lines)

dtschema/dtc warnings/errors:


See https://patchwork.ozlabs.org/patch/1386572

The base for the patch is generally the last rc1. Any dependencies
should be noted.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

2020-10-26 07:00:29

by Hector Yuan

Subject: Re: [PATCH v1 3/6] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW

On Fri, 2020-10-23 at 11:15 -0500, Rob Herring wrote:
> On Fri, 23 Oct 2020 16:24:50 +0800, Hector Yuan wrote:
> > From: "Hector.Yuan" <[email protected]>
> >
> > Add devicetree bindings for MediaTek HW driver.
> >
> > Signed-off-by: Hector.Yuan <[email protected]>
> > ---
> > .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 46 ++++++++++++++++++++
> > 1 file changed, 46 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> >
>
>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> yamllint warnings/errors:
> ./Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml:46:1: [warning] too many blank lines (4 > 1) (empty-lines)
>
> dtschema/dtc warnings/errors:
>
>
> See https://patchwork.ozlabs.org/patch/1386572
>
> The base for the patch is generally the last rc1. Any dependencies
> should be noted.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit.
>
OK, will fix this warning in v8.

2020-10-26 08:12:49

by Hector Yuan

Subject: Re: [PATCH v1 3/6] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW

On Fri, 2020-10-23 at 14:05 +0530, Viresh Kumar wrote:
> On 23-10-20, 16:24, Hector Yuan wrote:
> > From: "Hector.Yuan" <[email protected]>
> >
> > Add devicetree bindings for MediaTek HW driver.
> >
> > Signed-off-by: Hector.Yuan <[email protected]>
> > ---
> > .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 46 ++++++++++++++++++++
> > 1 file changed, 46 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> > new file mode 100644
> > index 0000000..a99f44f
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> > @@ -0,0 +1,46 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek's CPUFREQ Bindings
> > +
> > +maintainers:
> > + - Hector Yuan <[email protected]>
> > +
> > +description:
> > + CPUFREQ HW is a hardware engine used by MediaTek
> > + SoCs to manage frequency in hardware. It is capable of controlling frequency
> > + for multiple clusters.
> > +
> > +properties:
> > + compatible:
> > + const: mediatek,cpufreq-hw
> > +
> > + reg:
> > + minItems: 1
> > + maxItems: 2
> > + description: |
> > + Addresses and sizes for the memory of the HW bases in each frequency domain.
> > +
> > +required:
> > + - compatible
> > + - reg
> > +
> > +examples:
> > + - |
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + cpufreq_hw: cpufreq@11bc00 {
> > + compatible = "mediatek,cpufreq-hw";
> > + reg = <0 0x11bc10 0 0x8c>,
> > + <0 0x11bca0 0 0x8c>;
> > + };
> > + };
>
> You still need to keep the CPU specific part here and explain how this
> block is going to get used using the other binding you added.
>
OK, will add cpu part here in v8.