Using two distinct DMA zones turned out to be problematic. Here's an
attempt go back to a saner default.
I tested this on both a RPi4 and QEMU.
---
Changes since v6:
- Update patch #1 so we reserve crashkernel before request_standard_resources()
- Tested on top of Catalin's mem_init() patches.
Changes since v5:
- Unify ACPI/DT functions
Changes since v4:
- Fix of_dma_get_max_cpu_address() so it returns the last addressable
addres, not the limit
Changes since v3:
- Drop patch adding define in dma-mapping
- Address small review changes
- Update Ard's patch
- Add new patch removing examples from mmzone.h
Changes since v2:
- Introduce Ard's patch
- Improve OF dma-ranges parsing function
- Add unit test for OF function
- Address small changes
- Move crashkernel reservation later in boot process
Changes since v1:
- Parse dma-ranges instead of using machine compatible string
Ard Biesheuvel (1):
arm64: mm: Set ZONE_DMA size based on early IORT scan
Nicolas Saenz Julienne (6):
arm64: mm: Move reserve_crashkernel() into mem_init()
arm64: mm: Move zone_dma_bits initialization into zone_sizes_init()
of/address: Introduce of_dma_get_max_cpu_address()
of: unittest: Add test for of_dma_get_max_cpu_address()
arm64: mm: Set ZONE_DMA size based on devicetree's dma-ranges
mm: Remove examples from enum zone_type comment
arch/arm64/mm/init.c | 22 +++++++++-------
drivers/acpi/arm64/iort.c | 55 +++++++++++++++++++++++++++++++++++++++
drivers/of/address.c | 42 ++++++++++++++++++++++++++++++
drivers/of/unittest.c | 18 +++++++++++++
include/linux/acpi_iort.h | 4 +++
include/linux/mmzone.h | 20 --------------
include/linux/of.h | 7 +++++
7 files changed, 139 insertions(+), 29 deletions(-)
--
2.29.2
Introduce a test for of_dma_get_max_cup_address(), it uses the same DT
data as the rest of dma-ranges unit tests.
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Changes since v5:
- Update address expected by test
Changes since v3:
- Remove HAS_DMA guards
drivers/of/unittest.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index 06cc988faf78..98cc0163301b 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -869,6 +869,23 @@ static void __init of_unittest_changeset(void)
#endif
}
+static void __init of_unittest_dma_get_max_cpu_address(void)
+{
+ struct device_node *np;
+ phys_addr_t cpu_addr;
+
+ np = of_find_node_by_path("/testcase-data/address-tests");
+ if (!np) {
+ pr_err("missing testcase data\n");
+ return;
+ }
+
+ cpu_addr = of_dma_get_max_cpu_address(np);
+ unittest(cpu_addr == 0x4fffffff,
+ "of_dma_get_max_cpu_address: wrong CPU addr %pad (expecting %x)\n",
+ &cpu_addr, 0x4fffffff);
+}
+
static void __init of_unittest_dma_ranges_one(const char *path,
u64 expect_dma_addr, u64 expect_paddr)
{
@@ -3266,6 +3283,7 @@ static int __init of_unittest(void)
of_unittest_changeset();
of_unittest_parse_interrupts();
of_unittest_parse_interrupts_extended();
+ of_unittest_dma_get_max_cpu_address();
of_unittest_parse_dma_ranges();
of_unittest_pci_dma_ranges();
of_unittest_match_node();
--
2.29.2
crashkernel might reserve memory located in ZONE_DMA. We plan to delay
ZONE_DMA's initialization after unflattening the devicetree and ACPI's
boot table initialization, so move it later in the boot process.
Specifically into bootmem_init() since request_standard_resources()
depends on it.
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
Tested-by: Jeremy Linton <[email protected]>
---
Changes since v6:
- Move crashkernel reserve placement earlier, in bootmem_init()
arch/arm64/mm/init.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 71d463544400..fafdf992fd32 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -389,8 +389,6 @@ void __init arm64_memblock_init(void)
else
arm64_dma32_phys_limit = PHYS_MASK + 1;
- reserve_crashkernel();
-
reserve_elfcorehdr();
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
@@ -430,6 +428,12 @@ void __init bootmem_init(void)
sparse_init();
zone_sizes_init(min, max);
+ /*
+ * request_standard_resources() depends on crashkernel's memory being
+ * reserved, so do it here.
+ */
+ reserve_crashkernel();
+
memblock_dump_all();
}
--
2.29.2
We recently introduced a 1 GB sized ZONE_DMA to cater for platforms
incorporating masters that can address less than 32 bits of DMA, in
particular the Raspberry Pi 4, which has 4 or 8 GB of DRAM, but has
peripherals that can only address up to 1 GB (and its PCIe host
bridge can only access the bottom 3 GB)
The DMA layer also needs to be able to allocate memory that is
guaranteed to meet those DMA constraints, for bounce buffering as well
as allocating the backing for consistent mappings. This is why the 1 GB
ZONE_DMA was introduced recently. Unfortunately, it turns out the having
a 1 GB ZONE_DMA as well as a ZONE_DMA32 causes problems with kdump, and
potentially in other places where allocations cannot cross zone
boundaries. Therefore, we should avoid having two separate DMA zones
when possible.
So, with the help of of_dma_get_max_cpu_address() get the topmost
physical address accessible to all DMA masters in system and use that
information to fine-tune ZONE_DMA's size. In the absence of addressing
limited masters ZONE_DMA will span the whole 32-bit address space,
otherwise, in the case of the Raspberry Pi 4 it'll only span the 30-bit
address space, and have ZONE_DMA32 cover the rest of the 32-bit address
space.
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
---
Changes since v4:
- Use fls64 as we're now using the max address (as opposed to the
limit)
Changes since v3:
- Simplify code for readability.
Changes since v2:
- Updated commit log by shamelessly copying Ard's ACPI commit log
arch/arm64/mm/init.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 0954ea736987..a96d3fbbd12c 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -42,8 +42,6 @@
#include <asm/tlb.h>
#include <asm/alternative.h>
-#define ARM64_ZONE_DMA_BITS 30
-
/*
* We need to be able to catch inadvertent references to memstart_addr
* that occur (potentially in generic code) before arm64_memblock_init()
@@ -188,9 +186,11 @@ static phys_addr_t __init max_zone_phys(unsigned int zone_bits)
static void __init zone_sizes_init(unsigned long min, unsigned long max)
{
unsigned long max_zone_pfns[MAX_NR_ZONES] = {0};
+ unsigned int __maybe_unused dt_zone_dma_bits;
#ifdef CONFIG_ZONE_DMA
- zone_dma_bits = ARM64_ZONE_DMA_BITS;
+ dt_zone_dma_bits = fls64(of_dma_get_max_cpu_address(NULL));
+ zone_dma_bits = min(32U, dt_zone_dma_bits);
arm64_dma_phys_limit = max_zone_phys(zone_dma_bits);
max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit);
#endif
--
2.29.2
Introduce of_dma_get_max_cpu_address(), which provides the highest CPU
physical address addressable by all DMA masters in the system. It's
specially useful for setting memory zones sizes at early boot time.
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Changes since v4:
- Return max address, not address limit (one off difference)
Changes since v3:
- use u64 with cpu_end
Changes since v2:
- Use PHYS_ADDR_MAX
- return phys_dma_t
- Rename function
- Correct subject
- Add support to start parsing from an arbitrary device node in order
for the function to work with unit tests
drivers/of/address.c | 42 ++++++++++++++++++++++++++++++++++++++++++
include/linux/of.h | 7 +++++++
2 files changed, 49 insertions(+)
diff --git a/drivers/of/address.c b/drivers/of/address.c
index 1c3257a2d4e3..73ddf2540f3f 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -1024,6 +1024,48 @@ int of_dma_get_range(struct device_node *np, const struct bus_dma_region **map)
}
#endif /* CONFIG_HAS_DMA */
+/**
+ * of_dma_get_max_cpu_address - Gets highest CPU address suitable for DMA
+ * @np: The node to start searching from or NULL to start from the root
+ *
+ * Gets the highest CPU physical address that is addressable by all DMA masters
+ * in the sub-tree pointed by np, or the whole tree if NULL is passed. If no
+ * DMA constrained device is found, it returns PHYS_ADDR_MAX.
+ */
+phys_addr_t __init of_dma_get_max_cpu_address(struct device_node *np)
+{
+ phys_addr_t max_cpu_addr = PHYS_ADDR_MAX;
+ struct of_range_parser parser;
+ phys_addr_t subtree_max_addr;
+ struct device_node *child;
+ struct of_range range;
+ const __be32 *ranges;
+ u64 cpu_end = 0;
+ int len;
+
+ if (!np)
+ np = of_root;
+
+ ranges = of_get_property(np, "dma-ranges", &len);
+ if (ranges && len) {
+ of_dma_range_parser_init(&parser, np);
+ for_each_of_range(&parser, &range)
+ if (range.cpu_addr + range.size > cpu_end)
+ cpu_end = range.cpu_addr + range.size - 1;
+
+ if (max_cpu_addr > cpu_end)
+ max_cpu_addr = cpu_end;
+ }
+
+ for_each_available_child_of_node(np, child) {
+ subtree_max_addr = of_dma_get_max_cpu_address(child);
+ if (max_cpu_addr > subtree_max_addr)
+ max_cpu_addr = subtree_max_addr;
+ }
+
+ return max_cpu_addr;
+}
+
/**
* of_dma_is_coherent - Check if device is coherent
* @np: device node
diff --git a/include/linux/of.h b/include/linux/of.h
index 5d51891cbf1a..9ed5b8532c30 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -558,6 +558,8 @@ int of_map_id(struct device_node *np, u32 id,
const char *map_name, const char *map_mask_name,
struct device_node **target, u32 *id_out);
+phys_addr_t of_dma_get_max_cpu_address(struct device_node *np);
+
#else /* CONFIG_OF */
static inline void of_core_init(void)
@@ -995,6 +997,11 @@ static inline int of_map_id(struct device_node *np, u32 id,
return -EINVAL;
}
+static inline phys_addr_t of_dma_get_max_cpu_address(struct device_node *np)
+{
+ return PHYS_ADDR_MAX;
+}
+
#define of_match_ptr(_ptr) NULL
#define of_match_node(_matches, _node) NULL
#endif /* CONFIG_OF */
--
2.29.2
zone_dma_bits's initialization happens earlier that it's actually
needed, in arm64_memblock_init(). So move it into the more suitable
zone_sizes_init().
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
Tested-by: Jeremy Linton <[email protected]>
---
arch/arm64/mm/init.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index fafdf992fd32..0954ea736987 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -190,6 +190,8 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
unsigned long max_zone_pfns[MAX_NR_ZONES] = {0};
#ifdef CONFIG_ZONE_DMA
+ zone_dma_bits = ARM64_ZONE_DMA_BITS;
+ arm64_dma_phys_limit = max_zone_phys(zone_dma_bits);
max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit);
#endif
#ifdef CONFIG_ZONE_DMA32
@@ -379,11 +381,6 @@ void __init arm64_memblock_init(void)
early_init_fdt_scan_reserved_mem();
- if (IS_ENABLED(CONFIG_ZONE_DMA)) {
- zone_dma_bits = ARM64_ZONE_DMA_BITS;
- arm64_dma_phys_limit = max_zone_phys(ARM64_ZONE_DMA_BITS);
- }
-
if (IS_ENABLED(CONFIG_ZONE_DMA32))
arm64_dma32_phys_limit = max_zone_phys(32);
else
--
2.29.2
On Thu, 19 Nov 2020 18:53:52 +0100, Nicolas Saenz Julienne wrote:
> Using two distinct DMA zones turned out to be problematic. Here's an
> attempt go back to a saner default.
>
> I tested this on both a RPi4 and QEMU.
Applied to arm64 (for-next/zone-dma-default-32-bit), thanks!
[1/7] arm64: mm: Move reserve_crashkernel() into mem_init()
https://git.kernel.org/arm64/c/0a30c53573b0
[2/7] arm64: mm: Move zone_dma_bits initialization into zone_sizes_init()
https://git.kernel.org/arm64/c/9804f8c69b04
[3/7] of/address: Introduce of_dma_get_max_cpu_address()
https://git.kernel.org/arm64/c/964db79d6c18
[4/7] of: unittest: Add test for of_dma_get_max_cpu_address()
https://git.kernel.org/arm64/c/07d13a1d6120
[5/7] arm64: mm: Set ZONE_DMA size based on devicetree's dma-ranges
https://git.kernel.org/arm64/c/8424ecdde7df
[6/7] arm64: mm: Set ZONE_DMA size based on early IORT scan
https://git.kernel.org/arm64/c/2b8652936f0c
[7/7] mm: Remove examples from enum zone_type comment
https://git.kernel.org/arm64/c/04435217f968
--
Catalin
Hi All,
It seems that the ZONE_DMA changes have broken the operation of Rochip rk3399 chipsets from v5.10.22 onwards.
It isn't clear what needs to be changed to get any of these boards up and running again. Any pointers on how/what to change ?
An easy test for debugging is to run stress :
stress --cpu 4 --io 4 --vm 2 --vm-bytes 128M
stress: info: [255] dispatching hogs: 4 cpu, 4 io, 2 vm, 0 hdd
[ 8.070280] SError Interrupt on CPU4, code 0xbf000000 -- SError
[ 8.070286] CPU: 4 PID: 261 Comm: stress Not tainted 5.10.21 #1
[ 8.070289] Hardware name: FriendlyElec NanoPi M4 (DT)
[ 8.070293] pstate: 00000005 (nzcv daif -PAN -UAO -TCO BTYPE=--)
[ 8.070296] pc : clear_page+0x14/0x28
[ 8.070298] lr : clear_subpage+0x50/0x90
[ 8.070302] sp : ffff800012abbc40
[ 8.070305] x29: ffff800012abbc40 x28: ffff000000f68000
[ 8.070313] x27: 0000000000000000 x26: ffff000001f38e40
[ 8.070320] x25: ffff8000114fd000 x24: 0000000000000000
[ 8.070326] x23: 0000000000000000 x22: 0000000000001000
[ 8.070334] x21: 0000ffffa7e00000 x20: fffffe0000010000
[ 8.070341] x19: ffff000000f68000 x18: 0000000000000000
[ 8.070348] x17: 0000000000000000 x16: 0000000000000000
[ 8.070354] x15: 0000000000000002 x14: 0000000000000001
[ 8.070361] x13: 0000000000075879 x12: 00000000000000c0
[ 8.070368] x11: ffff80006c46a000 x10: 0000000000000200
[ 8.070374] x9 : 0000000000000000 x8 : 0000000000000010
[ 8.070381] x7 : ffff00007db800a0 x6 : ffff800011b899c0
[ 8.070387] x5 : 0000000000000000 x4 : ffff00007db800f7
[ 8.070394] x3 : 0000020000200000 x2 : 0000000000000004
[ 8.070401] x1 : 0000000000000040 x0 : ffff0000085ff4c0
[ 8.070409] Kernel panic - not syncing: Asynchronous SError Interrupt
[ 8.070412] CPU: 4 PID: 261 Comm: stress Not tainted 5.10.21 #1
[ 8.070415] Hardware name: FriendlyElec NanoPi M4 (DT)
[ 8.070418] Call trace:
[ 8.070420] dump_backtrace+0x0/0x1b0
[ 8.070423] show_stack+0x18/0x70
[ 8.070425] dump_stack+0xd0/0x12c
[ 8.070428] panic+0x16c/0x334
[ 8.070430] nmi_panic+0x8c/0x90
[ 8.070433] arm64_serror_panic+0x78/0x84
[ 8.070435] do_serror+0x64/0x70
[ 8.070437] el1_error+0x88/0x108
[ 8.070440] clear_page+0x14/0x28
[ 8.070443] clear_huge_page+0x74/0x210
[ 8.070445] do_huge_pmd_anonymous_page+0x1b0/0x7c0
[ 8.070448] handle_mm_fault+0xdac/0x1290
[ 8.070451] do_page_fault+0x130/0x3a0
[ 8.070453] do_translation_fault+0xb0/0xc0
[ 8.070456] do_mem_abort+0x44/0xb0
[ 8.070458] el0_da+0x28/0x40
[ 8.070461] el0_sync_handler+0x168/0x1b0
[ 8.070464] el0_sync+0x174/0x180
[ 8.070508] SError Interrupt on CPU0, code 0xbf000000 -- SError
[ 8.070511] CPU: 0 PID: 258 Comm: stress Not tainted 5.10.21 #1
[ 8.070515] Hardware name: FriendlyElec NanoPi M4 (DT)
[ 8.070518] pstate: 80000000 (Nzcv daif -PAN -UAO -TCO BTYPE=--)
[ 8.070520] pc : 0000aaaacec22e98
[ 8.070523] lr : 0000aaaacec22d84
[ 8.070525] sp : 0000ffffe67a8620
[ 8.070528] x29: 0000ffffe67a8620 x28: 0000000000000003
[ 8.070534] x27: 0000aaaacec34000 x26: 0000ffffaeb42610
[ 8.070541] x25: 0000ffffa69af010 x24: 0000aaaacec23a98
[ 8.070547] x23: 0000aaaacec35010 x22: 0000aaaacec35000
[ 8.070554] x21: 0000000000001000 x20: ffffffffffffffff
[ 8.070560] x19: 0000000008000000 x18: 0000000000000000
[ 8.070567] x17: 0000000000000000 x16: 0000000000000000
[ 8.070573] x15: 0000000000000000 x14: 0000000000000000
[ 8.070580] x13: 0000000000008000 x12: 0000000000000000
[ 8.070587] x11: 0000000000000020 x10: 0000000000000030
[ 8.070593] x9 : 000000000000000a x8 : 00000000000000de
[ 8.070599] x7 : 0000000000200000 x6 : 000000000000021b
[ 8.070606] x5 : 0000000000000000 x4 : ffffffffffffffff
[ 8.070613] x3 : 0000000000000000 x2 : 0000ffffaeb47000
[ 8.070619] x1 : 000000000000005a x0 : 0000000000a58000
[ 8.070629] SMP: stopping secondary CPUs
[ 8.070632] Kernel Offset: disabled
[ 8.070634] CPU features: 0x0240022,6100600c
[ 8.070637] Memory Limit: none
--
2.32.0
Hi Matt,
On 2022-03-01 03:00, Matt Flax wrote:
> Hi All,
>
> It seems that the ZONE_DMA changes have broken the operation of Rochip rk3399 chipsets from v5.10.22 onwards.
>
> It isn't clear what needs to be changed to get any of these boards up and running again. Any pointers on how/what to change ?
Your firmware/bootloader setup is mismatched. If you're using the
downstream Rockchip blob for BL31, you need to reserve or remove the
memory range 0x8400000-0x9600000 to match the behaviour of the original
Android BSP U-Boot. The downstream firmware firewalls this memory off
for the Secure world such that any attempt to touch it from Linux
results in a fatal SError fault as below. Any apparent correlation with
the ZONE_DMA changes will simply be because they've affected the
behaviour of the page allocator, such that it's more likely to reach
into the affected range of memory.
Cheers,
Robin.
> An easy test for debugging is to run stress :
>
> stress --cpu 4 --io 4 --vm 2 --vm-bytes 128M
>
> stress: info: [255] dispatching hogs: 4 cpu, 4 io, 2 vm, 0 hdd
> [ 8.070280] SError Interrupt on CPU4, code 0xbf000000 -- SError
> [ 8.070286] CPU: 4 PID: 261 Comm: stress Not tainted 5.10.21 #1
> [ 8.070289] Hardware name: FriendlyElec NanoPi M4 (DT)
> [ 8.070293] pstate: 00000005 (nzcv daif -PAN -UAO -TCO BTYPE=--)
> [ 8.070296] pc : clear_page+0x14/0x28
> [ 8.070298] lr : clear_subpage+0x50/0x90
> [ 8.070302] sp : ffff800012abbc40
> [ 8.070305] x29: ffff800012abbc40 x28: ffff000000f68000
> [ 8.070313] x27: 0000000000000000 x26: ffff000001f38e40
> [ 8.070320] x25: ffff8000114fd000 x24: 0000000000000000
> [ 8.070326] x23: 0000000000000000 x22: 0000000000001000
> [ 8.070334] x21: 0000ffffa7e00000 x20: fffffe0000010000
> [ 8.070341] x19: ffff000000f68000 x18: 0000000000000000
> [ 8.070348] x17: 0000000000000000 x16: 0000000000000000
> [ 8.070354] x15: 0000000000000002 x14: 0000000000000001
> [ 8.070361] x13: 0000000000075879 x12: 00000000000000c0
> [ 8.070368] x11: ffff80006c46a000 x10: 0000000000000200
> [ 8.070374] x9 : 0000000000000000 x8 : 0000000000000010
> [ 8.070381] x7 : ffff00007db800a0 x6 : ffff800011b899c0
> [ 8.070387] x5 : 0000000000000000 x4 : ffff00007db800f7
> [ 8.070394] x3 : 0000020000200000 x2 : 0000000000000004
> [ 8.070401] x1 : 0000000000000040 x0 : ffff0000085ff4c0
> [ 8.070409] Kernel panic - not syncing: Asynchronous SError Interrupt
> [ 8.070412] CPU: 4 PID: 261 Comm: stress Not tainted 5.10.21 #1
> [ 8.070415] Hardware name: FriendlyElec NanoPi M4 (DT)
> [ 8.070418] Call trace:
> [ 8.070420] dump_backtrace+0x0/0x1b0
> [ 8.070423] show_stack+0x18/0x70
> [ 8.070425] dump_stack+0xd0/0x12c
> [ 8.070428] panic+0x16c/0x334
> [ 8.070430] nmi_panic+0x8c/0x90
> [ 8.070433] arm64_serror_panic+0x78/0x84
> [ 8.070435] do_serror+0x64/0x70
> [ 8.070437] el1_error+0x88/0x108
> [ 8.070440] clear_page+0x14/0x28
> [ 8.070443] clear_huge_page+0x74/0x210
> [ 8.070445] do_huge_pmd_anonymous_page+0x1b0/0x7c0
> [ 8.070448] handle_mm_fault+0xdac/0x1290
> [ 8.070451] do_page_fault+0x130/0x3a0
> [ 8.070453] do_translation_fault+0xb0/0xc0
> [ 8.070456] do_mem_abort+0x44/0xb0
> [ 8.070458] el0_da+0x28/0x40
> [ 8.070461] el0_sync_handler+0x168/0x1b0
> [ 8.070464] el0_sync+0x174/0x180
> [ 8.070508] SError Interrupt on CPU0, code 0xbf000000 -- SError
> [ 8.070511] CPU: 0 PID: 258 Comm: stress Not tainted 5.10.21 #1
> [ 8.070515] Hardware name: FriendlyElec NanoPi M4 (DT)
> [ 8.070518] pstate: 80000000 (Nzcv daif -PAN -UAO -TCO BTYPE=--)
> [ 8.070520] pc : 0000aaaacec22e98
> [ 8.070523] lr : 0000aaaacec22d84
> [ 8.070525] sp : 0000ffffe67a8620
> [ 8.070528] x29: 0000ffffe67a8620 x28: 0000000000000003
> [ 8.070534] x27: 0000aaaacec34000 x26: 0000ffffaeb42610
> [ 8.070541] x25: 0000ffffa69af010 x24: 0000aaaacec23a98
> [ 8.070547] x23: 0000aaaacec35010 x22: 0000aaaacec35000
> [ 8.070554] x21: 0000000000001000 x20: ffffffffffffffff
> [ 8.070560] x19: 0000000008000000 x18: 0000000000000000
> [ 8.070567] x17: 0000000000000000 x16: 0000000000000000
> [ 8.070573] x15: 0000000000000000 x14: 0000000000000000
> [ 8.070580] x13: 0000000000008000 x12: 0000000000000000
> [ 8.070587] x11: 0000000000000020 x10: 0000000000000030
> [ 8.070593] x9 : 000000000000000a x8 : 00000000000000de
> [ 8.070599] x7 : 0000000000200000 x6 : 000000000000021b
> [ 8.070606] x5 : 0000000000000000 x4 : ffffffffffffffff
> [ 8.070613] x3 : 0000000000000000 x2 : 0000ffffaeb47000
> [ 8.070619] x1 : 000000000000005a x0 : 0000000000a58000
> [ 8.070629] SMP: stopping secondary CPUs
> [ 8.070632] Kernel Offset: disabled
> [ 8.070634] CPU features: 0x0240022,6100600c
> [ 8.070637] Memory Limit: none
>
>