2020-12-22 13:44:12

by Weiyi Lu

Subject: [PATCH 2/2] arm64: dts: mediatek: Correct UART0 bus clock of MT8192

infra_uart0 clock is the real one what uart0 uses as bus clock.

Signed-off-by: Weiyi Lu <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 92dcfbd..ac5dca6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -283,7 +283,7 @@
"mediatek,mt6577-uart";
reg = <0 0x11002000 0 0x1000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&clk26m>, <&clk26m>;
+ clocks = <&clk26m>, <&infracfg CLK_INFRA_UART0>;
clock-names = "baud", "bus";
status = "disabled";
};
--
1.8.1.1.dirty

2021-01-31 19:52:28

by Matthias Brugger

Subject: Re: [PATCH 2/2] arm64: dts: mediatek: Correct UART0 bus clock of MT8192

On 22/12/2020 14:40, Weiyi Lu wrote:
> infra_uart0 clock is the real one what uart0 uses as bus clock.
>
> Signed-off-by: Weiyi Lu <[email protected]>
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 92dcfbd..ac5dca6 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -283,7 +283,7 @@
> "mediatek,mt6577-uart";
> reg = <0 0x11002000 0 0x1000>;
> interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
> - clocks = <&clk26m>, <&clk26m>;
> + clocks = <&clk26m>, <&infracfg CLK_INFRA_UART0>;

Please update the clocks for all nodes to use the clock driver, not just uart or
uart0.

Thanks,
Matthias

> clock-names = "baud", "bus";
> status = "disabled";
> };
>