Q6 based WiFi fw loading is supported across
different targets, ex: IPQ8074/QCS404. In order to
support different fw name for IPQ6018, populate
hardcoded param using compatible and driver data.
This series depends on
[PATCH v8] remoteproc: qcom: q6v5-wcss: Add support for secure pil
Gokul Sriram Palanisamy (3):
dt-bindings: remoteproc: qcom: Add Q6V5 Modem PIL binding for IPQ6018
remoteproc: qcom: wcss: populate driver data for IPQ6018
arm64: dts: ipq6018: Update WCSS PIL driver compatible
.../devicetree/bindings/remoteproc/qcom,q6v5.txt | 4 ++++
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +-
drivers/remoteproc/qcom_q6v5_wcss.c | 19 +++++++++++++++++--
3 files changed, 22 insertions(+), 3 deletions(-)
--
2.7.4
Add a new modem compatible string for IPQ6018 SoCs
Signed-off-by: Gokul Sriram Palanisamy <[email protected]>
---
Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 69c49c7..7f1d5783 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -9,6 +9,7 @@ on the Qualcomm Hexagon core.
Definition: must be one of:
"qcom,q6v5-pil",
"qcom,ipq8074-wcss-pil"
+ "qcom,ipq6018-wcss-pil"
"qcom,qcs404-wcss-pil"
"qcom,msm8916-mss-pil",
"qcom,msm8974-mss-pil"
@@ -40,6 +41,7 @@ on the Qualcomm Hexagon core.
string:
qcom,q6v5-pil:
qcom,ipq8074-wcss-pil:
+ qcom,ipq6018-wcss-pil:
qcom,qcs404-wcss-pil:
qcom,msm8916-mss-pil:
qcom,msm8974-mss-pil:
@@ -68,6 +70,7 @@ on the Qualcomm Hexagon core.
Value type: <stringlist>
Definition: The clocks needed depend on the compatible string:
qcom,ipq8074-wcss-pil:
+ qcom,ipq6018-wcss-pil:
no clock names required
qcom,qcs404-wcss-pil:
must be "xo", "gcc_abhs_cbcr", "gcc_abhs_cbcr",
@@ -165,6 +168,7 @@ For the compatible string below the following supplies are required:
Value type: <stringlist>
Definition: The power-domains needed depend on the compatible string:
qcom,ipq8074-wcss-pil:
+ qcom,ipq6018-wcss-pil:
no power-domain names required
qcom,q6v5-pil:
qcom,msm8916-mss-pil:
--
2.7.4
Populate hardcoded param using driver data for IPQ6018 SoCs.
Signed-off-by: Gokul Sriram Palanisamy <[email protected]>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c
index 7c64bfc..bc9531c 100644
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -965,7 +965,7 @@ static int q6v5_alloc_memory_region(struct q6v5_wcss *wcss)
return 0;
}
-static int ipq8074_init_clock(struct q6v5_wcss *wcss)
+static int ipq_init_clock(struct q6v5_wcss *wcss)
{
int ret;
@@ -1172,7 +1172,7 @@ static int q6v5_wcss_remove(struct platform_device *pdev)
}
static const struct wcss_data wcss_ipq8074_res_init = {
- .init_clock = ipq8074_init_clock,
+ .init_clock = ipq_init_clock,
.q6_firmware_name = "IPQ8074/q6_fw.mdt",
.m3_firmware_name = "IPQ8074/m3_fw.mdt",
.crash_reason_smem = WCSS_CRASH_REASON,
@@ -1185,6 +1185,20 @@ static const struct wcss_data wcss_ipq8074_res_init = {
.need_mem_protection = true,
};
+static const struct wcss_data wcss_ipq6018_res_init = {
+ .init_clock = ipq_init_clock,
+ .q6_firmware_name = "IPQ6018/q6_fw.mdt",
+ .m3_firmware_name = "IPQ6018/m3_fw.mdt",
+ .crash_reason_smem = WCSS_CRASH_REASON,
+ .aon_reset_required = true,
+ .wcss_q6_reset_required = true,
+ .bcr_reset_required = false,
+ .ssr_name = "q6wcss",
+ .ops = &q6v5_wcss_ipq8074_ops,
+ .requires_force_stop = true,
+ .need_mem_protection = true,
+};
+
static const struct wcss_data wcss_qcs404_res_init = {
.init_clock = qcs404_init_clock,
.init_regulator = qcs404_init_regulator,
@@ -1203,6 +1217,7 @@ static const struct wcss_data wcss_qcs404_res_init = {
static const struct of_device_id q6v5_wcss_of_match[] = {
{ .compatible = "qcom,ipq8074-wcss-pil", .data = &wcss_ipq8074_res_init },
+ { .compatible = "qcom,ipq6018-wcss-pil", .data = &wcss_ipq6018_res_init },
{ .compatible = "qcom,qcs404-wcss-pil", .data = &wcss_qcs404_res_init },
{ },
};
--
2.7.4
Updated WCSS PIL driver node with IPQ6018 specific
compatible to enable SoC specific driver data.
Signed-off-by: Gokul Sriram Palanisamy <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 9fa5b02..2e6b23b 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -477,7 +477,7 @@
};
q6v5_wcss: remoteproc@cd00000 {
- compatible = "qcom,ipq8074-wcss-pil";
+ compatible = "qcom,ipq6018-wcss-pil";
reg = <0x0 0x0cd00000 0x0 0x4040>,
<0x0 0x004ab000 0x0 0x20>;
reg-names = "qdsp6",
--
2.7.4
On Fri, 29 Jan 2021 22:41:58 +0530, Gokul Sriram Palanisamy wrote:
> Add a new modem compatible string for IPQ6018 SoCs
>
> Signed-off-by: Gokul Sriram Palanisamy <[email protected]>
> ---
> Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
Acked-by: Rob Herring <[email protected]>
On Fri 29 Jan 11:11 CST 2021, Gokul Sriram Palanisamy wrote:
> Populate hardcoded param using driver data for IPQ6018 SoCs.
>
> Signed-off-by: Gokul Sriram Palanisamy <[email protected]>
> ---
> drivers/remoteproc/qcom_q6v5_wcss.c | 19 +++++++++++++++++--
> 1 file changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c
> index 7c64bfc..bc9531c 100644
> --- a/drivers/remoteproc/qcom_q6v5_wcss.c
> +++ b/drivers/remoteproc/qcom_q6v5_wcss.c
> @@ -965,7 +965,7 @@ static int q6v5_alloc_memory_region(struct q6v5_wcss *wcss)
> return 0;
> }
>
> -static int ipq8074_init_clock(struct q6v5_wcss *wcss)
> +static int ipq_init_clock(struct q6v5_wcss *wcss)
> {
> int ret;
>
> @@ -1172,7 +1172,7 @@ static int q6v5_wcss_remove(struct platform_device *pdev)
> }
>
> static const struct wcss_data wcss_ipq8074_res_init = {
> - .init_clock = ipq8074_init_clock,
> + .init_clock = ipq_init_clock,
> .q6_firmware_name = "IPQ8074/q6_fw.mdt",
> .m3_firmware_name = "IPQ8074/m3_fw.mdt",
> .crash_reason_smem = WCSS_CRASH_REASON,
> @@ -1185,6 +1185,20 @@ static const struct wcss_data wcss_ipq8074_res_init = {
> .need_mem_protection = true,
> };
>
> +static const struct wcss_data wcss_ipq6018_res_init = {
> + .init_clock = ipq_init_clock,
> + .q6_firmware_name = "IPQ6018/q6_fw.mdt",
> + .m3_firmware_name = "IPQ6018/m3_fw.mdt",
> + .crash_reason_smem = WCSS_CRASH_REASON,
> + .aon_reset_required = true,
> + .wcss_q6_reset_required = true,
> + .bcr_reset_required = false,
> + .ssr_name = "q6wcss",
> + .ops = &q6v5_wcss_ipq8074_ops,
> + .requires_force_stop = true,
> + .need_mem_protection = true,
> +};
> +
> static const struct wcss_data wcss_qcs404_res_init = {
> .init_clock = qcs404_init_clock,
> .init_regulator = qcs404_init_regulator,
> @@ -1203,6 +1217,7 @@ static const struct wcss_data wcss_qcs404_res_init = {
>
> static const struct of_device_id q6v5_wcss_of_match[] = {
> { .compatible = "qcom,ipq8074-wcss-pil", .data = &wcss_ipq8074_res_init },
> + { .compatible = "qcom,ipq6018-wcss-pil", .data = &wcss_ipq6018_res_init },
As you rebase on the reworked dependency, please sorted alphabetically
(i.e 6 < 8)
Regards,
Bjorn
> { .compatible = "qcom,qcs404-wcss-pil", .data = &wcss_qcs404_res_init },
> { },
> };
> --
> 2.7.4
>