2021-02-24 12:51:45

by Can Guo

Subject: [PATCH v2 2/3] scsi: ufs-qcom: Disable interrupt in reset path

From: Nitin Rawat <[email protected]>

Disable interrupt in reset path to flush pending IRQ handler in order to
avoid possible NoC issues.

Signed-off-by: Nitin Rawat <[email protected]>
Signed-off-by: Can Guo <[email protected]>
---
drivers/scsi/ufs/ufs-qcom.c | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
index f97d7b0..a9dc8d7 100644
--- a/drivers/scsi/ufs/ufs-qcom.c
+++ b/drivers/scsi/ufs/ufs-qcom.c
@@ -253,12 +253,17 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba)
{
int ret = 0;
struct ufs_qcom_host *host = ufshcd_get_variant(hba);
+ bool reenable_intr = false;

if (!host->core_reset) {
dev_warn(hba->dev, "%s: reset control not set\n", __func__);
goto out;
}

+ reenable_intr = hba->is_irq_enabled;
+ disable_irq(hba->irq);
+ hba->is_irq_enabled = false;
+
ret = reset_control_assert(host->core_reset);
if (ret) {
dev_err(hba->dev, "%s: core_reset assert failed, err = %d\n",
@@ -280,6 +285,11 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba)

usleep_range(1000, 1100);

+ if (reenable_intr) {
+ enable_irq(hba->irq);
+ hba->is_irq_enabled = true;
+ }
+
out:
return ret;
}
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.

2021-02-28 14:37:58

by Avri Altman

Subject: RE: [PATCH v2 2/3] scsi: ufs-qcom: Disable interrupt in reset path

>
> From: Nitin Rawat <[email protected]>
>
> Disable interrupt in reset path to flush pending IRQ handler in order to
> avoid possible NoC issues.
>
> Signed-off-by: Nitin Rawat <[email protected]>
> Signed-off-by: Can Guo <[email protected]>
> ---
> drivers/scsi/ufs/ufs-qcom.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
> index f97d7b0..a9dc8d7 100644
> --- a/drivers/scsi/ufs/ufs-qcom.c
> +++ b/drivers/scsi/ufs/ufs-qcom.c
> @@ -253,12 +253,17 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba)
> {
> int ret = 0;
> struct ufs_qcom_host *host = ufshcd_get_variant(hba);
> + bool reenable_intr = false;
>
> if (!host->core_reset) {
> dev_warn(hba->dev, "%s: reset control not set\n", __func__);
> goto out;
> }
>
> + reenable_intr = hba->is_irq_enabled;
> + disable_irq(hba->irq);
> + hba->is_irq_enabled = false;
> +
> ret = reset_control_assert(host->core_reset);
> if (ret) {
> dev_err(hba->dev, "%s: core_reset assert failed, err = %d\n",
> @@ -280,6 +285,11 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba)
>
> usleep_range(1000, 1100);
>
> + if (reenable_intr) {
> + enable_irq(hba->irq);
> + hba->is_irq_enabled = true;
> + }
> +
If in the future, you will enable UFSHCI_QUIRK_BROKEN_HCE on your platform (currently only for Exynos),
Will this code still work?

2021-03-04 08:20:15

by Can Guo

Subject: Re: [PATCH v2 2/3] scsi: ufs-qcom: Disable interrupt in reset path

On 2021-02-28 22:23, Avri Altman wrote:
>>
>> From: Nitin Rawat <[email protected]>
>>
>> Disable interrupt in reset path to flush pending IRQ handler in order
>> to
>> avoid possible NoC issues.
>>
>> Signed-off-by: Nitin Rawat <[email protected]>
>> Signed-off-by: Can Guo <[email protected]>
>> ---
>> drivers/scsi/ufs/ufs-qcom.c | 10 ++++++++++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
>> index f97d7b0..a9dc8d7 100644
>> --- a/drivers/scsi/ufs/ufs-qcom.c
>> +++ b/drivers/scsi/ufs/ufs-qcom.c
>> @@ -253,12 +253,17 @@ static int ufs_qcom_host_reset(struct ufs_hba
>> *hba)
>> {
>> int ret = 0;
>> struct ufs_qcom_host *host = ufshcd_get_variant(hba);
>> + bool reenable_intr = false;
>>
>> if (!host->core_reset) {
>> dev_warn(hba->dev, "%s: reset control not set\n",
>> __func__);
>> goto out;
>> }
>>
>> + reenable_intr = hba->is_irq_enabled;
>> + disable_irq(hba->irq);
>> + hba->is_irq_enabled = false;
>> +
>> ret = reset_control_assert(host->core_reset);
>> if (ret) {
>> dev_err(hba->dev, "%s: core_reset assert failed, err =
>> %d\n",
>> @@ -280,6 +285,11 @@ static int ufs_qcom_host_reset(struct ufs_hba
>> *hba)
>>
>> usleep_range(1000, 1100);
>>
>> + if (reenable_intr) {
>> + enable_irq(hba->irq);
>> + hba->is_irq_enabled = true;
>> + }
>> +
> If in the future, you will enable UFSHCI_QUIRK_BROKEN_HCE on your
> platform (currently only for Exynos),
> Will this code still work?

Yes, it still works.

Thanks,
Can Guo.

2021-03-04 08:49:39

by Avri Altman

Subject: RE: [PATCH v2 2/3] scsi: ufs-qcom: Disable interrupt in reset path

>
> On 2021-02-28 22:23, Avri Altman wrote:
> >>
> >> From: Nitin Rawat <[email protected]>
> >>
> >> Disable interrupt in reset path to flush pending IRQ handler in order
> >> to
> >> avoid possible NoC issues.
> >>
> >> Signed-off-by: Nitin Rawat <[email protected]>
> >> Signed-off-by: Can Guo <[email protected]>
Reviewed-by: Avri Altman <[email protected]>


> >> ---
> >> drivers/scsi/ufs/ufs-qcom.c | 10 ++++++++++
> >> 1 file changed, 10 insertions(+)
> >>
> >> diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
> >> index f97d7b0..a9dc8d7 100644
> >> --- a/drivers/scsi/ufs/ufs-qcom.c
> >> +++ b/drivers/scsi/ufs/ufs-qcom.c
> >> @@ -253,12 +253,17 @@ static int ufs_qcom_host_reset(struct ufs_hba
> >> *hba)
> >> {
> >> int ret = 0;
> >> struct ufs_qcom_host *host = ufshcd_get_variant(hba);
> >> + bool reenable_intr = false;
> >>
> >> if (!host->core_reset) {
> >> dev_warn(hba->dev, "%s: reset control not set\n",
> >> __func__);
> >> goto out;
> >> }
> >>
> >> + reenable_intr = hba->is_irq_enabled;
> >> + disable_irq(hba->irq);
> >> + hba->is_irq_enabled = false;
> >> +
> >> ret = reset_control_assert(host->core_reset);
> >> if (ret) {
> >> dev_err(hba->dev, "%s: core_reset assert failed, err =
> >> %d\n",
> >> @@ -280,6 +285,11 @@ static int ufs_qcom_host_reset(struct ufs_hba
> >> *hba)
> >>
> >> usleep_range(1000, 1100);
> >>
> >> + if (reenable_intr) {
> >> + enable_irq(hba->irq);
> >> + hba->is_irq_enabled = true;
> >> + }
> >> +
> > If in the future, you will enable UFSHCI_QUIRK_BROKEN_HCE on your
> > platform (currently only for Exynos),
> > Will this code still work?
>
> Yes, it still works.
>
> Thanks,
> Can Guo.