2021-07-11 07:05:41

by Yongqiang Niu

Subject: [PATCH v3] drm/mediatek: adjust rdma fifo threshold calculate formula

the orginal formula will caused rdma fifo threshold config overflow
and no one could come out a solution for all SoC,
set threshold to 70% of max fifo size to make sure it will
not overflow, and 70% is a empirical vlaue

Signed-off-by: Yongqiang Niu <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
index f123fc0..f1f6a2e 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
@@ -164,10 +164,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
/*
* Enable FIFO underflow since DSI and DPI can't be blocked.
* Keep the FIFO pseudo size reset default of 8 KiB. Set the
- * output threshold to 6 microseconds with 7/6 overhead to
- * account for blanking, and with a pixel depth of 4 bytes:
+ * output threshold to 70% of max fifo size to make sure the
+ * threhold will not overflow
*/
- threshold = width * height * vrefresh * 4 * 7 / 1000000;
+ threshold = rdma_fifo_size * 7 / 10;
reg = RDMA_FIFO_UNDERFLOW_EN |
RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
--
1.8.1.1.dirty

2021-07-12 14:50:30

by Chun-Kuang Hu

Subject: Re: [PATCH v3] drm/mediatek: adjust rdma fifo threshold calculate formula

Hi, Yongqiang:

Yongqiang Niu <[email protected]> 於 2021年7月11日 週日 下午2:54寫道：
>
> the orginal formula will caused rdma fifo threshold config overflow
> and no one could come out a solution for all SoC,
> set threshold to 70% of max fifo size to make sure it will
> not overflow, and 70% is a empirical value

Applied to mediatek-drm-next [1], thanks.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next

Regards,
Chun-Kuang.

>
> Signed-off-by: Yongqiang Niu <[email protected]>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index f123fc0..f1f6a2e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -164,10 +164,10 @@ void mtk_rdma_config(struct device *dev, unsigned int width,
> /*
> * Enable FIFO underflow since DSI and DPI can't be blocked.
> * Keep the FIFO pseudo size reset default of 8 KiB. Set the
> - * output threshold to 6 microseconds with 7/6 overhead to
> - * account for blanking, and with a pixel depth of 4 bytes:
> + * output threshold to 70% of max fifo size to make sure the
> + * threhold will not overflow
> */
> - threshold = width * height * vrefresh * 4 * 7 / 1000000;
> + threshold = rdma_fifo_size * 7 / 10;
> reg = RDMA_FIFO_UNDERFLOW_EN |
> RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
> RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
> --
> 1.8.1.1.dirty
>