v3:
* Dropped the description in bindings patch
* Added a patch to fix ordering in qfprom_disable_fuse_blowing()
* Fixed devm_add_action_or_reset() order
v2:
* pm_runtime calls made unconditionally, should work even without the power-domains property in DT
* Added the missing pm_runtime_disable() handling
* DT patch rebased on msm/for-next
--
qfprom devices on sc7280 have an additional requirement to vote on a power-domain
performance state to reliably blow fuses. Add the binding updates and handle this in
the driver, also add the DT node for sc7280 platform.
Rajendra Nayak (4):
dt-bindings: nvmem: qfprom: Add optional power-domains property
nvmem: qfprom: Fix up qfprom_disable_fuse_blowing() ordering
nvmem: qfprom: sc7280: Handle the additional power-domains vote
arm64: dts: qcom: sc7280: Add qfprom node
.../devicetree/bindings/nvmem/qcom,qfprom.yaml | 3 +++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 13 +++++++++
drivers/nvmem/qfprom.c | 31 +++++++++++++++++++---
3 files changed, 44 insertions(+), 3 deletions(-)
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
qfprom devices on some SoCs need to vote on the performance state
of a power-domain, so add the power-domains optional property to the
bindings
Signed-off-by: Rajendra Nayak <[email protected]>
Reviewed-by: Douglas Anderson <[email protected]>
---
Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
index 861b205..dede8892 100644
--- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
+++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
@@ -51,6 +51,9 @@ properties:
vcc-supply:
description: Our power supply.
+ power-domains:
+ maxItems: 1
+
# Needed if any child nodes are present.
"#address-cells":
const: 1
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
Add the qfprom node and its properties for the sc7280 SoC.
Signed-off-by: Rajendra Nayak <[email protected]>
Reviewed-by: Douglas Anderson <[email protected]>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 029723a..e87b210 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -442,6 +442,19 @@
#mbox-cells = <2>;
};
+ qfprom: efuse@784000 {
+ compatible = "qcom,sc7280-qfprom", "qcom,qfprom";
+ reg = <0 0x00784000 0 0xa20>,
+ <0 0x00780000 0 0xa20>,
+ <0 0x00782000 0 0x120>,
+ <0 0x00786000 0 0x1fff>;
+ clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
+ clock-names = "core";
+ power-domains = <&rpmhpd SC7280_MX>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+
sdhc_1: sdhci@7c4000 {
compatible = "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";
status = "disabled";
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
On sc7280, to reliably blow fuses, we need an additional vote
on max performance state of 'MX' power-domain.
Add support for power-domain performance state voting in the
driver.
Signed-off-by: Rajendra Nayak <[email protected]>
Reviewed-by: Douglas Anderson <[email protected]>
---
drivers/nvmem/qfprom.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c
index b0ca4c6..c500d62 100644
--- a/drivers/nvmem/qfprom.c
+++ b/drivers/nvmem/qfprom.c
@@ -12,6 +12,8 @@
#include <linux/mod_devicetable.h>
#include <linux/nvmem-provider.h>
#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/regulator/consumer.h>
@@ -142,6 +144,9 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
+ dev_pm_genpd_set_performance_state(priv->dev, 0);
+ pm_runtime_put(priv->dev);
+
/*
* This may be a shared rail and may be able to run at a lower rate
* when we're not blowing fuses. At the moment, the regulator framework
@@ -212,6 +217,14 @@ static int qfprom_enable_fuse_blowing(const struct qfprom_priv *priv,
goto err_clk_rate_set;
}
+ ret = pm_runtime_get_sync(priv->dev);
+ if (ret < 0) {
+ pm_runtime_put_noidle(priv->dev);
+ dev_err(priv->dev, "Failed to enable power-domain\n");
+ goto err_reg_enable;
+ }
+ dev_pm_genpd_set_performance_state(priv->dev, INT_MAX);
+
old->timer_val = readl(priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
old->accel_val = readl(priv->qfpconf + QFPROM_ACCEL_OFFSET);
writel(priv->soc_data->qfprom_blow_timer_value,
@@ -221,6 +234,8 @@ static int qfprom_enable_fuse_blowing(const struct qfprom_priv *priv,
return 0;
+err_reg_enable:
+ regulator_disable(priv->vcc);
err_clk_rate_set:
clk_set_rate(priv->secclk, old->clk_rate);
err_clk_prepared:
@@ -320,6 +335,11 @@ static int qfprom_reg_read(void *context,
return 0;
}
+static void qfprom_runtime_disable(void *data)
+{
+ pm_runtime_disable(data);
+}
+
static const struct qfprom_soc_data qfprom_7_8_data = {
.accel_value = 0xD10,
.qfprom_blow_timer_value = 25,
@@ -420,6 +440,11 @@ static int qfprom_probe(struct platform_device *pdev)
econfig.reg_write = qfprom_reg_write;
}
+ pm_runtime_enable(dev);
+ ret = devm_add_action_or_reset(dev, qfprom_runtime_disable, dev);
+ if (ret)
+ return ret;
+
nvmem = devm_nvmem_register(dev, &econfig);
return PTR_ERR_OR_ZERO(nvmem);
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
qfprom_disable_fuse_blowing() disables a bunch of resources,
and then does a few register writes in the 'conf' address
space.
It works perhaps because the resources are needed only for the
'raw' register space writes, and that the 'conf' space allows
read/writes regardless.
However that makes the code look confusing, so just move the
register writes before turning off the resources in the
function.
Signed-off-by: Rajendra Nayak <[email protected]>
---
drivers/nvmem/qfprom.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c
index 81fbad5..b0ca4c6 100644
--- a/drivers/nvmem/qfprom.c
+++ b/drivers/nvmem/qfprom.c
@@ -139,6 +139,9 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
{
int ret;
+ writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
+ writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
+
/*
* This may be a shared rail and may be able to run at a lower rate
* when we're not blowing fuses. At the moment, the regulator framework
@@ -159,9 +162,6 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
"Failed to set clock rate for disable (ignoring)\n");
clk_disable_unprepare(priv->secclk);
-
- writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
- writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
}
/**
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
Hi,
On Thu, Jul 29, 2021 at 11:46 PM Rajendra Nayak <[email protected]> wrote:
>
> qfprom_disable_fuse_blowing() disables a bunch of resources,
> and then does a few register writes in the 'conf' address
> space.
> It works perhaps because the resources are needed only for the
> 'raw' register space writes, and that the 'conf' space allows
> read/writes regardless.
> However that makes the code look confusing, so just move the
> register writes before turning off the resources in the
> function.
>
> Signed-off-by: Rajendra Nayak <[email protected]>
> ---
> drivers/nvmem/qfprom.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c
> index 81fbad5..b0ca4c6 100644
> --- a/drivers/nvmem/qfprom.c
> +++ b/drivers/nvmem/qfprom.c
> @@ -139,6 +139,9 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
> {
> int ret;
>
> + writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
> + writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
> +
> /*
> * This may be a shared rail and may be able to run at a lower rate
> * when we're not blowing fuses. At the moment, the regulator framework
> @@ -159,9 +162,6 @@ static void qfprom_disable_fuse_blowing(const struct qfprom_priv *priv,
> "Failed to set clock rate for disable (ignoring)\n");
>
> clk_disable_unprepare(priv->secclk);
> -
> - writel(old->timer_val, priv->qfpconf + QFPROM_BLOW_TIMER_OFFSET);
> - writel(old->accel_val, priv->qfpconf + QFPROM_ACCEL_OFFSET);
> }
I think it doesn't matter since all of these resources are just needed
for burning fuses, but I agree that what you have here makes more
logical sense and makes the function less confusing.
Reviewed-by: Douglas Anderson <[email protected]>
On Fri, 30 Jul 2021 12:16:10 +0530, Rajendra Nayak wrote:
> qfprom devices on some SoCs need to vote on the performance state
> of a power-domain, so add the power-domains optional property to the
> bindings
>
> Signed-off-by: Rajendra Nayak <[email protected]>
> Reviewed-by: Douglas Anderson <[email protected]>
> ---
> Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring <[email protected]>
On 30/07/2021 07:46, Rajendra Nayak wrote:
> v3:
> * Dropped the description in bindings patch
> * Added a patch to fix ordering in qfprom_disable_fuse_blowing()
> * Fixed devm_add_action_or_reset() order
>
> v2:
> * pm_runtime calls made unconditionally, should work even without the power-domains property in DT
> * Added the missing pm_runtime_disable() handling
> * DT patch rebased on msm/for-next
>
> --
> qfprom devices on sc7280 have an additional requirement to vote on a power-domain
> performance state to reliably blow fuses. Add the binding updates and handle this in
> the driver, also add the DT node for sc7280 platform.
>
> Rajendra Nayak (4):
> dt-bindings: nvmem: qfprom: Add optional power-domains property
> nvmem: qfprom: Fix up qfprom_disable_fuse_blowing() ordering
> nvmem: qfprom: sc7280: Handle the additional power-domains vote
Applied 1-3 patches.
dts patch can go via Bjorn's tree.
--srini
> arm64: dts: qcom: sc7280: Add qfprom node
>
> .../devicetree/bindings/nvmem/qcom,qfprom.yaml | 3 +++
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 13 +++++++++
> drivers/nvmem/qfprom.c | 31 +++++++++++++++++++---
> 3 files changed, 44 insertions(+), 3 deletions(-)
>