2021-10-26 16:13:17

by Srinivasa Rao Mandadapu

Subject: [PATCH v4 2/3] dt-bindings: soundwire: qcom: Add bindings for RX and TX cgcr register control

Update description for RX and TX cgcr register control property required for
soundwire version 1.6.0 and above.

Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
---
Documentation/devicetree/bindings/soundwire/qcom,sdw.txt | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt
index b93a2b3..91b9086 100644
--- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt
+++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt
@@ -150,6 +150,15 @@ board specific bus parameters.
or applicable for the respective data port.
More info in MIPI Alliance SoundWire 1.0 Specifications.

+- qcom,swrm-hctl-reg:
+ Usage: optional
+ Value type: <prop-encoded-array>
+ Definition: The base address of SoundWire RX and TX cgcr register
+ address space.
+ This is to update soundwire master rxtx cgcr register field to
+ make clock gating control as software controllable for RX path and
+ TX path which is required for SoundWire version 1.6.0 and above.
+
Note:
More Information on detail of encoding of these fields can be
found in MIPI Alliance SoundWire 1.0 Specifications.
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.

2021-10-27 21:35:42

by Stephen Boyd

Subject: Re: [PATCH v4 2/3] dt-bindings: soundwire: qcom: Add bindings for RX and TX cgcr register control

Quoting Srinivasa Rao Mandadapu (2021-10-26 05:19:23)
> Update description for RX and TX cgcr register control property required for
> soundwire version 1.6.0 and above.
>
> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
> Co-developed-by: Venkata Prasad Potturu <[email protected]>
> Signed-off-by: Venkata Prasad Potturu <[email protected]>
> ---
> Documentation/devicetree/bindings/soundwire/qcom,sdw.txt | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt
> index b93a2b3..91b9086 100644
> --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt
> +++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt
> @@ -150,6 +150,15 @@ board specific bus parameters.
> or applicable for the respective data port.
> More info in MIPI Alliance SoundWire 1.0 Specifications.
>
> +- qcom,swrm-hctl-reg:
> + Usage: optional
> + Value type: <prop-encoded-array>
> + Definition: The base address of SoundWire RX and TX cgcr register
> + address space.

cgcr is "clock gate control register"?

> + This is to update soundwire master rxtx cgcr register field to
> + make clock gating control as software controllable for RX path and
> + TX path which is required for SoundWire version 1.6.0 and above.

Nak. Use clk APIs to control clks, not direct MMIO writes into a
different device.

2021-10-27 21:35:49

by Rob Herring

Subject: Re: [PATCH v4 2/3] dt-bindings: soundwire: qcom: Add bindings for RX and TX cgcr register control

On Tue, 26 Oct 2021 17:49:23 +0530, Srinivasa Rao Mandadapu wrote:
> Update description for RX and TX cgcr register control property required for
> soundwire version 1.6.0 and above.
>
> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
> Co-developed-by: Venkata Prasad Potturu <[email protected]>
> Signed-off-by: Venkata Prasad Potturu <[email protected]>
> ---
> Documentation/devicetree/bindings/soundwire/qcom,sdw.txt | 9 +++++++++
> 1 file changed, 9 insertions(+)
>

Acked-by: Rob Herring <[email protected]>