Instead of writing to WC cmdstream buffers that go all the way to the main
memory, let's use the system cache to improve the performance.
Signed-off-by: Georgi Djakov <[email protected]>
---
drivers/gpu/drm/msm/msm_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 104fdfc14027..921a1c24721e 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -214,7 +214,7 @@ void msm_gem_put_pages(struct drm_gem_object *obj)
static pgprot_t msm_gem_pgprot(struct msm_gem_object *msm_obj, pgprot_t prot)
{
if (msm_obj->flags & (MSM_BO_WC|MSM_BO_UNCACHED))
- return pgprot_writecombine(prot);
+ return pgprot_syscached(prot);
return prot;
}
On Wed, Nov 17, 2021 at 12:16 AM Georgi Djakov
<[email protected]> wrote:
>
> Instead of writing to WC cmdstream buffers that go all the way to the main
> memory, let's use the system cache to improve the performance.
>
> Signed-off-by: Georgi Djakov <[email protected]>
> ---
> drivers/gpu/drm/msm/msm_gem.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
> index 104fdfc14027..921a1c24721e 100644
> --- a/drivers/gpu/drm/msm/msm_gem.c
> +++ b/drivers/gpu/drm/msm/msm_gem.c
> @@ -214,7 +214,7 @@ void msm_gem_put_pages(struct drm_gem_object *obj)
> static pgprot_t msm_gem_pgprot(struct msm_gem_object *msm_obj, pgprot_t prot)
> {
> if (msm_obj->flags & (MSM_BO_WC|MSM_BO_UNCACHED))
> - return pgprot_writecombine(prot);
> + return pgprot_syscached(prot);
> return prot;
> }
Based on the definition in patch 1, doesn't this mean that 32-bit
kernels degrade
from writecombined to uncached, making them a lot slower?
My feeling about this series is that there should be a clearer
definition of what
exactly happens on systems with and without system cache.
Arnd