2022-02-22 05:41:03

by Srinivasa Rao Mandadapu

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Subject: [PATCH v8 0/7] Add pin control support for lpass sc7280

This patch series is to split lpass variant common pin control
functions and SoC specific functions and to add lpass sc7280 pincontrol support.
It also Adds dt-bindings for lpass sc7280 lpass lpi pincontrol.

Changes Since V7:
-- Update optional clock voting with conditional check.
-- Add const to lpi_pinctrl_variant_data structure.
-- Update required headers and remove redundant.
-- Change EXPORT_SYMBOL to EXPORT_SYMBOL_GPL
-- Fix typo errors.
Changes Since V6:
-- Update conditional clock voting to optional clock voting.
-- Update Kconfig depends on field with select.
-- Fix typo errors.
Changes Since V5:
-- Create new patch by updating macro name to lpi specific.
-- Create new patch by updating lpi pin group structure with core group_desc structure.
-- Fix typo errors.
-- Sort macros in the make file and configuration file.
Changes Since V4:
-- Update commit message and description of the chip specific extraction patch.
-- Sort macros in kconfig and makefile.
-- Update optional clock voting to conditional clock voting.
-- Fix typo errors.
-- Move to quicinc domain email id's.
Changes Since V3:
-- Update separate Kconfig fields for sm8250 and sc7280.
-- Update module license and description.
-- Move static variables to corresponding .c files from header file.

Changes Since V2:
-- Add new dt-bindings for sc7280 lpi driver.
-- Make clock voting change as separate patch.
-- Split existing pincontrol driver and make common functions
as part of separate file.
-- Rename lpass pincontrol lpi dt-bindings to sm8250 specific dt-bindings

Changes Since V1:
-- Make lpi pinctrl variant data structure as constant
-- Add appropriate commit message
-- Change signedoff by sequence.

Srinivasa Rao Mandadapu (7):
dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific
dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings
pinctrl: qcom: Update macro name to LPI specific
pinctrl: qcom: Update lpi pin group structure
pinctrl: qcom: Extract chip specific LPASS LPI code
pinctrl: qcom: Add SC7280 lpass pin configuration
pinctrl: qcom: Update clock voting as optional

Tested this on SM8250 MTP with WSA and WCD codecs.
Tested-by: Srinivas Kandagatla <[email protected]>

.../bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml | 133 -----------
.../pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 115 ++++++++++
.../pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml | 133 +++++++++++
drivers/pinctrl/qcom/Kconfig | 16 ++
drivers/pinctrl/qcom/Makefile | 2 +
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 255 ++-------------------
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 86 +++++++
drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 169 ++++++++++++++
drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c | 166 ++++++++++++++
9 files changed, 705 insertions(+), 370 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml
create mode 100644 drivers/pinctrl/qcom/pinctrl-lpass-lpi.h
create mode 100644 drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
create mode 100644 drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c

--
2.7.4


2022-02-22 05:48:07

by Srinivasa Rao Mandadapu

[permalink] [raw]
Subject: [PATCH v8 4/7] pinctrl: qcom: Update lpi pin group structure

Update lpi group structure with core group_desc structure
to avoid redundant struct params.

Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
---
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 44 +++++++++++++++-----------------
1 file changed, 21 insertions(+), 23 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
index 3c15f80..54750ba 100644
--- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
+++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
@@ -51,11 +51,11 @@

#define LPI_PINGROUP(id, soff, f1, f2, f3, f4) \
{ \
- .name = "gpio" #id, \
- .pins = gpio##id##_pins, \
+ .group.name = "gpio" #id, \
+ .group.pins = gpio##id##_pins, \
.pin = id, \
.slew_offset = soff, \
- .npins = ARRAY_SIZE(gpio##id##_pins), \
+ .group.num_pins = ARRAY_SIZE(gpio##id##_pins), \
.funcs = (int[]){ \
LPI_MUX_gpio, \
LPI_MUX_##f1, \
@@ -67,9 +67,7 @@
}

struct lpi_pingroup {
- const char *name;
- const unsigned int *pins;
- unsigned int npins;
+ struct group_desc group;
unsigned int pin;
/* Bit offset in slew register for SoundWire pins only */
int slew_offset;
@@ -150,20 +148,20 @@ enum sm8250_lpi_functions {
LPI_MUX__,
};

-static const unsigned int gpio0_pins[] = { 0 };
-static const unsigned int gpio1_pins[] = { 1 };
-static const unsigned int gpio2_pins[] = { 2 };
-static const unsigned int gpio3_pins[] = { 3 };
-static const unsigned int gpio4_pins[] = { 4 };
-static const unsigned int gpio5_pins[] = { 5 };
-static const unsigned int gpio6_pins[] = { 6 };
-static const unsigned int gpio7_pins[] = { 7 };
-static const unsigned int gpio8_pins[] = { 8 };
-static const unsigned int gpio9_pins[] = { 9 };
-static const unsigned int gpio10_pins[] = { 10 };
-static const unsigned int gpio11_pins[] = { 11 };
-static const unsigned int gpio12_pins[] = { 12 };
-static const unsigned int gpio13_pins[] = { 13 };
+static int gpio0_pins[] = { 0 };
+static int gpio1_pins[] = { 1 };
+static int gpio2_pins[] = { 2 };
+static int gpio3_pins[] = { 3 };
+static int gpio4_pins[] = { 4 };
+static int gpio5_pins[] = { 5 };
+static int gpio6_pins[] = { 6 };
+static int gpio7_pins[] = { 7 };
+static int gpio8_pins[] = { 8 };
+static int gpio9_pins[] = { 9 };
+static int gpio10_pins[] = { 10 };
+static int gpio11_pins[] = { 11 };
+static int gpio12_pins[] = { 12 };
+static int gpio13_pins[] = { 13 };
static const char * const swr_tx_clk_groups[] = { "gpio0" };
static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio5" };
static const char * const swr_rx_clk_groups[] = { "gpio3" };
@@ -262,7 +260,7 @@ static const char *lpi_gpio_get_group_name(struct pinctrl_dev *pctldev,
{
struct lpi_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);

- return pctrl->data->groups[group].name;
+ return pctrl->data->groups[group].group.name;
}

static int lpi_gpio_get_group_pins(struct pinctrl_dev *pctldev,
@@ -272,8 +270,8 @@ static int lpi_gpio_get_group_pins(struct pinctrl_dev *pctldev,
{
struct lpi_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);

- *pins = pctrl->data->groups[group].pins;
- *num_pins = pctrl->data->groups[group].npins;
+ *pins = pctrl->data->groups[group].group.pins;
+ *num_pins = pctrl->data->groups[group].group.num_pins;

return 0;
}
--
2.7.4