This patch set is to add support for Audio over wcd codec,
digital mics, through digital codecs and without ADSP.
Changes Since V15:
-- Bisect patches to avoid build failure in other architectures.
-- Remove redundant variables lpass variant structure.
Changes Since V14:
-- Split common wrapper function to separate wrapper for each handle in platform driver.
-- Update cdc dma buffer handling with memremap with ioremap.
-- Remove redundant error prints.
-- Update irq flag.
Changes Since V13:
-- Change bulk cdc clock voting to individual clock voting.
-- Remove redundant code, conditional check and prints.
-- Fix typo errors.
Changes Since V12:
-- Fix arguments type mismatch.
Changes Since V11:
-- Fix kernel robot issue on arguments type mismatch.
Changes Since V10:
-- Split bulk clock voting to individual clock voting as per use case in cdc-dma driver.
-- Add missing codec dma clocks.
-- Update rxtx lpm buffer size.
Changes Since V9:
-- Change individual clock voting to bulk clock voting of lpass-sc7280 platform driver.
-- Remove redundant clocks in lpass variant structure.
-- Add mclk for MI2S based headset path.
-- Remove unused lpass variant structure members in lpass header.
Changes Since V8:
-- Fix errors in sc7280 lpass cpu dt-bindings.
-- Move to quicinc domain email id's.
Changes Since V7:
-- Fix indentation errors.
-- Bisect patches to avoid interdependency.
Changes Since V6:
-- Split cdc dma regmap config macros.
-- Add write dma reg fields for i2s path.
-- Add helper function to distinguish rxtx and va dma ports.
-- Optimizing clock and reg name in cpu dt-bindings.
-- Update buffer management for cdc dma path.
-- Remove Kconfig fields of machine driver.
Changes Since V5:
-- Include MI2S primary node to snd_soc_dai_driver in lpass-sc7280 platform driver.
-- Move dependency patch list to corresponding patch.
-- Add support for missing cdc-dma ports.
-- Change if/else conditional statements to switch cases.
-- Add missing error handlings.
-- Typo errors fix.
Changes Since V4:
-- Remove unused variable in lpass-sc7280 platform driver.
Changes Since V3:
-- Remove redundant power domain controls. As power domains can be configured from dtsi.
Changes Since V2:
-- Split lpass sc7280 cpu driver patch and create regmap config patch.
-- Create patches based on latest kernel tip.
-- Add helper function to get dma control and lpaif handle.
-- Remove unused variables.
Changes Since V1:
-- Typo errors fix
-- CPU driver readable/writable apis optimization.
-- Add Missing config patch
-- Add Common api for repeated dmactl initialization.
Srinivasa Rao Mandadapu (9):
ASoC: qcom: Move lpass_pcm_data structure to lpass header
ASoC: qcom: lpass: Add dma fields for codec dma lpass interface
ASoC: qcom: Add helper function to get dma control and lpaif handle
ASoC: qcom: Add register definition for codec rddma and wrdma
ASoC: qcom: Add regmap config support for codec dma driver
ASoC: qcom: Add support for codec dma driver
ASoC: qcom: Add lpass CPU driver for codec dma control
ASoC: dt-bindings: Add SC7280 lpass cpu bindings
ASoC: qcom: lpass-sc7280: Add platform driver for lpass audio
.../devicetree/bindings/sound/qcom,lpass-cpu.yaml | 75 ++-
sound/soc/qcom/Kconfig | 11 +
sound/soc/qcom/Makefile | 4 +
sound/soc/qcom/lpass-cdc-dma.c | 301 ++++++++++
sound/soc/qcom/lpass-cpu.c | 253 ++++++++-
sound/soc/qcom/lpass-lpaif-reg.h | 127 ++++-
sound/soc/qcom/lpass-platform.c | 628 ++++++++++++++++++---
sound/soc/qcom/lpass-sc7280.c | 438 ++++++++++++++
sound/soc/qcom/lpass.h | 141 +++++
9 files changed, 1890 insertions(+), 88 deletions(-)
create mode 100644 sound/soc/qcom/lpass-cdc-dma.c
create mode 100644 sound/soc/qcom/lpass-sc7280.c
--
2.7.4
Update regmap configuration for supporting headset playback and
capture and DMIC capture using codec dma interface
Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Co-developed-by: Venkata Prasad Potturu <[email protected]>
Signed-off-by: Venkata Prasad Potturu <[email protected]>
Reviewed-by: Srinivas Kandagatla <[email protected]>
---
sound/soc/qcom/lpass-cpu.c | 253 ++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 252 insertions(+), 1 deletion(-)
diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c
index 3bd9eb3..e6846ad 100644
--- a/sound/soc/qcom/lpass-cpu.c
+++ b/sound/soc/qcom/lpass-cpu.c
@@ -28,6 +28,8 @@
#define LPASS_CPU_I2S_SD2_3_MASK GENMASK(3, 2)
#define LPASS_CPU_I2S_SD0_1_2_MASK GENMASK(2, 0)
#define LPASS_CPU_I2S_SD0_1_2_3_MASK GENMASK(3, 0)
+#define LPASS_REG_READ 1
+#define LPASS_REG_WRITE 0
/*
* Channel maps for Quad channel playbacks on MI2S Secondary
@@ -798,6 +800,189 @@ static struct regmap_config lpass_hdmi_regmap_config = {
.cache_type = REGCACHE_FLAT,
};
+static bool __lpass_rxtx_regmap_accessible(struct device *dev, unsigned int reg, bool rw)
+{
+ struct lpass_data *drvdata = dev_get_drvdata(dev);
+ struct lpass_variant *v = drvdata->variant;
+ int i;
+
+ for (i = 0; i < v->rxtx_irq_ports; ++i) {
+ if (reg == LPAIF_RXTX_IRQCLEAR_REG(v, i))
+ return true;
+ if (reg == LPAIF_RXTX_IRQEN_REG(v, i))
+ return true;
+ if (reg == LPAIF_RXTX_IRQSTAT_REG(v, i))
+ return true;
+ }
+
+ for (i = 0; i < v->rxtx_rdma_channels; ++i) {
+ if (reg == LPAIF_CDC_RXTX_RDMACTL_REG(v, i, LPASS_CDC_DMA_RX0))
+ return true;
+ if (reg == LPAIF_CDC_RXTX_RDMABASE_REG(v, i, LPASS_CDC_DMA_RX0))
+ return true;
+ if (reg == LPAIF_CDC_RXTX_RDMABUFF_REG(v, i, LPASS_CDC_DMA_RX0))
+ return true;
+ if (rw == LPASS_REG_READ) {
+ if (reg == LPAIF_CDC_RXTX_RDMACURR_REG(v, i, LPASS_CDC_DMA_RX0))
+ return true;
+ }
+ if (reg == LPAIF_CDC_RXTX_RDMAPER_REG(v, i, LPASS_CDC_DMA_RX0))
+ return true;
+ if (reg == LPAIF_CDC_RXTX_RDMA_INTF_REG(v, i, LPASS_CDC_DMA_RX0))
+ return true;
+ }
+
+ for (i = 0; i < v->rxtx_wrdma_channels; ++i) {
+ if (reg == LPAIF_CDC_RXTX_WRDMACTL_REG(v, i + v->rxtx_wrdma_channel_start,
+ LPASS_CDC_DMA_TX3))
+ return true;
+ if (reg == LPAIF_CDC_RXTX_WRDMABASE_REG(v, i + v->rxtx_wrdma_channel_start,
+ LPASS_CDC_DMA_TX3))
+ return true;
+ if (reg == LPAIF_CDC_RXTX_WRDMABUFF_REG(v, i + v->rxtx_wrdma_channel_start,
+ LPASS_CDC_DMA_TX3))
+ return true;
+ if (rw == LPASS_REG_READ) {
+ if (reg == LPAIF_CDC_RXTX_WRDMACURR_REG(v, i, LPASS_CDC_DMA_RX0))
+ return true;
+ }
+ if (reg == LPAIF_CDC_RXTX_WRDMAPER_REG(v, i + v->rxtx_wrdma_channel_start,
+ LPASS_CDC_DMA_TX3))
+ return true;
+ if (reg == LPAIF_CDC_RXTX_WRDMA_INTF_REG(v, i + v->rxtx_wrdma_channel_start,
+ LPASS_CDC_DMA_TX3))
+ return true;
+ }
+ return false;
+}
+
+static bool lpass_rxtx_regmap_writeable(struct device *dev, unsigned int reg)
+{
+ return __lpass_rxtx_regmap_accessible(dev, reg, LPASS_REG_WRITE);
+}
+
+static bool lpass_rxtx_regmap_readable(struct device *dev, unsigned int reg)
+{
+ return __lpass_rxtx_regmap_accessible(dev, reg, LPASS_REG_READ);
+}
+
+static bool lpass_rxtx_regmap_volatile(struct device *dev, unsigned int reg)
+{
+ struct lpass_data *drvdata = dev_get_drvdata(dev);
+ struct lpass_variant *v = drvdata->variant;
+ int i;
+
+ for (i = 0; i < v->rxtx_irq_ports; ++i) {
+ if (reg == LPAIF_RXTX_IRQCLEAR_REG(v, i))
+ return true;
+ if (reg == LPAIF_RXTX_IRQSTAT_REG(v, i))
+ return true;
+ }
+
+ for (i = 0; i < v->rxtx_rdma_channels; ++i)
+ if (reg == LPAIF_CDC_RXTX_RDMACURR_REG(v, i, LPASS_CDC_DMA_RX0))
+ return true;
+
+ for (i = 0; i < v->rxtx_wrdma_channels; ++i)
+ if (reg == LPAIF_CDC_RXTX_WRDMACURR_REG(v, i + v->rxtx_wrdma_channel_start,
+ LPASS_CDC_DMA_TX3))
+ return true;
+
+ return false;
+}
+
+static bool __lpass_va_regmap_accessible(struct device *dev, unsigned int reg, bool rw)
+{
+ struct lpass_data *drvdata = dev_get_drvdata(dev);
+ struct lpass_variant *v = drvdata->variant;
+ int i;
+
+ for (i = 0; i < v->va_irq_ports; ++i) {
+ if (reg == LPAIF_VA_IRQCLEAR_REG(v, i))
+ return true;
+ if (reg == LPAIF_VA_IRQEN_REG(v, i))
+ return true;
+ if (reg == LPAIF_VA_IRQSTAT_REG(v, i))
+ return true;
+ }
+
+ for (i = 0; i < v->va_wrdma_channels; ++i) {
+ if (reg == LPAIF_CDC_VA_WRDMACTL_REG(v, i + v->va_wrdma_channel_start,
+ LPASS_CDC_DMA_VA_TX0))
+ return true;
+ if (reg == LPAIF_CDC_VA_WRDMABASE_REG(v, i + v->va_wrdma_channel_start,
+ LPASS_CDC_DMA_VA_TX0))
+ return true;
+ if (reg == LPAIF_CDC_VA_WRDMABUFF_REG(v, i + v->va_wrdma_channel_start,
+ LPASS_CDC_DMA_VA_TX0))
+ return true;
+ if (rw == LPASS_REG_READ) {
+ if (reg == LPAIF_CDC_VA_WRDMACURR_REG(v, i + v->va_wrdma_channel_start,
+ LPASS_CDC_DMA_VA_TX0))
+ return true;
+ }
+ if (reg == LPAIF_CDC_VA_WRDMAPER_REG(v, i + v->va_wrdma_channel_start,
+ LPASS_CDC_DMA_VA_TX0))
+ return true;
+ if (reg == LPAIF_CDC_VA_WRDMA_INTF_REG(v, i + v->va_wrdma_channel_start,
+ LPASS_CDC_DMA_VA_TX0))
+ return true;
+ }
+ return false;
+}
+
+static bool lpass_va_regmap_writeable(struct device *dev, unsigned int reg)
+{
+ return __lpass_va_regmap_accessible(dev, reg, LPASS_REG_WRITE);
+}
+
+static bool lpass_va_regmap_readable(struct device *dev, unsigned int reg)
+{
+ return __lpass_va_regmap_accessible(dev, reg, LPASS_REG_READ);
+}
+
+static bool lpass_va_regmap_volatile(struct device *dev, unsigned int reg)
+{
+ struct lpass_data *drvdata = dev_get_drvdata(dev);
+ struct lpass_variant *v = drvdata->variant;
+ int i;
+
+ for (i = 0; i < v->va_irq_ports; ++i) {
+ if (reg == LPAIF_VA_IRQCLEAR_REG(v, i))
+ return true;
+ if (reg == LPAIF_VA_IRQSTAT_REG(v, i))
+ return true;
+ }
+
+ for (i = 0; i < v->va_wrdma_channels; ++i) {
+ if (reg == LPAIF_CDC_VA_WRDMACURR_REG(v, i + v->va_wrdma_channel_start,
+ LPASS_CDC_DMA_VA_TX0))
+ return true;
+ }
+
+ return false;
+}
+
+static struct regmap_config lpass_rxtx_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .writeable_reg = lpass_rxtx_regmap_writeable,
+ .readable_reg = lpass_rxtx_regmap_readable,
+ .volatile_reg = lpass_rxtx_regmap_volatile,
+ .cache_type = REGCACHE_FLAT,
+};
+
+static struct regmap_config lpass_va_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .writeable_reg = lpass_va_regmap_writeable,
+ .readable_reg = lpass_va_regmap_readable,
+ .volatile_reg = lpass_va_regmap_volatile,
+ .cache_type = REGCACHE_FLAT,
+};
+
static unsigned int of_lpass_cpu_parse_sd_lines(struct device *dev,
struct device_node *node,
const char *name)
@@ -857,6 +1042,8 @@ static void of_lpass_cpu_parse_dai_data(struct device *dev,
}
if (id == LPASS_DP_RX) {
data->hdmi_port_enable = 1;
+ } else if (is_cdc_dma_port(id)) {
+ data->codec_dma_enable = 1;
} else {
data->mi2s_playback_sd_mode[id] =
of_lpass_cpu_parse_sd_lines(dev, node,
@@ -868,10 +1055,33 @@ static void of_lpass_cpu_parse_dai_data(struct device *dev,
}
}
+static int of_lpass_cdc_dma_clks_parse(struct device *dev,
+ struct lpass_data *data)
+{
+ data->codec_mem0 = devm_clk_get(dev, "audio_cc_codec_mem0");
+ if (IS_ERR(data->codec_mem0))
+ return PTR_ERR(data->codec_mem0);
+
+ data->codec_mem1 = devm_clk_get(dev, "audio_cc_codec_mem1");
+ if (IS_ERR(data->codec_mem1))
+ return PTR_ERR(data->codec_mem1);
+
+ data->codec_mem2 = devm_clk_get(dev, "audio_cc_codec_mem2");
+ if (IS_ERR(data->codec_mem2))
+ return PTR_ERR(data->codec_mem2);
+
+ data->va_mem0 = devm_clk_get(dev, "aon_cc_va_mem0");
+ if (IS_ERR(data->va_mem0))
+ return PTR_ERR(data->va_mem0);
+
+ return 0;
+}
+
int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
{
struct lpass_data *drvdata;
struct device_node *dsp_of_node;
+ struct resource *res;
struct lpass_variant *variant;
struct device *dev = &pdev->dev;
const struct of_device_id *match;
@@ -897,6 +1107,47 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
of_lpass_cpu_parse_dai_data(dev, drvdata);
+ if (drvdata->codec_dma_enable) {
+ drvdata->rxtx_lpaif =
+ devm_platform_ioremap_resource_byname(pdev, "lpass-rxtx-lpaif");
+ if (IS_ERR(drvdata->rxtx_lpaif))
+ return PTR_ERR(drvdata->rxtx_lpaif);
+
+ drvdata->va_lpaif = devm_platform_ioremap_resource_byname(pdev, "lpass-va-lpaif");
+ if (IS_ERR(drvdata->va_lpaif))
+ return PTR_ERR(drvdata->va_lpaif);
+
+ lpass_rxtx_regmap_config.max_register = LPAIF_CDC_RXTX_WRDMAPER_REG(variant,
+ variant->rxtx_wrdma_channels +
+ variant->rxtx_wrdma_channel_start, LPASS_CDC_DMA_TX3);
+
+ drvdata->rxtx_lpaif_map = devm_regmap_init_mmio(dev, drvdata->rxtx_lpaif,
+ &lpass_rxtx_regmap_config);
+ if (IS_ERR(drvdata->rxtx_lpaif_map))
+ return PTR_ERR(drvdata->rxtx_lpaif_map);
+
+ lpass_va_regmap_config.max_register = LPAIF_CDC_VA_WRDMAPER_REG(variant,
+ variant->va_wrdma_channels +
+ variant->va_wrdma_channel_start, LPASS_CDC_DMA_VA_TX0);
+
+ drvdata->va_lpaif_map = devm_regmap_init_mmio(dev, drvdata->va_lpaif,
+ &lpass_va_regmap_config);
+ if (IS_ERR(drvdata->va_lpaif_map))
+ return PTR_ERR(drvdata->va_lpaif_map);
+
+ ret = of_lpass_cdc_dma_clks_parse(dev, drvdata);
+ if (ret) {
+ dev_err(dev, "failed to get cdc dma clocks %d\n", ret);
+ return ret;
+ }
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-rxtx-cdc-dma-lpm");
+ drvdata->rxtx_cdc_dma_lpm_buf = res->start;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-va-cdc-dma-lpm");
+ drvdata->va_cdc_dma_lpm_buf = res->start;
+ }
+
drvdata->lpaif = devm_platform_ioremap_resource_byname(pdev, "lpass-lpaif");
if (IS_ERR(drvdata->lpaif))
return PTR_ERR(drvdata->lpaif);
@@ -939,7 +1190,7 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
for (i = 0; i < variant->num_dai; i++) {
dai_id = variant->dai_driver[i].id;
- if (dai_id == LPASS_DP_RX)
+ if (dai_id == LPASS_DP_RX || is_cdc_dma_port(dai_id))
continue;
drvdata->mi2s_osr_clk[dai_id] = devm_clk_get_optional(dev,
--
2.7.4
On Thu, 24 Feb 2022 21:03:39 +0530, Srinivasa Rao Mandadapu wrote:
> This patch set is to add support for Audio over wcd codec,
> digital mics, through digital codecs and without ADSP.
>
> Changes Since V15:
> -- Bisect patches to avoid build failure in other architectures.
> -- Remove redundant variables lpass variant structure.
> Changes Since V14:
> -- Split common wrapper function to separate wrapper for each handle in platform driver.
> -- Update cdc dma buffer handling with memremap with ioremap.
> -- Remove redundant error prints.
> -- Update irq flag.
> Changes Since V13:
> -- Change bulk cdc clock voting to individual clock voting.
> -- Remove redundant code, conditional check and prints.
> -- Fix typo errors.
> Changes Since V12:
> -- Fix arguments type mismatch.
> Changes Since V11:
> -- Fix kernel robot issue on arguments type mismatch.
> Changes Since V10:
> -- Split bulk clock voting to individual clock voting as per use case in cdc-dma driver.
> -- Add missing codec dma clocks.
> -- Update rxtx lpm buffer size.
> Changes Since V9:
> -- Change individual clock voting to bulk clock voting of lpass-sc7280 platform driver.
> -- Remove redundant clocks in lpass variant structure.
> -- Add mclk for MI2S based headset path.
> -- Remove unused lpass variant structure members in lpass header.
> Changes Since V8:
> -- Fix errors in sc7280 lpass cpu dt-bindings.
> -- Move to quicinc domain email id's.
> Changes Since V7:
> -- Fix indentation errors.
> -- Bisect patches to avoid interdependency.
> Changes Since V6:
> -- Split cdc dma regmap config macros.
> -- Add write dma reg fields for i2s path.
> -- Add helper function to distinguish rxtx and va dma ports.
> -- Optimizing clock and reg name in cpu dt-bindings.
> -- Update buffer management for cdc dma path.
> -- Remove Kconfig fields of machine driver.
> Changes Since V5:
> -- Include MI2S primary node to snd_soc_dai_driver in lpass-sc7280 platform driver.
> -- Move dependency patch list to corresponding patch.
> -- Add support for missing cdc-dma ports.
> -- Change if/else conditional statements to switch cases.
> -- Add missing error handlings.
> -- Typo errors fix.
> Changes Since V4:
> -- Remove unused variable in lpass-sc7280 platform driver.
> Changes Since V3:
> -- Remove redundant power domain controls. As power domains can be configured from dtsi.
> Changes Since V2:
> -- Split lpass sc7280 cpu driver patch and create regmap config patch.
> -- Create patches based on latest kernel tip.
> -- Add helper function to get dma control and lpaif handle.
> -- Remove unused variables.
> Changes Since V1:
> -- Typo errors fix
> -- CPU driver readable/writable apis optimization.
> -- Add Missing config patch
> -- Add Common api for repeated dmactl initialization.
> Srinivasa Rao Mandadapu (9):
> ASoC: qcom: Move lpass_pcm_data structure to lpass header
> ASoC: qcom: lpass: Add dma fields for codec dma lpass interface
> ASoC: qcom: Add helper function to get dma control and lpaif handle
> ASoC: qcom: Add register definition for codec rddma and wrdma
> ASoC: qcom: Add regmap config support for codec dma driver
> ASoC: qcom: Add support for codec dma driver
> ASoC: qcom: Add lpass CPU driver for codec dma control
> ASoC: dt-bindings: Add SC7280 lpass cpu bindings
> ASoC: qcom: lpass-sc7280: Add platform driver for lpass audio
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/9] ASoC: qcom: Move lpass_pcm_data structure to lpass header
commit: 74190d7cd3e8ab5123206d383dbfe125a4b7bb19
[2/9] ASoC: qcom: lpass: Add dma fields for codec dma lpass interface
commit: ddd60045caa59d4b3d4b2a4b48fefd4974198587
[3/9] ASoC: qcom: Add helper function to get dma control and lpaif handle
commit: 16413d5c5a2ed81d8fece1c5fe0b85752ecdbdf2
[4/9] ASoC: qcom: Add register definition for codec rddma and wrdma
commit: dc8d9766bc03efee4d1b6dd912659858fdf981de
[5/9] ASoC: qcom: Add regmap config support for codec dma driver
commit: b138706225c9ce9fac7a4955df31d8f68bb1d409
[6/9] ASoC: qcom: Add support for codec dma driver
commit: 7d7209557b6712e8aa72ac1ce67a3fe209f5f889
[7/9] ASoC: qcom: Add lpass CPU driver for codec dma control
commit: b81af585ea54ee9f749391e594ee9cbd44061eae
[8/9] ASoC: dt-bindings: Add SC7280 lpass cpu bindings
commit: f3fc4fbfa2d2a09cb279af4e290d0a6dbbc93c7e
[9/9] ASoC: qcom: lpass-sc7280: Add platform driver for lpass audio
commit: b62c4e5fba2f910bc9f23ae152d11627e4c2f00f
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark