Good Morning,
This is my patch series that I have maintained out of tree until the
combophy driver landed.
This has been rebased on v5.18-rc1, several patches in the previous
series already landed and have been dropped.
Patch 1 adds the dt bindings for the grf changes necessary.
Patch 2 adds support to the grf driver to set the rk3566 otg clock
source.
Patch 3 adds the dwc3 nodes to the rk356x device tree includes.
Patch 4 enables the dwc3 nodes on the Quartz64 Model A.
Patch 5 enables the dwc3 nodes on the rk3568-evb.
Please review and apply.
Very Respectfully,
Peter Geis
Changelog:
v5:
- Rebase on v5.18-rc1
- Drop patches already merged
- Collect acks and tested-by
v4:
- Add SoC specific binding, fall back to core.
v3:
- Drop the dwc-of-simple method in favor of using dwc core.
- Drop all quirks except snps,dis_u2_susphy_quirk, which is necessary to
prevent device detection failures in some states.
- Drop the reset-names.
v2:
- Add a dt-bindings fix for grf.yaml
- Unify the reset names.
- Constrain the force usb2 clock dwc3 patch to only supported variants of
the ip.
- Change dwc3-of-simple to support of-match-data.
- Drop the PCLK-PIPE clk.
- Rename the usb nodes to be more friendly.
- Add the rk3568-evb enable patch.
Michael Riesch (1):
arm64: dts: rockchip: add usb3 support to rk3568-evb1-v10
Peter Geis (4):
dt-bindings: soc: grf: add rk3566-pipe-grf compatible
soc: rockchip: set dwc3 clock for rk3566
arm64: dts: rockchip: add rk356x dwc3 usb3 nodes
arm64: dts: rockchip: enable dwc3 on quartz64-a
.../devicetree/bindings/soc/rockchip/grf.yaml | 1 +
.../boot/dts/rockchip/rk3566-quartz64-a.dts | 37 +++++++++++++++
arch/arm64/boot/dts/rockchip/rk3566.dtsi | 11 +++++
.../boot/dts/rockchip/rk3568-evb1-v10.dts | 46 +++++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3568.dtsi | 9 ++++
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 35 +++++++++++++-
drivers/soc/rockchip/grf.c | 17 +++++++
7 files changed, 155 insertions(+), 1 deletion(-)
--
2.25.1
The rk3566 dwc3 otg port clock is unavailable at boot, as it defaults to
the combophy as the clock source. As combophy0 doesn't exist on rk3566,
we need to set the clock source to the usb2 phy instead.
Add handling to the grf driver to handle this on boot.
Signed-off-by: Peter Geis <[email protected]>
---
drivers/soc/rockchip/grf.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c
index 494cf2b5bf7b..384461b70684 100644
--- a/drivers/soc/rockchip/grf.c
+++ b/drivers/soc/rockchip/grf.c
@@ -108,6 +108,20 @@ static const struct rockchip_grf_info rk3399_grf __initconst = {
.num_values = ARRAY_SIZE(rk3399_defaults),
};
+#define RK3566_GRF_USB3OTG0_CON1 0x0104
+
+static const struct rockchip_grf_value rk3566_defaults[] __initconst = {
+ { "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12) },
+ { "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7) },
+ { "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0) },
+};
+
+static const struct rockchip_grf_info rk3566_pipegrf __initconst = {
+ .values = rk3566_defaults,
+ .num_values = ARRAY_SIZE(rk3566_defaults),
+};
+
+
static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
{
.compatible = "rockchip,rk3036-grf",
@@ -130,6 +144,9 @@ static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
}, {
.compatible = "rockchip,rk3399-grf",
.data = (void *)&rk3399_grf,
+ }, {
+ .compatible = "rockchip,rk3566-pipe-grf",
+ .data = (void *)&rk3566_pipegrf,
},
{ /* sentinel */ },
};
--
2.25.1
The rk3566 requires special handling for the dwc3-otg clock in order for
the port to function correctly.
Add a binding for the rk3566-pipe-grf so we can handle setup with the
grf driver.
Signed-off-by: Peter Geis <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
index b2ba7bed89b2..3be3cfd52f7b 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
@@ -15,6 +15,7 @@ properties:
- items:
- enum:
- rockchip,rk3288-sgrf
+ - rockchip,rk3566-pipe-grf
- rockchip,rk3568-usb2phy-grf
- rockchip,rv1108-usbgrf
- const: syscon
--
2.25.1
From: Michael Riesch <[email protected]>
The Rockchip RK3568 EVB1 features one USB 3.0 device-only
(USB 2.0 OTG) port and one USB 3.0 host-only port.
Activate the USB 3.0 controller nodes and phy nodes in the
device tree.
Signed-off-by: Sascha Hauer <[email protected]>
Signed-off-by: Michael Riesch <[email protected]>
---
.../boot/dts/rockchip/rk3568-evb1-v10.dts | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
index a794a0ea5c70..622be8be9813 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
@@ -103,6 +103,18 @@ vcc5v0_usb_host: vcc5v0-usb-host {
vin-supply = <&vcc5v0_usb>;
};
+ vcc5v0_usb_otg: vcc5v0-usb-otg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_usb_otg_en>;
+ regulator-name = "vcc5v0_usb_otg";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
vcc3v3_lcd0_n: vcc3v3-lcd0-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd0_n";
@@ -136,6 +148,14 @@ regulator-state-mem {
};
};
+&combphy0 {
+ status = "okay";
+};
+
+&combphy1 {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
@@ -507,6 +527,9 @@ usb {
vcc5v0_usb_host_en: vcc5v0_usb_host_en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
+ vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
};
};
@@ -568,6 +591,11 @@ &usb_host0_ohci {
status = "okay";
};
+&usb_host0_xhci {
+ extcon = <&usb2phy0>;
+ status = "okay";
+};
+
&usb_host1_ehci {
status = "okay";
};
@@ -576,6 +604,24 @@ &usb_host1_ohci {
status = "okay";
};
+&usb_host1_xhci {
+ status = "okay";
+};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+&usb2phy0_host {
+ phy-supply = <&vcc5v0_usb_host>;
+ status = "okay";
+};
+
+&usb2phy0_otg {
+ vbus-supply = <&vcc5v0_usb_otg>;
+ status = "okay";
+};
+
&usb2phy1 {
status = "okay";
};
--
2.25.1
On Fri, 8 Apr 2022 11:12:32 -0400, Peter Geis wrote:
> Good Morning,
>
> This is my patch series that I have maintained out of tree until the
> combophy driver landed.
>
> This has been rebased on v5.18-rc1, several patches in the previous
> series already landed and have been dropped.
>
> [...]
Applied, thanks!
[1/5] dt-bindings: soc: grf: add rk3566-pipe-grf compatible
commit: 2a872dd86eeb349f169df0a204668afa578a94b2
[2/5] soc: rockchip: set dwc3 clock for rk3566
commit: 5c0bb71138770d85ea840acd379edc6471b867ee
[3/5] arm64: dts: rockchip: add rk356x dwc3 usb3 nodes
commit: 9f4c480f24e2ce1d464ff9d5f8a249a485acdc7f
[4/5] arm64: dts: rockchip: enable dwc3 on quartz64-a
commit: e432309ff8bf2a148bbdd4946ca1580c6b5b610c
[5/5] arm64: dts: rockchip: add usb3 support to rk3568-evb1-v10
commit: d6cfb110b0fdfb4e61ef4e3c3ab89a8f21b4d1b8
Best regards,
--
Heiko Stuebner <[email protected]>