Hello,
This series adds and enables devicetree nodes for QPIC BAM
and QPIC NAND for Qualcomm SDX65 platform.
Changes since v1:
- Sort the nodes added for sdx65-mtp in alphabetical order.
- Rebased on top of 5.18-rc5.
Kaushal Kumar (4):
ARM: dts: qcom: sdx65: Add QPIC BAM support
ARM: dts: qcom: sdx65: Add QPIC NAND support
ARM: dts: qcom: sdx65-mtp: Enable QPIC BAM support
ARM: dts: qcom: sdx65-mtp: Enable QPIC NAND support
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 27 +++++++++++++++++++++++----
arch/arm/boot/dts/qcom-sdx65.dtsi | 34 ++++++++++++++++++++++++++++++++++
2 files changed, 57 insertions(+), 4 deletions(-)
--
2.7.4
Enable QPIC BAM devicetree node for Qualcomm SDX65-MTP board.
While at it, sort the blsp1_uart3 node in alphabetical order.
Signed-off-by: Kaushal Kumar <[email protected]>
---
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
index 6920524..153ad2a 100644
--- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
@@ -64,10 +64,6 @@
};
};
-&blsp1_uart3 {
- status = "ok";
-};
-
&apps_rsc {
pmx65-rpmh-regulators {
compatible = "qcom,pmx65-rpmh-regulators";
@@ -245,6 +241,14 @@
};
};
+&blsp1_uart3 {
+ status = "ok";
+};
+
+&qpic_bam {
+ status = "ok";
+};
+
&usb {
status = "okay";
};
--
2.7.4
Add devicetree node to enable support for QPIC
BAM DMA controller on Qualcomm SDX65 platform.
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Signed-off-by: Kaushal Kumar <[email protected]>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index a64be20..d6a6087 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -199,6 +199,18 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ qpic_bam: dma-controller@1b04000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x01b04000 0x1c000>;
+ interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rpmhcc RPMH_QPIC_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ status = "disabled";
+ };
+
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x01f40000 0x40000>;
--
2.7.4
On Mon, May 02, 2022 at 07:14:37AM -0700, Kaushal Kumar wrote:
> Enable QPIC BAM devicetree node for Qualcomm SDX65-MTP board.
> While at it, sort the blsp1_uart3 node in alphabetical order.
>
> Signed-off-by: Kaushal Kumar <[email protected]>
Same comment as 4/4, with that fixed:
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Thanks,
Mani
> ---
> arch/arm/boot/dts/qcom-sdx65-mtp.dts | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
> index 6920524..153ad2a 100644
> --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
> +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
> @@ -64,10 +64,6 @@
> };
> };
>
> -&blsp1_uart3 {
> - status = "ok";
> -};
> -
> &apps_rsc {
> pmx65-rpmh-regulators {
> compatible = "qcom,pmx65-rpmh-regulators";
> @@ -245,6 +241,14 @@
> };
> };
>
> +&blsp1_uart3 {
> + status = "ok";
> +};
> +
> +&qpic_bam {
> + status = "ok";
> +};
> +
> &usb {
> status = "okay";
> };
> --
> 2.7.4
>
Enable QPIC NAND devicetree node for Qualcomm SDX65-MTP board.
Signed-off-by: Kaushal Kumar <[email protected]>
---
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
index 153ad2a..b0027c1 100644
--- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
@@ -249,6 +249,21 @@
status = "ok";
};
+&qpic_nand {
+ status = "ok";
+
+ nand@0 {
+ reg = <0>;
+
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-bus-width = <8>;
+ /* ico and efs2 partitions are secured */
+ secure-regions = /bits/ 64 <0x500000 0x500000
+ 0xa00000 0xb00000>;
+ };
+};
+
&usb {
status = "okay";
};
--
2.7.4
Add devicetree node to enable support for QPIC
NAND controller on Qualcomm SDX65 platform.
Since there is no "aon" clock in SDX65, a dummy
clock is provided.
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Signed-off-by: Kaushal Kumar <[email protected]>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index d6a6087..a75e9f1 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -37,6 +37,12 @@
clock-output-names = "sleep_clk";
#clock-cells = <0>;
};
+
+ nand_clk_dummy: nand-clk-dummy {
+ compatible = "fixed-clock";
+ clock-frequency = <32764>;
+ #clock-cells = <0>;
+ };
};
cpus {
@@ -211,6 +217,22 @@
status = "disabled";
};
+ qpic_nand: nand-controller@1b30000 {
+ compatible = "qcom,sdx55-nand";
+ reg = <0x01b30000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&rpmhcc RPMH_QPIC_CLK>,
+ <&nand_clk_dummy>;
+ clock-names = "core", "aon";
+
+ dmas = <&qpic_bam 0>,
+ <&qpic_bam 1>,
+ <&qpic_bam 2>;
+ dma-names = "tx", "rx", "cmd";
+ status = "disabled";
+ };
+
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x01f40000 0x40000>;
--
2.7.4
On Mon, May 02, 2022 at 07:14:38AM -0700, Kaushal Kumar wrote:
> Enable QPIC NAND devicetree node for Qualcomm SDX65-MTP board.
>
> Signed-off-by: Kaushal Kumar <[email protected]>
One comment below, with that fixed:
Reviewed-by: Manivannan Sadhasivam <[email protected]>
> ---
> arch/arm/boot/dts/qcom-sdx65-mtp.dts | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
> index 153ad2a..b0027c1 100644
> --- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
> +++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
> @@ -249,6 +249,21 @@
> status = "ok";
> };
>
> +&qpic_nand {
> + status = "ok";
> +
Status should be "okay".
Thanks,
Mani
> + nand@0 {
> + reg = <0>;
> +
> + nand-ecc-strength = <4>;
> + nand-ecc-step-size = <512>;
> + nand-bus-width = <8>;
> + /* ico and efs2 partitions are secured */
> + secure-regions = /bits/ 64 <0x500000 0x500000
> + 0xa00000 0xb00000>;
> + };
> +};
> +
> &usb {
> status = "okay";
> };
> --
> 2.7.4
>