2022-05-30 08:38:28

by Manivannan Sadhasivam

Subject: [PATCH 1/3] ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART

The trigger type should be LEVEL_HIGH. So fix it!

Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
arch/arm/boot/dts/qcom-sdx55.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi
index d455795da44c..b75e672c239d 100644
--- a/arch/arm/boot/dts/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
@@ -206,7 +206,7 @@ gcc: clock-controller@100000 {
blsp1_uart3: serial@831000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x00831000 0x200>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc 30>,
<&gcc 9>;
clock-names = "core", "iface";
--
2.25.1

2022-07-03 04:01:24

by Bjorn Andersson

Subject: Re: (subset) [PATCH 1/3] ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART

On Mon, 30 May 2022 13:38:40 +0530, Manivannan Sadhasivam wrote:
> The trigger type should be LEVEL_HIGH. So fix it!
>
>

Applied, thanks!

[1/3] ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART
commit: ae500b351ab0006d933d804a2b7507fe1e98cecc

Best regards,
--
Bjorn Andersson <[email protected]>