Hi Linus, please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl tags/cxl-for-6.0
...to receive initial support and infrastructure for dynamic CXL region
provisioning and other updates. The support is considered "initial"
because it only tackles persistent memory provisioning, and only for
the decode setup portion of the process.
This is important to merge in this form because it is foundational for
other development that depends on the new 'struct cxl_region' object.
That follow-on development for features like region assembly from
labels, address translation for error handling, and RAM region
provisioning will play out over the next several development cycles.
Addtionally the recently released CXL 3.0 specification adds more
complexity like "dynamic capacity devices" (think "thin provisioning
for memory") that builds on top of the 'struct cxl_region' object.
There is new core driver infrastructure to note in this pull. First,
alloc_free_mem_region() is introduced as a straightforward enhancement
of request_free_mem_region() as a generic allocator of physical memory
address space. Recall that CXL provides platform "windows" where CXL
regions can be dynamically provisioned, and that provisioning flow
needs an allocator. Related to that is the new export of
insert_resource_expand_to_fit(), but only into the 'CXL' symbol
namespace. That lets the CXL subsystem advertise the platform ranges to
exclude from request_free_mem_region() requests. Lastly, there is a new
PCI core driver service for DOE (Data Object Exchange) mailboxes. This
is a mailbox built over configuration cycles* that has many use cases,
one of which is retrieving the CDAT (Coherent Device Attribute Table)
from CXL endpoints.
This has appeared in linux-next and has attracted several fixes and
cleanups. There is debug in-flight for a recent problem report of
configuring 4-way regions under a single host-bridge, but these commits
have otherwise passed testing on several emulation platforms including
but not limited to QEMU and the in-kernel cxl_test infrastructure.
There are no other known issues or conflicts.
The new driver infrastructure has acks from Greg (resource APIs) and
Bjorn (PCI DOE). A few tags also arrived after the branch was cut for
soaking in linux-next:
910bc55da828 cxl/region: Move HPA setup to cxl_region_attach()
Reviewed-by: Jonathan Cameron <[email protected]>
298d44d04b2b cxl/region: Fix x1 interleave to greater than x1 interleave routing
Reviewed-by: Jonathan Cameron <[email protected]>
Tested-by: Jonathan Cameron <[email protected]> #via qemu
4d8e4ea5bb39 cxl/region: Disallow region granularity != window granularity
Reviewed-by: Jonathan Cameron <[email protected]>
Please pull, thanks.
* Note, I am uneasy that DOE seems to have both use cases where a
kernel driver is appropriate, and some where a userspace driver over
PCI-sysfs is sufficient. As DOE proliferates I expect Linux will need
to be more explicit about managing those potential conflicts.
---
The following changes since commit e35f5718903b093be4b1d3833aa8a32f864a3ef1:
cxl/mbox: Fix missing variable payload checks in cmd size validation (2022-06-28 22:03:18 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl tags/cxl-for-6.0
for you to fetch changes up to 1cd8a2537eb07751d405ab7e2223f20338a90506:
cxl/hdm: Fix skip allocations vs multiple pmem allocations (2022-08-05 16:11:38 -0700)
----------------------------------------------------------------
cxl for 6.0
- Introduce a 'struct cxl_region' object with support for provisioning
and assembling persistent memory regions.
- Introduce alloc_free_mem_region() to accompany the existing
request_free_mem_region() as a method to allocate physical memory
capacity out of an existing resource.
- Export insert_resource_expand_to_fit() for the CXL subsystem to
late-publish CXL platform windows in iomem_resource.
- Add a polled mode PCI DOE (Data Object Exchange) driver service and
use it in cxl_pci to retrieve the CDAT (Coherent Device Attribute
Table).
----------------------------------------------------------------
Bagas Sanjaya (3):
cxl/regions: add padding for cxl_rr_ep_add nested lists
cxl/region: describe targets and nr_targets members of cxl_region_params
Documentation: cxl: remove dangling kernel-doc reference
Ben Widawsky (6):
cxl/hdm: Use local hdm variable
cxl/hdm: Require all decoders to be enumerated
cxl/hdm: Add sysfs attributes for interleave ways + granularity
cxl/region: Add region creation support
cxl/region: Add a 'uuid' attribute
cxl/region: Add interleave geometry attributes
Dan Carpenter (4):
cxl/region: uninitialized variable in alloc_hpa()
cxl/region: prevent underflow in ways_to_cxl()
cxl/region: decrement ->nr_targets on error in cxl_region_attach()
cxl/region: Fix IS_ERR() vs NULL check
Dan Williams (54):
tools/testing/cxl: Fix cxl_hdm_decode_init() calling convention
cxl/port: Keep port->uport valid for the entire life of a port
cxl/core: Rename ->decoder_range ->hpa_range
cxl/core: Drop ->platform_res attribute for root decoders
cxl/core: Drop is_cxl_decoder()
cxl: Introduce cxl_to_{ways,granularity}
cxl/mem: Convert partition-info to resources
cxl/Documentation: List attribute permissions
cxl/debug: Move debugfs init to cxl_core_init()
cxl/mem: Add a debugfs version of 'iomem' for DPA, 'dpamem'
tools/testing/cxl: Move cxl_test resources to the top of memory
tools/testing/cxl: Expand CFMWS windows
tools/testing/cxl: Add partition support
tools/testing/cxl: Fix decoder default state
cxl/port: Cache CXL host bridge data
cxl/hdm: Initialize decoder type for memory expander devices
cxl/pmem: Delete unused nvdimm attribute
Documentation/cxl: Use a double line break between entries
cxl/core: Define a 'struct cxl_switch_decoder'
cxl/acpi: Track CXL resources in iomem_resource
cxl/core: Define a 'struct cxl_root_decoder'
cxl/core: Define a 'struct cxl_endpoint_decoder'
cxl/hdm: Enumerate allocated DPA
cxl/hdm: Add 'mode' attribute to decoder objects
cxl/hdm: Track next decoder to allocate
cxl/hdm: Add support for allocating DPA to an endpoint decoder
cxl/port: Record dport in endpoint references
cxl/port: Record parent dport when adding ports
cxl/port: Move 'cxl_ep' references to an xarray per port
cxl/port: Move dport tracking to an xarray
cxl/mem: Enumerate port targets before adding endpoints
resource: Introduce alloc_free_mem_region()
cxl/region: Allocate HPA capacity to regions
cxl/region: Enable the assignment of endpoint decoders to regions
cxl/acpi: Add a host-bridge index lookup mechanism
cxl/region: Attach endpoint decoders
cxl/region: Program target lists
cxl/hdm: Commit decoder state to hardware
cxl/region: Add region driver boiler plate
cxl/pmem: Fix offline_nvdimm_bus() to offline by bridge
cxl/region: Introduce cxl_pmem_region objects
cxl/acpi: Autoload driver for 'cxl_acpi' test devices
cxl/region: Delete 'region' attribute from root decoders
cxl/acpi: Minimize granularity for x1 interleaves
cxl/hdm: Fix DPA reservation vs cxl_endpoint_decoder lifetime
cxl/region: Stop initializing interleave granularity
cxl/region: Fix port setup uninitialized variable warnings
cxl/region: Fix region commit uninitialized variable warning
cxl/region: Fix region reference target accounting
cxl/region: Fix decoder interleave programming
cxl/region: Move HPA setup to cxl_region_attach()
cxl/region: Fix x1 interleave to greater than x1 interleave routing
cxl/region: Disallow region granularity != window granularity
cxl/hdm: Fix skip allocations vs multiple pmem allocations
Ira Weiny (4):
PCI: Replace magic constant for PCI Sig Vendor ID
cxl/pci: Create PCI DOE mailbox's for memory devices
driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW}
cxl/port: Read CDAT table
Jonathan Cameron (2):
PCI: Add vendor ID for the PCI SIG
PCI/DOE: Add DOE mailbox support functions
Michael Ellerman (1):
powerpc/mm: Export memory_add_physaddr_to_nid() for modules
.clang-format | 1 +
Documentation/ABI/testing/sysfs-bus-cxl | 305 +++-
Documentation/driver-api/cxl/memory-devices.rst | 8 +
arch/powerpc/mm/mem.c | 1 +
drivers/cxl/Kconfig | 9 +
drivers/cxl/acpi.c | 243 ++-
drivers/cxl/core/Makefile | 1 +
drivers/cxl/core/core.h | 51 +-
drivers/cxl/core/hdm.c | 691 ++++++++-
drivers/cxl/core/mbox.c | 95 +-
drivers/cxl/core/memdev.c | 4 +-
drivers/cxl/core/pci.c | 181 ++-
drivers/cxl/core/pmem.c | 4 +-
drivers/cxl/core/port.c | 738 ++++++---
drivers/cxl/core/region.c | 1896 +++++++++++++++++++++++
drivers/cxl/cxl.h | 312 +++-
drivers/cxl/cxlmem.h | 42 +-
drivers/cxl/cxlpci.h | 1 +
drivers/cxl/mem.c | 49 +-
drivers/cxl/pci.c | 46 +-
drivers/cxl/pmem.c | 259 +++-
drivers/cxl/port.c | 53 +
drivers/nvdimm/region_devs.c | 28 +-
drivers/pci/Kconfig | 3 +
drivers/pci/Makefile | 1 +
drivers/pci/doe.c | 536 +++++++
drivers/pci/probe.c | 2 +-
include/linux/ioport.h | 3 +
include/linux/libnvdimm.h | 5 +
include/linux/pci-doe.h | 77 +
include/linux/pci_ids.h | 1 +
include/linux/sysfs.h | 16 +
include/uapi/linux/pci_regs.h | 29 +-
kernel/resource.c | 185 ++-
mm/Kconfig | 5 +
tools/testing/cxl/Kbuild | 1 +
tools/testing/cxl/test/cxl.c | 131 +-
tools/testing/cxl/test/mem.c | 53 +-
tools/testing/cxl/test/mock.c | 8 +-
39 files changed, 5498 insertions(+), 576 deletions(-)
create mode 100644 drivers/cxl/core/region.c
create mode 100644 drivers/pci/doe.c
create mode 100644 include/linux/pci-doe.h
The pull request you sent on Tue, 9 Aug 2022 23:22:05 +0000:
> git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl tags/cxl-for-6.0
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/c235698355fa94df7073b51befda7d4be00a0e23
Thank you!
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