Hello,
This V4 of patch series is to provide the platform driver to support the
Xilinx XDMA subsystem. The XDMA subsystem is used in conjunction with the
PCI Express IP block to provide high performance data transfer between host
memory and the card's DMA subsystem. It also provides up to 16 user
interrupt wires to user logic that generate interrupts to the host.
+-------+ +-------+ +-----------+
PCIe | | | | | |
Tx/Rx | | | | AXI | |
<=======> | PCIE | <===> | XDMA | <====>| User Logic|
| | | | | |
+-------+ +-------+ +-----------+
The XDMA has been used for Xilinx Alveo PCIe devices.
And it is also integrated into Versal ACAP DMA and Bridge Subsystem.
https://www.xilinx.com/products/boards-and-kits/alveo.html
https://docs.xilinx.com/r/en-US/pg344-pcie-dma-versal/Introduction-to-the-DMA-and-Bridge-Subsystems
The device driver for any FPGA based PCIe device which leverages XDMA can
call the standard dmaengine APIs to discover and use the XDMA subsystem
without duplicating the XDMA driver code in its own driver.
Changes since v3:
- Add one patch to support user logic interrupt.
Changes since v2:
- Removed tasklet.
- Fixed regression bug introduced to V2.
- Test Robot warning.
Changes since v1:
- Moved filling hardware descriptor to xdma_prep_device_sg().
- Changed hardware descriptor enum to "struct xdma_hw_desc".
- Minor changes from code review comments.
Lizhi Hou (2):
dmaengine: xilinx: xdma: Add xilinx xdma driver
dmaengine: xilinx: xdma: Add user logic interrupt support
MAINTAINERS | 11 +
drivers/dma/Kconfig | 13 +
drivers/dma/xilinx/Makefile | 1 +
drivers/dma/xilinx/xdma-regs.h | 171 ++++
drivers/dma/xilinx/xdma.c | 1035 ++++++++++++++++++++++++
include/linux/dma/amd_xdma.h | 17 +
include/linux/platform_data/amd_xdma.h | 34 +
7 files changed, 1282 insertions(+)
create mode 100644 drivers/dma/xilinx/xdma-regs.h
create mode 100644 drivers/dma/xilinx/xdma.c
create mode 100644 include/linux/dma/amd_xdma.h
create mode 100644 include/linux/platform_data/amd_xdma.h
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2.27.0