2022-10-04 20:28:05

by Frank Li

Subject: [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp

Offset 0x124 should be IMX_MU_TSR, not IMX_MU_GSR

Signed-off-by: Frank Li <[email protected]>
---
drivers/irqchip/irq-imx-mu-msi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-imx-mu-msi.c b/drivers/irqchip/irq-imx-mu-msi.c
index b62139dc36e82..229039eda1b1f 100644
--- a/drivers/irqchip/irq-imx-mu-msi.c
+++ b/drivers/irqchip/irq-imx-mu-msi.c
@@ -292,7 +292,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp = {
.xSR = {
[IMX_MU_SR] = 0xC,
[IMX_MU_GSR] = 0x118,
- [IMX_MU_GSR] = 0x124,
+ [IMX_MU_TSR] = 0x124,
[IMX_MU_RSR] = 0x12C,
},
.xCR = {
--
2.35.1

2022-10-04 21:36:02

by Fabio Estevam

Subject: Re: [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp

Hi Frank,

On Tue, Oct 4, 2022 at 5:24 PM Frank Li <[email protected]> wrote:
>
> Offset 0x124 should be IMX_MU_TSR, not IMX_MU_GSR
>
> Signed-off-by: Frank Li <[email protected]>

You missed passing Reported-by and Fixes tag.

2022-10-04 22:55:26

by Marc Zyngier

Subject: Re: [PATCH 1/1] irqchip: irq-imx-mu-msi: fixed wrong register offset for 8ulp

On Tue, 04 Oct 2022 22:27:32 +0100,
Fabio Estevam <[email protected]> wrote:
>
> Hi Frank,
>
> On Tue, Oct 4, 2022 at 5:24 PM Frank Li <[email protected]> wrote:
> >
> > Offset 0x124 should be IMX_MU_TSR, not IMX_MU_GSR
> >
> > Signed-off-by: Frank Li <[email protected]>
>
> You missed passing Reported-by and Fixes tag.

I fixed that locally. Thanks for CC'ing Colin though.

M.

--
Without deviation from the norm, progress is not possible.

2022-10-04 23:14:46

by tip-bot2 for Alexey Makhalov

Subject: [irqchip: irq/irqchip-fixes] irqchip/imx-mu-msi: Fix wrong register offset for 8ulp

The following commit has been merged into the irq/irqchip-fixes branch of irqchip:

Commit-ID: e4a7e67a08ac409f1485c82a2190636d5c81b932
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/e4a7e67a08ac409f1485c82a2190636d5c81b932
Author: Frank Li <[email protected]>
AuthorDate: Tue, 04 Oct 2022 15:24:14 -05:00
Committer: Marc Zyngier <[email protected]>
CommitterDate: Tue, 04 Oct 2022 23:35:36 +01:00

irqchip/imx-mu-msi: Fix wrong register offset for 8ulp

Offset 0x124 should be for IMX_MU_TSR, not IMX_MU_GSR.

Fixes: 70afdab904d2 ("irqchip: Add IMX MU MSI controller driver")
Reported-by: Colin King <[email protected]>
Signed-off-by: Frank Li <[email protected]>
[maz: updated commit message, tags]
Signed-off-by: Marc Zyngier <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
drivers/irqchip/irq-imx-mu-msi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-imx-mu-msi.c b/drivers/irqchip/irq-imx-mu-msi.c
index b62139d..229039e 100644
--- a/drivers/irqchip/irq-imx-mu-msi.c
+++ b/drivers/irqchip/irq-imx-mu-msi.c
@@ -292,7 +292,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp = {
.xSR = {
[IMX_MU_SR] = 0xC,
[IMX_MU_GSR] = 0x118,
- [IMX_MU_GSR] = 0x124,
+ [IMX_MU_TSR] = 0x124,
[IMX_MU_RSR] = 0x12C,
},
.xCR = {