This series adds support for the digital part of the DSI controller
found in the A100 and D1 SoCs (plus T7, which is not supported by
mainline Linux). There are two changes to the hardware integration:
1) the module clock routes through the TCON TOP, and
2) the separate I/O domain is removed.
The actual register interface appears to be the same as before. The
register definitions in the D1 BSP exactly match the A64 BSP.
The BSP describes this as the "40nm" DSI controller variant. There is
also a "28nm" variant with a different register interface; that one is
found in a different subset of SoCs (V5 and A50).
A100/D1 also come with an updated DPHY, described by the BSP as a
"combo" PHY, which is now also used for LVDS channel 0. (LVDS and DSI
share the same pins on Port D.) Since that is a different subsystem,
I am sending that as a separate series.
Changes in v2:
- Add the variant check to the probe error path
Samuel Holland (4):
dt-bindings: display: sun6i-dsi: Fix clock conditional
dt-bindings: display: sun6i-dsi: Add the A100 variant
drm/sun4i: dsi: Add a variant structure
drm/sun4i: dsi: Add the A100 variant
.../display/allwinner,sun6i-a31-mipi-dsi.yaml | 30 ++++++---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 61 +++++++++++++------
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h | 7 +++
3 files changed, 71 insertions(+), 27 deletions(-)
--
2.37.3
The "40nm" MIPI DSI controller found in the A100 and D1 SoCs has the
same register layout as previous SoC integrations. However, its module
clock now comes from the TCON, which means it no longer runs at a fixed
rate, so this needs to be distinguished in the driver.
The controller also now uses pins on Port D instead of dedicated pins,
so it drops the separate power domain.
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Samuel Holland <[email protected]>
---
Removal of the vcc-dsi-supply is maybe a bit questionable. Since there
is no "VCC-DSI" pin anymore, it's not obvious which pin actually does
power the DSI controller/PHY. Possibly power comes from VCC-PD or VCC-IO
or VCC-LVDS. So far, all boards have all of these as always-on supplies,
so it is hard to test.
(no changes since v1)
.../display/allwinner,sun6i-a31-mipi-dsi.yaml | 28 +++++++++++++++----
1 file changed, 23 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml
index bf9bfe8f88ae..c731fbdc2fe0 100644
--- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml
+++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml
@@ -12,9 +12,14 @@ maintainers:
properties:
compatible:
- enum:
- - allwinner,sun6i-a31-mipi-dsi
- - allwinner,sun50i-a64-mipi-dsi
+ oneOf:
+ - enum:
+ - allwinner,sun6i-a31-mipi-dsi
+ - allwinner,sun50i-a64-mipi-dsi
+ - allwinner,sun50i-a100-mipi-dsi
+ - items:
+ - const: allwinner,sun20i-d1-mipi-dsi
+ - const: allwinner,sun50i-a100-mipi-dsi
reg:
maxItems: 1
@@ -59,7 +64,6 @@ required:
- phys
- phy-names
- resets
- - vcc-dsi-supply
- port
allOf:
@@ -68,7 +72,9 @@ allOf:
properties:
compatible:
contains:
- const: allwinner,sun6i-a31-mipi-dsi
+ enum:
+ - allwinner,sun6i-a31-mipi-dsi
+ - allwinner,sun50i-a100-mipi-dsi
then:
properties:
@@ -83,6 +89,18 @@ allOf:
clocks:
maxItems: 1
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun6i-a31-mipi-dsi
+ - allwinner,sun50i-a64-mipi-dsi
+
+ then:
+ required:
+ - vcc-dsi-supply
+
unevaluatedProperties: false
examples:
--
2.37.3
On Sun, 6 Nov 2022 23:35:48 -0600, Samuel Holland wrote:
> This series adds support for the digital part of the DSI controller
> found in the A100 and D1 SoCs (plus T7, which is not supported by
> mainline Linux). There are two changes to the hardware integration:
> 1) the module clock routes through the TCON TOP, and
> 2) the separate I/O domain is removed.
>
> The actual register interface appears to be the same as before. The
> register definitions in the D1 BSP exactly match the A64 BSP.
>
> [...]
Applied to drm/drm-misc (drm-misc-next).
Thanks!
Maxime