Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SM6375 SoC.
Signed-off-by: Konrad Dybcio <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
---
Changes in v2:
- Switch to dual licensing in both files
- Adjust the wording with the recent refactoring
- use qcom,gcc.yaml for common properties
.../bindings/clock/qcom,sm6375-dispcc.yaml | 54 +++++++++++++++++++
.../dt-bindings/clock/qcom,sm6375-dispcc.h | 42 +++++++++++++++
2 files changed, 96 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm6375-dispcc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml
new file mode 100644
index 000000000000..183b1c75dbdf
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sm6375-dispcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display Clock & Reset Controller on SM6375
+
+maintainers:
+ - Konrad Dybcio <[email protected]>
+
+description: |
+ Qualcomm display clock control module provides the clocks, resets and power
+ domains on SM6375.
+
+ See also:: include/dt-bindings/clock/qcom,dispcc-sm6375.h
+
+allOf:
+ - $ref: qcom,gcc.yaml#
+
+properties:
+ compatible:
+ const: qcom,sm6375-dispcc
+
+ clocks:
+ items:
+ - description: Board XO source
+ - description: GPLL0 source from GCC
+ - description: Byte clock from DSI PHY
+ - description: Pixel clock from DSI PHY
+
+required:
+ - compatible
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,sm6375-gcc.h>
+ #include <dt-bindings/clock/qcom,rpmh.h>
+
+ clock-controller@5f00000 {
+ compatible = "qcom,sm6375-dispcc";
+ reg = <0x05f00000 0x20000>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_DISP_GPLL0_CLK_SRC>,
+ <&dsi_phy 0>,
+ <&dsi_phy 1>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+...
diff --git a/include/dt-bindings/clock/qcom,sm6375-dispcc.h b/include/dt-bindings/clock/qcom,sm6375-dispcc.h
new file mode 100644
index 000000000000..1cb0bed004bd
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm6375-dispcc.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6375_H
+#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6375_H
+
+/* Clocks */
+#define DISP_CC_PLL0 0
+#define DISP_CC_MDSS_AHB_CLK 1
+#define DISP_CC_MDSS_AHB_CLK_SRC 2
+#define DISP_CC_MDSS_BYTE0_CLK 3
+#define DISP_CC_MDSS_BYTE0_CLK_SRC 4
+#define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5
+#define DISP_CC_MDSS_BYTE0_INTF_CLK 6
+#define DISP_CC_MDSS_ESC0_CLK 7
+#define DISP_CC_MDSS_ESC0_CLK_SRC 8
+#define DISP_CC_MDSS_MDP_CLK 9
+#define DISP_CC_MDSS_MDP_CLK_SRC 10
+#define DISP_CC_MDSS_MDP_LUT_CLK 11
+#define DISP_CC_MDSS_NON_GDSC_AHB_CLK 12
+#define DISP_CC_MDSS_PCLK0_CLK 13
+#define DISP_CC_MDSS_PCLK0_CLK_SRC 14
+#define DISP_CC_MDSS_ROT_CLK 15
+#define DISP_CC_MDSS_ROT_CLK_SRC 16
+#define DISP_CC_MDSS_RSCC_AHB_CLK 17
+#define DISP_CC_MDSS_RSCC_VSYNC_CLK 18
+#define DISP_CC_MDSS_VSYNC_CLK 19
+#define DISP_CC_MDSS_VSYNC_CLK_SRC 20
+#define DISP_CC_SLEEP_CLK 21
+#define DISP_CC_XO_CLK 22
+
+/* Resets */
+#define DISP_CC_MDSS_CORE_BCR 0
+#define DISP_CC_MDSS_RSCC_BCR 1
+
+/* GDSCs */
+#define MDSS_GDSC 0
+
+#endif
--
2.38.1
On 15/11/2022 16:58, Konrad Dybcio wrote:
> Add device tree bindings for display clock controller for
> Qualcomm Technology Inc's SM6375 SoC.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> Changes in v2:
> - Switch to dual licensing in both files
> - Adjust the wording with the recent refactoring
> - use qcom,gcc.yaml for common properties
If there is going to be a resend, please drop second "bindings" word
from subject (the trailing one). It's redundant.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Tue, 15 Nov 2022 16:58:04 +0100, Konrad Dybcio wrote:
> Add device tree bindings for display clock controller for
> Qualcomm Technology Inc's SM6375 SoC.
>
>
Applied, thanks!
[1/2] dt-bindings: clock: add QCOM SM6375 display clock bindings
commit: 9285e61a5670657cb0a0f0f4e5c5a320dd18b471
[2/2] clk: qcom: Add display clock controller driver for SM6375
commit: aec5f36cf6763a1f246befd9db266d24ba6e8d4b
Best regards,
--
Bjorn Andersson <[email protected]>