2022-11-17 12:31:42

by Tomi Valkeinen

[permalink] [raw]
Subject: [PATCH v1 5/8] arm64: dts: renesas: white-hawk-cpu: Add DP output support

From: Tomi Valkeinen <[email protected]>

Add DT nodes needed for the mini DP connector. The DP is driven by
sn65dsi86, which in turn gets the pixel data from the SoC via DSI.

Signed-off-by: Tomi Valkeinen <[email protected]>
---
.../dts/renesas/r8a779g0-white-hawk-cpu.dtsi | 94 +++++++++++++++++++
1 file changed, 94 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
index c10740aee9f6..8aab859aac7a 100644
--- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
@@ -97,6 +97,15 @@ memory@600000000 {
reg = <0x6 0x00000000 0x1 0x00000000>;
};

+ reg_1p2v: regulator-1p2v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
@@ -114,6 +123,24 @@ reg_3p3v: regulator-3p3v {
regulator-boot-on;
regulator-always-on;
};
+
+ mini-dp-con {
+ compatible = "dp-connector";
+ label = "CN5";
+ type = "mini";
+
+ port {
+ mini_dp_con_in: endpoint {
+ remote-endpoint = <&sn65dsi86_out>;
+ };
+ };
+ };
+
+ sn65dsi86_refclk: clk-x6 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <38400000>;
+ };
};

&avb0 {
@@ -134,6 +161,23 @@ phy0: ethernet-phy@0 {
};
};

+&dsi0 {
+ status = "okay";
+
+ ports {
+ port@1 {
+ dsi0_out: endpoint {
+ remote-endpoint = <&sn65dsi86_in>;
+ data-lanes = <1 2 3 4>;
+ };
+ };
+ };
+};
+
+&du {
+ status = "okay";
+};
+
&extal_clk {
clock-frequency = <16666666>;
};
@@ -172,6 +216,51 @@ eeprom@50 {
};
};

+&i2c1 {
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ bridge@2c {
+ compatible = "ti,sn65dsi86";
+ reg = <0x2c>;
+
+ clocks = <&sn65dsi86_refclk>;
+ clock-names = "refclk";
+
+ interrupt-parent = <&intc_ex>;
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+
+ enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
+
+ vccio-supply = <&reg_1p8v>;
+ vpll-supply = <&reg_1p8v>;
+ vcca-supply = <&reg_1p2v>;
+ vcc-supply = <&reg_1p2v>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ sn65dsi86_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ sn65dsi86_out: endpoint {
+ remote-endpoint = <&mini_dp_con_in>;
+ };
+ };
+ };
+ };
+};
+
&mmc0 {
pinctrl-0 = <&mmc_pins>;
pinctrl-1 = <&mmc_pins>;
@@ -221,6 +310,11 @@ i2c0_pins: i2c0 {
function = "i2c0";
};

+ i2c1_pins: i2c1 {
+ groups = "i2c1";
+ function = "i2c1";
+ };
+
keys_pins: keys {
pins = "GP_5_0", "GP_5_1", "GP_5_2";
bias-pull-up;
--
2.34.1



2022-11-17 15:38:05

by Kieran Bingham

[permalink] [raw]
Subject: Re: [PATCH v1 5/8] arm64: dts: renesas: white-hawk-cpu: Add DP output support

Quoting Tomi Valkeinen (2022-11-17 12:25:44)
> From: Tomi Valkeinen <[email protected]>
>
> Add DT nodes needed for the mini DP connector. The DP is driven by
> sn65dsi86, which in turn gets the pixel data from the SoC via DSI.
>
> Signed-off-by: Tomi Valkeinen <[email protected]>

Reviewed-by: Kieran Bingham <[email protected]>


> ---
> .../dts/renesas/r8a779g0-white-hawk-cpu.dtsi | 94 +++++++++++++++++++
> 1 file changed, 94 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
> index c10740aee9f6..8aab859aac7a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
> @@ -97,6 +97,15 @@ memory@600000000 {
> reg = <0x6 0x00000000 0x1 0x00000000>;
> };
>
> + reg_1p2v: regulator-1p2v {
> + compatible = "regulator-fixed";
> + regulator-name = "fixed-1.2V";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> reg_1p8v: regulator-1p8v {
> compatible = "regulator-fixed";
> regulator-name = "fixed-1.8V";
> @@ -114,6 +123,24 @@ reg_3p3v: regulator-3p3v {
> regulator-boot-on;
> regulator-always-on;
> };
> +
> + mini-dp-con {
> + compatible = "dp-connector";
> + label = "CN5";
> + type = "mini";
> +
> + port {
> + mini_dp_con_in: endpoint {
> + remote-endpoint = <&sn65dsi86_out>;
> + };
> + };
> + };
> +
> + sn65dsi86_refclk: clk-x6 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <38400000>;
> + };
> };
>
> &avb0 {
> @@ -134,6 +161,23 @@ phy0: ethernet-phy@0 {
> };
> };
>
> +&dsi0 {
> + status = "okay";
> +
> + ports {
> + port@1 {
> + dsi0_out: endpoint {
> + remote-endpoint = <&sn65dsi86_in>;
> + data-lanes = <1 2 3 4>;
> + };
> + };
> + };
> +};
> +
> +&du {
> + status = "okay";
> +};
> +
> &extal_clk {
> clock-frequency = <16666666>;
> };
> @@ -172,6 +216,51 @@ eeprom@50 {
> };
> };
>
> +&i2c1 {
> + pinctrl-0 = <&i2c1_pins>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> + clock-frequency = <400000>;
> +
> + bridge@2c {
> + compatible = "ti,sn65dsi86";
> + reg = <0x2c>;
> +
> + clocks = <&sn65dsi86_refclk>;
> + clock-names = "refclk";
> +
> + interrupt-parent = <&intc_ex>;
> + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> +
> + enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
> +
> + vccio-supply = <&reg_1p8v>;
> + vpll-supply = <&reg_1p8v>;
> + vcca-supply = <&reg_1p2v>;
> + vcc-supply = <&reg_1p2v>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + sn65dsi86_in: endpoint {
> + remote-endpoint = <&dsi0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + sn65dsi86_out: endpoint {
> + remote-endpoint = <&mini_dp_con_in>;
> + };
> + };
> + };
> + };
> +};
> +
> &mmc0 {
> pinctrl-0 = <&mmc_pins>;
> pinctrl-1 = <&mmc_pins>;
> @@ -221,6 +310,11 @@ i2c0_pins: i2c0 {
> function = "i2c0";
> };
>
> + i2c1_pins: i2c1 {
> + groups = "i2c1";
> + function = "i2c1";
> + };
> +
> keys_pins: keys {
> pins = "GP_5_0", "GP_5_1", "GP_5_2";
> bias-pull-up;
> --
> 2.34.1
>

2022-11-22 03:13:50

by Laurent Pinchart

[permalink] [raw]
Subject: Re: [PATCH v1 5/8] arm64: dts: renesas: white-hawk-cpu: Add DP output support

Hi Tomi,

Thank you for the patch.

On Thu, Nov 17, 2022 at 02:25:44PM +0200, Tomi Valkeinen wrote:
> From: Tomi Valkeinen <[email protected]>
>
> Add DT nodes needed for the mini DP connector. The DP is driven by
> sn65dsi86, which in turn gets the pixel data from the SoC via DSI.
>
> Signed-off-by: Tomi Valkeinen <[email protected]>

Reviewed-by: Laurent Pinchart <[email protected]>

> ---
> .../dts/renesas/r8a779g0-white-hawk-cpu.dtsi | 94 +++++++++++++++++++
> 1 file changed, 94 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
> index c10740aee9f6..8aab859aac7a 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi
> @@ -97,6 +97,15 @@ memory@600000000 {
> reg = <0x6 0x00000000 0x1 0x00000000>;
> };
>
> + reg_1p2v: regulator-1p2v {
> + compatible = "regulator-fixed";
> + regulator-name = "fixed-1.2V";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> reg_1p8v: regulator-1p8v {
> compatible = "regulator-fixed";
> regulator-name = "fixed-1.8V";
> @@ -114,6 +123,24 @@ reg_3p3v: regulator-3p3v {
> regulator-boot-on;
> regulator-always-on;
> };
> +
> + mini-dp-con {
> + compatible = "dp-connector";
> + label = "CN5";
> + type = "mini";
> +
> + port {
> + mini_dp_con_in: endpoint {
> + remote-endpoint = <&sn65dsi86_out>;
> + };
> + };
> + };
> +
> + sn65dsi86_refclk: clk-x6 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <38400000>;
> + };
> };
>
> &avb0 {
> @@ -134,6 +161,23 @@ phy0: ethernet-phy@0 {
> };
> };
>
> +&dsi0 {
> + status = "okay";
> +
> + ports {
> + port@1 {
> + dsi0_out: endpoint {
> + remote-endpoint = <&sn65dsi86_in>;
> + data-lanes = <1 2 3 4>;
> + };
> + };
> + };
> +};
> +
> +&du {
> + status = "okay";
> +};
> +
> &extal_clk {
> clock-frequency = <16666666>;
> };
> @@ -172,6 +216,51 @@ eeprom@50 {
> };
> };
>
> +&i2c1 {
> + pinctrl-0 = <&i2c1_pins>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> + clock-frequency = <400000>;
> +
> + bridge@2c {
> + compatible = "ti,sn65dsi86";
> + reg = <0x2c>;
> +
> + clocks = <&sn65dsi86_refclk>;
> + clock-names = "refclk";
> +
> + interrupt-parent = <&intc_ex>;
> + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> +
> + enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
> +
> + vccio-supply = <&reg_1p8v>;
> + vpll-supply = <&reg_1p8v>;
> + vcca-supply = <&reg_1p2v>;
> + vcc-supply = <&reg_1p2v>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + sn65dsi86_in: endpoint {
> + remote-endpoint = <&dsi0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + sn65dsi86_out: endpoint {
> + remote-endpoint = <&mini_dp_con_in>;
> + };
> + };
> + };
> + };
> +};
> +
> &mmc0 {
> pinctrl-0 = <&mmc_pins>;
> pinctrl-1 = <&mmc_pins>;
> @@ -221,6 +310,11 @@ i2c0_pins: i2c0 {
> function = "i2c0";
> };
>
> + i2c1_pins: i2c1 {
> + groups = "i2c1";
> + function = "i2c1";
> + };
> +
> keys_pins: keys {
> pins = "GP_5_0", "GP_5_1", "GP_5_2";
> bias-pull-up;

--
Regards,

Laurent Pinchart