2022-12-22 09:48:55

by Srinivasa Rao Mandadapu

Subject: [PATCH 5/7] arm64: dts: qcom: sc7280: audioreach: Add CGCR reset property

Add CGCR register reset property for both RX and TX soundwire
slave devices.

Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
Tested-by: Mohammad Rafi Shaik <[email protected]>
---
This patch depends on:
-- https://lore.kernel.org/linux-clk/[email protected]/

.../arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index a750f05..ce5d69e 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -217,3 +217,12 @@
};
};
};
+
+&swr0 {
+ resets = <&lpasscc LPASS_AUDIO_SWR_RX_CGCR>;
+};
+
+&swr1 {
+ resets = <&lpasscc LPASS_AUDIO_SWR_TX_CGCR>;
+};
+
--
2.7.4

2022-12-23 09:45:30

by Krzysztof Kozlowski

Subject: Re: [PATCH 5/7] arm64: dts: qcom: sc7280: audioreach: Add CGCR reset property

On 22/12/2022 10:42, Srinivasa Rao Mandadapu wrote:
> Add CGCR register reset property for both RX and TX soundwire
> slave devices.
>
> Signed-off-by: Srinivasa Rao Mandadapu <[email protected]>
> Tested-by: Mohammad Rafi Shaik <[email protected]>
> ---
> This patch depends on:
> -- https://lore.kernel.org/linux-clk/[email protected]/
>
> .../arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> index a750f05..ce5d69e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> @@ -217,3 +217,12 @@
> };
> };
> };
> +
> +&swr0 {
> + resets = <&lpasscc LPASS_AUDIO_SWR_RX_CGCR>;
> +};
> +
> +&swr1 {

Why here not in SoC DTSI?

> + resets = <&lpasscc LPASS_AUDIO_SWR_TX_CGCR>;
> +};
> +

Are you adding stray new lines?

Best regards,
Krzysztof